commit 2334f51d5f1c0bd467b887d38a5a12a6b66d0647
author Yaowu Xu <yaowu@google.com> Wed Jan 20 15:52:53 2016 -0800
committer Yaowu Xu <yaowu@google.com> Wed Jan 20 15:52:53 2016 -0800
tree 17d472d3a247172b391af3598ccb66e2db66c300
parent 9baa5c997339cb0f01b13de14f8268073f59d032

VP9->VPX in fdct function names

Change-Id: I664dadad44b98a82a22e87a481b6ec596f272bd6

vp10/encoder/mips/msa/fdct4x4_msa.c

diff --git a/vp10/encoder/mips/msa/fdct4x4_msa.c b/vp10/encoder/mips/msa/fdct4x4_msa.c
index 37269f0..f9028f0 100644
--- a/vp10/encoder/mips/msa/fdct4x4_msa.c
+++ b/vp10/encoder/mips/msa/fdct4x4_msa.c
@@ -67,24 +67,24 @@
 
   switch (tx_type) {
     case DCT_DCT:
-      VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
+      VPX_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
       TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
-      VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
+      VPX_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
       break;
     case ADST_DCT:
-      VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
+      VPX_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
       TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
-      VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
+      VPX_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
       break;
     case DCT_ADST:
-      VP9_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
+      VPX_FDCT4(in0, in1, in2, in3, in0, in1, in2, in3);
       TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
-      VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
+      VPX_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
       break;
     case ADST_ADST:
-      VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
+      VPX_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
       TRANSPOSE4x4_SH_SH(in0, in1, in2, in3, in0, in1, in2, in3);
-      VP9_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
+      VPX_FADST4(in0, in1, in2, in3, in0, in1, in2, in3);
       break;
     default:
       assert(0);

vp10/encoder/mips/msa/fdct8x8_msa.c

diff --git a/vp10/encoder/mips/msa/fdct8x8_msa.c b/vp10/encoder/mips/msa/fdct8x8_msa.c
index 5ce9a65..8e1e111 100644
--- a/vp10/encoder/mips/msa/fdct8x8_msa.c
+++ b/vp10/encoder/mips/msa/fdct8x8_msa.c
@@ -23,11 +23,11 @@
 
   switch (tx_type) {
     case DCT_DCT:
-      VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
+      VPX_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
                 in0, in1, in2, in3, in4, in5, in6, in7);
       TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7,
                          in0, in1, in2, in3, in4, in5, in6, in7);
-      VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
+      VPX_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
                 in0, in1, in2, in3, in4, in5, in6, in7);
       break;
     case ADST_DCT:
@@ -35,11 +35,11 @@
                 in0, in1, in2, in3, in4, in5, in6, in7);
       TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7,
                          in0, in1, in2, in3, in4, in5, in6, in7);
-      VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
+      VPX_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
                 in0, in1, in2, in3, in4, in5, in6, in7);
       break;
     case DCT_ADST:
-      VP9_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
+      VPX_FDCT8(in0, in1, in2, in3, in4, in5, in6, in7,
                 in0, in1, in2, in3, in4, in5, in6, in7);
       TRANSPOSE8x8_SH_SH(in0, in1, in2, in3, in4, in5, in6, in7,
                          in0, in1, in2, in3, in4, in5, in6, in7);

vp10/encoder/mips/msa/fdct_msa.h

diff --git a/vp10/encoder/mips/msa/fdct_msa.h b/vp10/encoder/mips/msa/fdct_msa.h
index 74a756e..5767280 100644
--- a/vp10/encoder/mips/msa/fdct_msa.h
+++ b/vp10/encoder/mips/msa/fdct_msa.h
@@ -81,7 +81,7 @@
   out5 = -out5;                                                             \
 }
 
-#define VP9_FADST4(in0, in1, in2, in3, out0, out1, out2, out3) {  \
+#define VPX_FADST4(in0, in1, in2, in3, out0, out1, out2, out3) {  \
   v4i32 s0_m, s1_m, s2_m, s3_m, constant_m;                       \
   v4i32 in0_r_m, in1_r_m, in2_r_m, in3_r_m;                       \
                                                                   \