)]}'
{
  "commit": "6287954709850d3ec41d38915ef82cecdbc8ca64",
  "tree": "972abd0dde4147fafcb1230e1f50378ae4a60315",
  "parents": [
    "5909d9a5b6b72a459b986b713b5bd037ae55a04b"
  ],
  "author": {
    "name": "Diksha Singh",
    "email": "diksha.singh@ittiam.com",
    "time": "Fri Jan 23 17:55:40 2026 +0530"
  },
  "committer": {
    "name": "Diksha Singh",
    "email": "diksha.singh@ittiam.com",
    "time": "Wed Jan 28 13:30:11 2026 +0530"
  },
  "message": "x86: enable SSE4.2 in x86_simd_caps\n\nThe function x86_simd_caps() computes flags used to enable various\nSIMD variants. Although av1_get_crc32c_value() provides an SSE4.2\nvariant, support for invoking it is currently disabled. This patch\nadds support for enabling SSE4.2.\nEncoder performance results averaged over all resolutions are as\nfollows:\n\n     Encoder Instruction\ncpu   Count Reduction(%)\n 2        1.17\n 3        1.34\n 4        0.98\n 5        1.21\n 6        1.41\n\nThis change is bit-exact for all presets.\n\nChange-Id: Ic372e4647e586ccfe81e2c75c0da7ad43e7c2921\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6ce163ec6ca9315e6ba203947d9138b095f0a3f1",
      "old_mode": 33188,
      "old_path": "aom_ports/x86.h",
      "new_id": "4d00d7241c479ad77a7c23238ce58db80644c4b5",
      "new_mode": 33188,
      "new_path": "aom_ports/x86.h"
    }
  ]
}