[CFL] Rename cfl_alpha_ind to cfl_alpha_idx
Change-Id: Id14d83bdce8321bef81972a4f5530a50589d9578
diff --git a/av1/common/blockd.h b/av1/common/blockd.h
index 8327d1e..f5fa542 100644
--- a/av1/common/blockd.h
+++ b/av1/common/blockd.h
@@ -433,7 +433,7 @@
#if CONFIG_CFL
// Index of the alpha Cb and alpha Cr combination
- int cfl_alpha_ind;
+ int cfl_alpha_idx;
// Signs of alpha Cb and alpha Cr
CFL_SIGN_TYPE cfl_alpha_signs[CFL_PRED_PLANES];
#endif
diff --git a/av1/common/cfl.c b/av1/common/cfl.c
index 7f6fe29..e997379 100644
--- a/av1/common/cfl.c
+++ b/av1/common/cfl.c
@@ -89,7 +89,7 @@
double cfl_ind_to_alpha(const MB_MODE_INFO *const mbmi,
CFL_PRED_TYPE pred_type) {
- double const abs_alpha = cfl_alpha_codes[mbmi->cfl_alpha_ind][pred_type];
+ double const abs_alpha = cfl_alpha_codes[mbmi->cfl_alpha_idx][pred_type];
if (mbmi->cfl_alpha_signs[pred_type] == CFL_SIGN_POS) {
return abs_alpha;
} else {
diff --git a/av1/decoder/decodemv.c b/av1/decoder/decodemv.c
index 018f3d5..fa8bf90 100644
--- a/av1/decoder/decodemv.c
+++ b/av1/decoder/decodemv.c
@@ -1131,7 +1131,7 @@
#if CONFIG_CFL
// TODO(ltrudeau) support PALETTE
if (mbmi->uv_mode == DC_PRED) {
- mbmi->cfl_alpha_ind = read_cfl_alphas(
+ mbmi->cfl_alpha_idx = read_cfl_alphas(
#if CONFIG_EC_ADAPT
xd->tile_ctx,
#else
diff --git a/av1/decoder/inspection.c b/av1/decoder/inspection.c
index 03493dc..f2e6fd3 100644
--- a/av1/decoder/inspection.c
+++ b/av1/decoder/inspection.c
@@ -102,11 +102,11 @@
#endif
#if CONFIG_CFL
if (mbmi->uv_mode == DC_PRED) {
- mi->cfl_alpha_ind = mbmi->cfl_alpha_ind;
+ mi->cfl_alpha_idx = mbmi->cfl_alpha_idx;
mi->cfl_alpha_sign_u = mbmi->cfl_alpha_signs[CFL_PRED_U];
mi->cfl_alpha_sign_v = mbmi->cfl_alpha_signs[CFL_PRED_V];
} else {
- mi->cfl_alpha_ind = 0;
+ mi->cfl_alpha_idx = 0;
mi->cfl_alpha_sign_u = 0;
mi->cfl_alpha_sign_v = 0;
}
diff --git a/av1/decoder/inspection.h b/av1/decoder/inspection.h
index 5bfca11..eb90bef 100644
--- a/av1/decoder/inspection.h
+++ b/av1/decoder/inspection.h
@@ -50,7 +50,7 @@
int8_t cdef_strength;
#endif
#if CONFIG_CFL
- int8_t cfl_alpha_ind;
+ int8_t cfl_alpha_idx;
int8_t cfl_alpha_sign_u;
int8_t cfl_alpha_sign_v;
#endif
diff --git a/av1/encoder/bitstream.c b/av1/encoder/bitstream.c
index 436ce37..12b7d11 100644
--- a/av1/encoder/bitstream.c
+++ b/av1/encoder/bitstream.c
@@ -2201,7 +2201,7 @@
#if CONFIG_CFL
if (mbmi->uv_mode == DC_PRED) {
- write_cfl_alphas(ec_ctx, mbmi->skip, mbmi->cfl_alpha_ind,
+ write_cfl_alphas(ec_ctx, mbmi->skip, mbmi->cfl_alpha_idx,
mbmi->cfl_alpha_signs, w);
}
#endif
diff --git a/av1/encoder/encodemb.c b/av1/encoder/encodemb.c
index a6cdde6..0bd757e 100644
--- a/av1/encoder/encodemb.c
+++ b/av1/encoder/encodemb.c
@@ -1495,7 +1495,7 @@
// if SKIP is chosen at the block level, and ind != 0, we must change
// the prediction
- if (mbmi->cfl_alpha_ind != 0) {
+ if (mbmi->cfl_alpha_idx != 0) {
const struct macroblockd_plane *const pd_cb = &xd->plane[AOM_PLANE_U];
uint8_t *const dst_cb = pd_cb->dst.buf;
const int dst_stride_cb = pd_cb->dst.stride;
@@ -1509,7 +1509,7 @@
(uint8_t)(xd->cfl->dc_pred[CFL_PRED_V] + 0.5);
}
}
- mbmi->cfl_alpha_ind = 0;
+ mbmi->cfl_alpha_idx = 0;
mbmi->cfl_alpha_signs[CFL_PRED_U] = CFL_SIGN_POS;
mbmi->cfl_alpha_signs[CFL_PRED_V] = CFL_SIGN_POS;
}
@@ -1657,7 +1657,7 @@
av1_cost_literal(sign_bit_cost);
}
cfl_dc_pred(xd, plane_bsize, tx_size);
- mbmi->cfl_alpha_ind = cfl_compute_alpha_ind(
+ mbmi->cfl_alpha_idx = cfl_compute_alpha_ind(
x, cfl, plane_bsize, cfl_costs, mbmi->cfl_alpha_signs);
}
}
diff --git a/examples/inspect.c b/examples/inspect.c
index acd3f25..e54e8e4 100644
--- a/examples/inspect.c
+++ b/examples/inspect.c
@@ -499,8 +499,8 @@
#endif
#if CONFIG_CFL
if (layers & CFL_LAYER) {
- buf += put_block_info(buf, NULL, "cfl_alpha_ind",
- offsetof(insp_mi_data, cfl_alpha_ind));
+ buf += put_block_info(buf, NULL, "cfl_alpha_idx",
+ offsetof(insp_mi_data, cfl_alpha_idx));
buf += put_block_info(buf, NULL, "cfl_alpha_sign_u",
offsetof(insp_mi_data, cfl_alpha_sign_u));
buf += put_block_info(buf, NULL, "cfl_alpha_sign_v",
