tree db761f74ee8cca1b4bc30fda5d5c3c91f77fde07
parent 009c7c4ad99865f2d70fd059b4ae57fe06d87321
author Neeraj Gadgil <neeraj.gadgil@ittiam.com> 1662355284 +0530
committer Yunqing Wang <yunqingwang@google.com> 1662574676 +0000

rtc: Tune the sf reduce_mv_pel_precision_highmotion

The sf reduce_mv_pel_precision_highmotion is extended to cpu 9
rtc testset using a newly introduced sf level 1. The new level
 reduce_mv_pel_precision_highmotion == 1 is less aggressive than
the existing reduce_mv_pel_precision_highmotion == 2, in terms of
integer mv thresholds for various block sizes. The new level
reduces the mv pel precision to halfpel/fullpel based on
two related thresholds. It turns out that for cpu 10 rtc-derf,
reduce_mv_pel_precision_highmotion == 1 works out better.

The speed-up / quality trade off:
 --------------------------------------------------------------
|cpu | Testset | Instr. Count |    BD-Rate Drop (%)            |
|    |         | Reduction(%) | avg. psnr | ovr. psnr|  ssim   |
 --------------------------------------------------------------
|  9 | rtc     |    1.043     |  0.2093   |  0.2149  |  0.2319 |
| 10 | rtc_derf|   -0.797     | -0.5332   | -0.5256  | -0.6321 |
 --------------------------------------------------------------

No changes to speed 7,8
No changes to speed 9 rtc-derf, speed 10 rtc and rtc-screen sets

STATS_CHANGED for rt

Change-Id: I2cab3485f46dbaef6c5a6f74d86aff9d18fa7fa2