Various table updates to support 64x64 transforms
Includes:
Various table updates and fixes to support 64x64 transforms.
Entropymode updates to support tx_size expansion to 64x64.
tx_mode changes to support an ALLOW_64sXx64 transform mode.
Change-Id: Ib9098cfe27d0c015fe3be6ae13e7d09576771b9e
diff --git a/av1/common/common_data.h b/av1/common/common_data.h
index 50a423b..7341c09 100644
--- a/av1/common/common_data.h
+++ b/av1/common/common_data.h
@@ -309,12 +309,23 @@
TX_8X8, TX_8X8, TX_16X16,
// 16X32, 32X16, 32X32
TX_16X16, TX_16X16, TX_32X32,
- // 32X64, 64X32, 64X64
- TX_32X32, TX_32X32, TX_32X32,
+ // 32X64, 64X32,
+ TX_32X32, TX_32X32,
+#if CONFIG_TX64X64
+ // 64X64
+ TX_64X64,
+#if CONFIG_EXT_PARTITION
+ // 64x128, 128x64, 128x128
+ TX_64X64, TX_64X64, TX_64X64,
+#endif // CONFIG_EXT_PARTITION
+#else
+ // 64X64
+ TX_32X32,
#if CONFIG_EXT_PARTITION
// 64x128, 128x64, 128x128
TX_32X32, TX_32X32, TX_32X32,
#endif // CONFIG_EXT_PARTITION
+#endif // CONFIG_TX64X64
};
static const TX_SIZE max_txsize_rect_lookup[BLOCK_SIZES] = {
@@ -326,12 +337,23 @@
TX_8X16, TX_16X8, TX_16X16,
// 16X32, 32X16, 32X32
TX_16X32, TX_32X16, TX_32X32,
- // 32X64, 64X32, 64X64
- TX_32X32, TX_32X32, TX_32X32,
+ // 32X64, 64X32,
+ TX_32X32, TX_32X32,
+#if CONFIG_TX64X64
+ // 64X64
+ TX_64X64,
+#if CONFIG_EXT_PARTITION
+ // 64x128, 128x64, 128x128
+ TX_64X64, TX_64X64, TX_64X64,
+#endif // CONFIG_EXT_PARTITION
+#else
+ // 64X64
+ TX_32X32,
#if CONFIG_EXT_PARTITION
// 64x128, 128x64, 128x128
TX_32X32, TX_32X32, TX_32X32,
#endif // CONFIG_EXT_PARTITION
+#endif // CONFIG_TX64X64
};
// Same as "max_txsize_lookup[bsize] - TX_8X8", invalid for bsize < 8X8
@@ -344,12 +366,23 @@
TX_8X8 - TX_8X8, TX_8X8 - TX_8X8, TX_16X16 - TX_8X8,
// 16X32, 32X16, 32X32
TX_16X16 - TX_8X8, TX_16X16 - TX_8X8, TX_32X32 - TX_8X8,
- // 32X64, 64X32, 64X64
- TX_32X32 - TX_8X8, TX_32X32 - TX_8X8, TX_32X32 - TX_8X8,
+ // 32X64, 64X32,
+ TX_32X32 - TX_8X8, TX_32X32 - TX_8X8,
+#if CONFIG_TX64X64
+ // 64X64
+ TX_64X64 - TX_8X8,
+#if CONFIG_EXT_PARTITION
+ // 64x128, 128x64, 128x128
+ TX_64X64 - TX_8X8, TX_64X64 - TX_8X8, TX_64X64 - TX_8X8,
+#endif // CONFIG_EXT_PARTITION
+#else
+ // 64X64
+ TX_32X32 - TX_8X8,
#if CONFIG_EXT_PARTITION
// 64x128, 128x64, 128x128
TX_32X32 - TX_8X8, TX_32X32 - TX_8X8, TX_32X32 - TX_8X8,
#endif // CONFIG_EXT_PARTITION
+#endif // CONFIG_TX64X64
};
#if CONFIG_EXT_TX && CONFIG_RECT_TX
@@ -365,12 +398,23 @@
TX_16X16 - TX_8X8, TX_16X16 - TX_8X8, TX_16X16 - TX_8X8,
// 16X32, 32X16, 32X32
TX_32X32 - TX_8X8, TX_32X32 - TX_8X8, TX_32X32 - TX_8X8,
- // 32X64, 64X32, 64X64
- TX_32X32 - TX_8X8, TX_32X32 - TX_8X8, TX_32X32 - TX_8X8,
+ // 32X64, 64X32,
+ TX_32X32 - TX_8X8, TX_32X32 - TX_8X8,
+#if CONFIG_TX64X64
+ // 64X64
+ TX_64X64 - TX_8X8,
+#if CONFIG_EXT_PARTITION
+ // 64x128, 128x64, 128x128
+ TX_64X64 - TX_8X8, TX_64X64 - TX_8X8, TX_64X64 - TX_8X8,
+#endif // CONFIG_EXT_PARTITION
+#else
+ // 64X64
+ TX_32X32 - TX_8X8,
#if CONFIG_EXT_PARTITION
// 64x128, 128x64, 128x128
TX_32X32 - TX_8X8, TX_32X32 - TX_8X8, TX_32X32 - TX_8X8,
#endif // CONFIG_EXT_PARTITION
+#endif // CONFIG_TX64X64
};
#else
#define inter_tx_size_cat_lookup intra_tx_size_cat_lookup
@@ -386,6 +430,9 @@
TX_4X4, // TX_8X8
TX_8X8, // TX_16X16
TX_16X16, // TX_32X32
+#if CONFIG_TX64X64
+ TX_32X32, // TX_64X64
+#endif // CONFIG_TX64X64
TX_4X4, // TX_4X8
TX_4X4, // TX_8X4
TX_8X8, // TX_8X16
@@ -402,6 +449,9 @@
TX_8X8, // TX_8X8
TX_16X16, // TX_16X16
TX_32X32, // TX_32X32
+#if CONFIG_TX64X64
+ TX_64X64, // TX_64X64
+#endif // CONFIG_TX64X64
TX_4X4, // TX_4X8
TX_8X8, // TX_8X4
TX_8X8, // TX_8X16
@@ -418,6 +468,9 @@
TX_8X8, // TX_8X8
TX_16X16, // TX_16X16
TX_32X32, // TX_32X32
+#if CONFIG_TX64X64
+ TX_64X64, // TX_64X64
+#endif // CONFIG_TX64X64
TX_8X8, // TX_4X8
TX_4X4, // TX_8X4
TX_16X16, // TX_8X16
@@ -431,7 +484,11 @@
#if CONFIG_CB4X4
2,
#endif
- 4, 8, 16, 32, 4, 8, 8, 16, 16, 32,
+ 4, 8, 16, 32,
+#if CONFIG_TX64X64
+ 64,
+#endif // CONFIG_TX64X64
+ 4, 8, 8, 16, 16, 32,
};
// Transform block height in pixels
@@ -439,7 +496,11 @@
#if CONFIG_CB4X4
2,
#endif
- 4, 8, 16, 32, 8, 4, 16, 8, 32, 16,
+ 4, 8, 16, 32,
+#if CONFIG_TX64X64
+ 64,
+#endif // CONFIG_TX64X64
+ 8, 4, 16, 8, 32, 16,
};
// Transform block width in unit
@@ -447,7 +508,11 @@
#if CONFIG_CB4X4
1,
#endif
- 1, 2, 4, 8, 1, 2, 2, 4, 4, 8,
+ 1, 2, 4, 8,
+#if CONFIG_TX64X64
+ 16,
+#endif // CONFIG_TX64X64
+ 1, 2, 2, 4, 4, 8,
};
// Transform block height in unit
@@ -455,7 +520,11 @@
#if CONFIG_CB4X4
1,
#endif
- 1, 2, 4, 8, 2, 1, 4, 2, 8, 4,
+ 1, 2, 4, 8,
+#if CONFIG_TX64X64
+ 16,
+#endif // CONFIG_TX64X64
+ 2, 1, 4, 2, 8, 4,
};
// Transform block width in log2
@@ -463,7 +532,11 @@
#if CONFIG_CB4X4
2,
#endif
- 2, 3, 4, 5, 2, 3, 3, 4, 4, 5,
+ 2, 3, 4, 5,
+#if CONFIG_TX64X64
+ 6,
+#endif // CONFIG_TX64X64
+ 2, 3, 3, 4, 4, 5,
};
// Transform block height in log2
@@ -471,7 +544,11 @@
#if CONFIG_CB4X4
2,
#endif
- 2, 3, 4, 5, 3, 2, 4, 3, 5, 4,
+ 2, 3, 4, 5,
+#if CONFIG_TX64X64
+ 6,
+#endif // CONFIG_TX64X64
+ 3, 2, 4, 3, 5, 4,
};
static const int tx_size_2d[TX_SIZES_ALL] = {
@@ -485,10 +562,26 @@
32, 32, 128, 128, 512, 512,
};
-static const uint8_t tx_size_1d_log2[TX_SIZES] = { 2, 3, 4, 5 };
+static const uint8_t tx_size_1d_log2[TX_SIZES] = {
+#if CONFIG_CB4X4
+ 1,
+#endif
+ 2, 3, 4, 5,
+#if CONFIG_TX64X64
+ 6,
+#endif // CONFIG_TX64X64
+};
// TODO(jingning): Temporary table during the construction.
-static const int tx_size_1d_in_unit_log2[TX_SIZES] = { 0, 1, 2, 3 };
+static const int tx_size_1d_in_unit_log2[TX_SIZES] = {
+#if CONFIG_CB4X4
+ -1,
+#endif
+ 0, 1, 2, 3,
+#if CONFIG_TX64X64
+ 4,
+#endif // CONFIG_TX64X64
+};
static const BLOCK_SIZE txsize_to_bsize[TX_SIZES_ALL] = {
#if CONFIG_CB4X4
@@ -498,6 +591,9 @@
BLOCK_8X8, // TX_8X8
BLOCK_16X16, // TX_16X16
BLOCK_32X32, // TX_32X32
+#if CONFIG_TX64X64
+ BLOCK_64X64, // TX_64X64
+#endif // CONFIG_TX64X64
BLOCK_4X8, // TX_4X8
BLOCK_8X4, // TX_8X4
BLOCK_8X16, // TX_8X16
@@ -514,6 +610,9 @@
TX_8X8, // TX_8X8
TX_16X16, // TX_16X16
TX_32X32, // TX_32X32
+#if CONFIG_TX64X64
+ TX_64X64, // TX_64X64
+#endif // CONFIG_TX64X64
TX_4X4, // TX_4X8
TX_4X4, // TX_8X4
TX_8X8, // TX_8X16
@@ -530,6 +629,9 @@
TX_8X8, // TX_8X8
TX_16X16, // TX_16X16
TX_32X32, // TX_32X32
+#if CONFIG_TX64X64
+ TX_64X64, // TX_64X64
+#endif // CONFIG_TX64X64
TX_8X8, // TX_4X8
TX_8X8, // TX_8X4
TX_16X16, // TX_8X16
@@ -543,7 +645,12 @@
TX_8X8, // ALLOW_8X8
TX_16X16, // ALLOW_16X16
TX_32X32, // ALLOW_32X32
- TX_32X32, // TX_MODE_SELECT
+#if CONFIG_TX64X64
+ TX_64X64, // ALLOW_64X64
+ TX_64X64, // TX_MODE_SELECT
+#else
+ TX_32X32, // TX_MODE_SELECT
+#endif // CONFIG_TX64X64
};
static const BLOCK_SIZE ss_size_lookup[BLOCK_SIZES][2][2] = {
@@ -569,7 +676,6 @@
#endif // CONFIG_EXT_PARTITION
};
-#define USE_UV_RECT_TX 1
static const TX_SIZE uv_txsize_lookup[BLOCK_SIZES][TX_SIZES_ALL][2][2] = {
// ss_x == 0 ss_x == 0 ss_x == 1 ss_x == 1
// ss_y == 0 ss_y == 1 ss_y == 0 ss_y == 1
@@ -582,6 +688,9 @@
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
+#if CONFIG_TX64X64
+ { { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
+#endif // CONFIG_TX64X64
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
@@ -595,12 +704,15 @@
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
#endif
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
- { { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
- { { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
- { { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_4X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_4X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_4X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
+#if CONFIG_TX64X64
+ { { TX_4X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
+#endif // CONFIG_TX64X64
+ { { TX_4X8, TX_4X4 }, { TX_4X4, TX_4X4 } }, // used
+ { { TX_4X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
+ { { TX_4X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_4X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_4X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_4X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
@@ -611,12 +723,15 @@
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
#endif
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
- { { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
- { { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
- { { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_8X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_8X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_8X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
+#if CONFIG_TX64X64
+ { { TX_8X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
+#endif // CONFIG_TX64X64
+ { { TX_8X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
+ { { TX_8X4, TX_4X4 }, { TX_4X4, TX_4X4 } }, // used
+ { { TX_8X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_8X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_8X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_8X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
@@ -628,8 +743,11 @@
#endif
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_8X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
- { { TX_8X8, TX_8X8 }, { TX_4X4, TX_4X4 } },
- { { TX_8X8, TX_8X8 }, { TX_4X4, TX_4X4 } },
+ { { TX_8X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
+ { { TX_8X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
+#if CONFIG_TX64X64
+ { { TX_8X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X4 }, { TX_4X8, TX_4X4 } },
{ { TX_8X4, TX_8X4 }, { TX_4X4, TX_4X4 } },
{ { TX_8X8, TX_8X4 }, { TX_4X8, TX_4X4 } },
@@ -646,9 +764,12 @@
{ { TX_8X8, TX_8X8 }, { TX_4X4, TX_4X4 } },
{ { TX_8X8, TX_8X8 }, { TX_4X4, TX_4X4 } },
{ { TX_8X8, TX_8X8 }, { TX_4X4, TX_4X4 } },
+#if CONFIG_TX64X64
+ { { TX_8X8, TX_8X8 }, { TX_4X4, TX_4X4 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X4, TX_8X4 }, { TX_4X4, TX_4X4 } },
- { { TX_8X16, TX_8X8 }, { TX_4X8, TX_4X8 } },
+ { { TX_8X16, TX_8X8 }, { TX_4X8, TX_4X8 } }, // used
{ { TX_8X16, TX_8X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X16, TX_8X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X16, TX_8X8 }, { TX_4X8, TX_4X8 } },
@@ -660,12 +781,15 @@
#endif
{ { TX_4X4, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_8X8, TX_4X4 }, { TX_8X8, TX_4X4 } },
- { { TX_8X8, TX_4X4 }, { TX_8X8, TX_8X8 } },
- { { TX_8X8, TX_4X4 }, { TX_8X8, TX_8X8 } },
+ { { TX_8X8, TX_4X4 }, { TX_8X8, TX_4X4 } },
+ { { TX_8X8, TX_4X4 }, { TX_8X8, TX_4X4 } },
+#if CONFIG_TX64X64
+ { { TX_8X8, TX_4X4 }, { TX_8X8, TX_4X4 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X4 }, { TX_4X8, TX_4X4 } },
{ { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
{ { TX_16X8, TX_8X4 }, { TX_8X8, TX_8X4 } },
- { { TX_16X8, TX_8X4 }, { TX_8X8, TX_8X4 } },
+ { { TX_16X8, TX_8X4 }, { TX_8X8, TX_8X4 } }, // used
{ { TX_16X8, TX_8X4 }, { TX_8X8, TX_8X4 } },
{ { TX_16X8, TX_8X4 }, { TX_8X8, TX_8X4 } },
},
@@ -678,6 +802,9 @@
{ { TX_8X8, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_8X8 }, { TX_8X8, TX_8X8 } },
+#if CONFIG_TX64X64
+ { { TX_16X16, TX_8X8 }, { TX_8X8, TX_8X8 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
{ { TX_8X16, TX_8X8 }, { TX_8X16, TX_8X8 } },
@@ -694,11 +821,14 @@
{ { TX_8X8, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_16X16 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_16X16 }, { TX_8X8, TX_8X8 } },
+#if CONFIG_TX64X64
+ { { TX_16X16, TX_16X16 }, { TX_8X8, TX_8X8 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
{ { TX_8X16, TX_8X16 }, { TX_8X16, TX_8X16 } },
{ { TX_16X8, TX_16X8 }, { TX_8X8, TX_8X8 } },
- { { TX_16X32, TX_16X16 }, { TX_8X16, TX_8X16 } },
+ { { TX_16X32, TX_16X16 }, { TX_8X16, TX_8X16 } }, // used
{ { TX_16X32, TX_16X16 }, { TX_8X16, TX_8X16 } },
},
{
@@ -710,12 +840,15 @@
{ { TX_8X8, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_8X8 }, { TX_16X16, TX_8X8 } },
{ { TX_16X16, TX_8X8 }, { TX_16X16, TX_8X8 } },
+#if CONFIG_TX64X64
+ { { TX_16X16, TX_8X8 }, { TX_16X16, TX_8X8 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
{ { TX_8X16, TX_8X8 }, { TX_8X16, TX_8X8 } },
{ { TX_16X8, TX_16X8 }, { TX_16X8, TX_16X8 } },
{ { TX_32X16, TX_16X8 }, { TX_16X16, TX_16X8 } },
- { { TX_32X16, TX_16X8 }, { TX_16X16, TX_16X8 } },
+ { { TX_32X16, TX_16X8 }, { TX_16X16, TX_16X8 } }, // used
},
{
// BLOCK_32X32
@@ -726,6 +859,9 @@
{ { TX_8X8, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_16X16 }, { TX_16X16, TX_16X16 } },
{ { TX_32X32, TX_16X16 }, { TX_16X16, TX_16X16 } },
+#if CONFIG_TX64X64
+ { { TX_32X32, TX_16X16 }, { TX_16X16, TX_16X16 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
{ { TX_8X16, TX_8X16 }, { TX_8X16, TX_8X16 } },
@@ -742,6 +878,9 @@
{ { TX_8X8, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_16X16 }, { TX_16X16, TX_16X16 } },
{ { TX_32X32, TX_32X32 }, { TX_16X16, TX_16X16 } },
+#if CONFIG_TX64X64
+ { { TX_32X32, TX_32X32 }, { TX_16X16, TX_16X16 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
{ { TX_8X16, TX_8X16 }, { TX_8X16, TX_8X16 } },
@@ -758,6 +897,9 @@
{ { TX_8X8, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_16X16 }, { TX_16X16, TX_16X16 } },
{ { TX_32X32, TX_16X16 }, { TX_32X32, TX_16X16 } },
+#if CONFIG_TX64X64
+ { { TX_32X32, TX_16X16 }, { TX_32X32, TX_16X16 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
{ { TX_8X16, TX_8X16 }, { TX_8X16, TX_8X16 } },
@@ -774,8 +916,17 @@
{ { TX_8X8, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_16X16 }, { TX_16X16, TX_16X16 } },
{ { TX_32X32, TX_32X32 }, { TX_32X32, TX_32X32 } },
-#if CONFIG_EXT_PARTITION
+#if CONFIG_TX64X64
+ { { TX_64X64, TX_32X32 }, { TX_32X32, TX_32X32 } },
+#endif // CONFIG_TX64X64
+ { { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
+ { { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
+ { { TX_8X16, TX_8X16 }, { TX_8X16, TX_8X16 } },
+ { { TX_16X8, TX_16X8 }, { TX_16X8, TX_16X8 } },
+ { { TX_16X32, TX_16X32 }, { TX_16X32, TX_16X32 } },
+ { { TX_32X16, TX_32X16 }, { TX_32X16, TX_16X16 } },
},
+#if CONFIG_EXT_PARTITION
{
// BLOCK_64X128
#if CONFIG_CB4X4
@@ -785,6 +936,9 @@
{ { TX_8X8, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_16X16 }, { TX_16X16, TX_16X16 } },
{ { TX_32X32, TX_32X32 }, { TX_32X32, TX_32X32 } },
+#if CONFIG_TX64X64
+ { { TX_64X64, TX_64X64 }, { TX_32X32, TX_32X32 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
{ { TX_8X16, TX_8X16 }, { TX_8X16, TX_8X16 } },
@@ -801,6 +955,9 @@
{ { TX_8X8, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_16X16 }, { TX_16X16, TX_16X16 } },
{ { TX_32X32, TX_32X32 }, { TX_32X32, TX_32X32 } },
+#if CONFIG_TX64X64
+ { { TX_64X64, TX_32X32 }, { TX_64X64, TX_32X32 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
{ { TX_8X16, TX_8X16 }, { TX_8X16, TX_8X16 } },
@@ -817,14 +974,17 @@
{ { TX_8X8, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_16X16, TX_16X16 }, { TX_16X16, TX_16X16 } },
{ { TX_32X32, TX_32X32 }, { TX_32X32, TX_32X32 } },
+#if CONFIG_TX64X64
+ { { TX_64X64, TX_64X64 }, { TX_64X64, TX_64X64 } },
+#endif // CONFIG_TX64X64
{ { TX_4X8, TX_4X8 }, { TX_4X8, TX_4X8 } },
{ { TX_8X4, TX_8X4 }, { TX_8X4, TX_8X4 } },
{ { TX_8X16, TX_8X16 }, { TX_8X16, TX_8X16 } },
{ { TX_16X8, TX_16X8 }, { TX_16X8, TX_16X8 } },
{ { TX_16X32, TX_16X32 }, { TX_16X32, TX_16X32 } },
{ { TX_32X16, TX_32X16 }, { TX_32X16, TX_32X16 } },
-#endif // CONFIG_EXT_PARTITION
},
+#endif // CONFIG_EXT_PARTITION
};
// Generates 4 bit field in which each bit set to 1 represents
@@ -879,6 +1039,9 @@
{ { TX_8X8, TX_4X4 }, { TX_4X4, TX_4X4 } },
{ { TX_16X16, TX_8X8 }, { TX_8X8, TX_8X8 } },
{ { TX_32X32, TX_16X16 }, { TX_16X16, TX_16X16 } },
+#if CONFIG_TX64X64
+ { { TX_64X64, TX_32X32 }, { TX_32X32, TX_32X32 } },
+#endif // CONFIG_TX64X64
};
#if CONFIG_EXT_PARTITION_TYPES
diff --git a/av1/common/entropymode.c b/av1/common/entropymode.c
index b9dc812..ed9d39d 100644
--- a/av1/common/entropymode.c
+++ b/av1/common/entropymode.c
@@ -938,6 +938,10 @@
// Max tx_size is 32X32
-0, 2, -1, 4, -2, -3,
},
+#if CONFIG_TX64X64
+ { // Max tx_size is 64X64
+ -0, 2, -1, 4, -2, 6, -3, -4 },
+#endif // CONFIG_TX64X64
};
static const aom_prob default_tx_size_prob[MAX_TX_DEPTH][TX_SIZE_CONTEXTS]
@@ -957,6 +961,13 @@
{ 3, 136, 37 },
{ 5, 52, 13 },
},
+#if CONFIG_TX64X64
+ {
+ // Max tx_size is 64X64
+ { 1, 64, 136, 127 },
+ { 1, 32, 52, 67 },
+ },
+#endif // CONFIG_TX64X64
};
#if CONFIG_LOOP_RESTORATION
diff --git a/av1/common/enums.h b/av1/common/enums.h
index f2f0b11..e33f6b1 100644
--- a/av1/common/enums.h
+++ b/av1/common/enums.h
@@ -173,12 +173,15 @@
// frame transform mode
typedef enum {
- ONLY_4X4 = 0, // only 4x4 transform used
- ALLOW_8X8 = 1, // allow block transform size up to 8x8
- ALLOW_16X16 = 2, // allow block transform size up to 16x16
- ALLOW_32X32 = 3, // allow block transform size up to 32x32
- TX_MODE_SELECT = 4, // transform specified for each block
- TX_MODES = 5,
+ ONLY_4X4 = 0, // only 4x4 transform used
+ ALLOW_8X8 = 1, // allow block transform size up to 8x8
+ ALLOW_16X16 = 2, // allow block transform size up to 16x16
+ ALLOW_32X32 = 3, // allow block transform size up to 32x32
+#if CONFIG_TX64X64
+ ALLOW_64X64 = 4, // allow block transform size up to 64x64
+#endif
+ TX_MODE_SELECT, // transform specified for each block
+ TX_MODES,
} TX_MODE;
// 1D tx types
diff --git a/av1/decoder/decodeframe.c b/av1/decoder/decodeframe.c
index 5edc851..f93a425 100644
--- a/av1/decoder/decodeframe.c
+++ b/av1/decoder/decodeframe.c
@@ -122,7 +122,14 @@
}
static TX_MODE read_tx_mode(struct aom_read_bit_buffer *rb) {
+#if CONFIG_TX64X64
+ TX_MODE tx_mode =
+ aom_rb_read_bit(rb) ? TX_MODE_SELECT : aom_rb_read_literal(rb, 2);
+ if (tx_mode == ALLOW_32X32) tx_mode += aom_rb_read_bit(rb);
+ return tx_mode;
+#else
return aom_rb_read_bit(rb) ? TX_MODE_SELECT : aom_rb_read_literal(rb, 2);
+#endif // CONFIG_TX64X64
}
static void read_tx_size_probs(FRAME_CONTEXT *fc, aom_reader *r) {
diff --git a/av1/encoder/bitstream.c b/av1/encoder/bitstream.c
index 712c00f..2c64880 100644
--- a/av1/encoder/bitstream.c
+++ b/av1/encoder/bitstream.c
@@ -3166,9 +3166,17 @@
}
#endif
-static void write_txfm_mode(TX_MODE mode, struct aom_write_bit_buffer *wb) {
+static void write_tx_mode(TX_MODE mode, struct aom_write_bit_buffer *wb) {
+#if CONFIG_TX64X64
+ aom_wb_write_bit(wb, mode == TX_MODE_SELECT);
+ if (mode != TX_MODE_SELECT) {
+ aom_wb_write_literal(wb, AOMMIN(mode, ALLOW_32X32), 2);
+ if (mode >= ALLOW_32X32) aom_wb_write_bit(wb, mode == ALLOW_64X64);
+ }
+#else
aom_wb_write_bit(wb, mode == TX_MODE_SELECT);
if (mode != TX_MODE_SELECT) aom_wb_write_literal(wb, mode, 2);
+#endif // CONFIG_TX64X64
}
static void update_txfm_probs(AV1_COMMON *cm, aom_writer *w,
@@ -3949,7 +3957,7 @@
if (!cm->seg.enabled && xd->lossless[0])
cm->tx_mode = ONLY_4X4;
else
- write_txfm_mode(cm->tx_mode, wb);
+ write_tx_mode(cm->tx_mode, wb);
if (cpi->allow_comp_inter_inter) {
const int use_hybrid_pred = cm->reference_mode == REFERENCE_MODE_SELECT;
diff --git a/av1/encoder/encodeframe.c b/av1/encoder/encodeframe.c
index 4de60ef..10595a5 100644
--- a/av1/encoder/encodeframe.c
+++ b/av1/encoder/encodeframe.c
@@ -4479,7 +4479,7 @@
static TX_MODE select_tx_mode(const AV1_COMP *cpi, MACROBLOCKD *const xd) {
if (xd->lossless[0]) return ONLY_4X4;
if (cpi->sf.tx_size_search_method == USE_LARGESTALL)
- return ALLOW_32X32;
+ return ALLOW_32X32 + CONFIG_TX64X64;
else if (cpi->sf.tx_size_search_method == USE_FULL_RD ||
cpi->sf.tx_size_search_method == USE_TX_8X8)
return TX_MODE_SELECT;
@@ -5061,9 +5061,97 @@
#if CONFIG_VAR_TX
if (cm->tx_mode == TX_MODE_SELECT && cpi->td.mb.txb_split_count == 0)
- cm->tx_mode = ALLOW_32X32;
+ cm->tx_mode = ALLOW_32X32 + CONFIG_TX64X64;
#else
if (cm->tx_mode == TX_MODE_SELECT) {
+#if CONFIG_TX64X64
+ int count4x4 = 0;
+ int count8x8_8x8p = 0, count8x8_lp = 0;
+ int count16x16_16x16p = 0, count16x16_lp = 0;
+ int count32x32_32x32p = 0, count32x32_lp = 0;
+ int count64x64_64x64p = 0;
+ for (i = 0; i < TX_SIZE_CONTEXTS; ++i) {
+ // counts->tx_size[max_depth][context_idx][this_depth_level]
+ count4x4 += counts->tx_size[0][i][0];
+ count4x4 += counts->tx_size[1][i][0];
+ count4x4 += counts->tx_size[2][i][0];
+ count4x4 += counts->tx_size[3][i][0];
+
+ count8x8_8x8p += counts->tx_size[0][i][1];
+ count8x8_lp += counts->tx_size[1][i][1];
+ count8x8_lp += counts->tx_size[2][i][1];
+ count8x8_lp += counts->tx_size[3][i][1];
+
+ count16x16_16x16p += counts->tx_size[1][i][2];
+ count16x16_lp += counts->tx_size[2][i][2];
+ count16x16_lp += counts->tx_size[3][i][2];
+
+ count32x32_32x32p += counts->tx_size[2][i][3];
+ count32x32_lp += counts->tx_size[3][i][3];
+
+ count64x64_64x64p += counts->tx_size[3][i][4];
+ }
+#if CONFIG_EXT_TX && CONFIG_RECT_TX
+ count4x4 += counts->tx_size_implied[0][TX_4X4];
+ count4x4 += counts->tx_size_implied[1][TX_4X4];
+ count4x4 += counts->tx_size_implied[2][TX_4X4];
+ count4x4 += counts->tx_size_implied[3][TX_4X4];
+ count8x8_8x8p += counts->tx_size_implied[1][TX_8X8];
+ count8x8_lp += counts->tx_size_implied[2][TX_8X8];
+ count8x8_lp += counts->tx_size_implied[3][TX_8X8];
+ count8x8_lp += counts->tx_size_implied[4][TX_8X8];
+ count16x16_16x16p += counts->tx_size_implied[2][TX_16X16];
+ count16x16_lp += counts->tx_size_implied[3][TX_16X16];
+ count16x16_lp += counts->tx_size_implied[4][TX_16X16];
+ count32x32_32x32p += counts->tx_size_implied[3][TX_32X32];
+ count32x32_lp += counts->tx_size_implied[4][TX_32X32];
+ count64x64_64x64p += counts->tx_size[4][TX_64X64];
+#endif // CONFIG_EXT_TX && CONFIG_RECT_TX
+ if (count4x4 == 0 && count16x16_lp == 0 && count16x16_16x16p == 0 &&
+ count32x32_lp == 0 && count32x32_32x32p == 0 &&
+#if CONFIG_SUPERTX
+ cm->counts.supertx_size[TX_16X16] == 0 &&
+ cm->counts.supertx_size[TX_32X32] == 0 &&
+ cm->counts.supertx_size[TX_64X64] == 0 &&
+#endif
+ count64x64_64x64p == 0) {
+ cm->tx_mode = ALLOW_8X8;
+ reset_skip_tx_size(cm, TX_8X8);
+ } else if (count8x8_8x8p == 0 && count8x8_lp == 0 &&
+ count16x16_16x16p == 0 && count16x16_lp == 0 &&
+ count32x32_32x32p == 0 && count32x32_lp == 0 &&
+#if CONFIG_SUPERTX
+ cm->counts.supertx_size[TX_8X8] == 0 &&
+ cm->counts.supertx_size[TX_16X16] == 0 &&
+ cm->counts.supertx_size[TX_32X32] == 0 &&
+ cm->counts.supertx_size[TX_64X64] == 0 &&
+#endif
+ count64x64_64x64p == 0) {
+ cm->tx_mode = ONLY_4X4;
+ reset_skip_tx_size(cm, TX_4X4);
+ } else if (count4x4 == 0 && count8x8_lp == 0 && count16x16_lp == 0 &&
+ count32x32_lp == 0) {
+ cm->tx_mode = ALLOW_64X64;
+ } else if (count4x4 == 0 && count8x8_lp == 0 && count16x16_lp == 0 &&
+#if CONFIG_SUPERTX
+ cm->counts.supertx_size[TX_64X64] == 0 &&
+#endif
+ count64x64_64x64p == 0) {
+ cm->tx_mode = ALLOW_32X32;
+ reset_skip_tx_size(cm, TX_32X32);
+ } else if (count4x4 == 0 && count8x8_lp == 0 && count32x32_lp == 0 &&
+ count32x32_32x32p == 0 &&
+#if CONFIG_SUPERTX
+ cm->counts.supertx_size[TX_32X32] == 0 &&
+ cm->counts.supertx_size[TX_64X64] == 0 &&
+#endif
+ count64x64_64x64p == 0) {
+ cm->tx_mode = ALLOW_16X16;
+ reset_skip_tx_size(cm, TX_16X16);
+ }
+
+#else // CONFIG_TX64X64
+
int count4x4 = 0;
int count8x8_lp = 0, count8x8_8x8p = 0;
int count16x16_16x16p = 0, count16x16_lp = 0;
@@ -5074,9 +5162,9 @@
count4x4 += counts->tx_size[1][i][0];
count4x4 += counts->tx_size[2][i][0];
+ count8x8_8x8p += counts->tx_size[0][i][1];
count8x8_lp += counts->tx_size[1][i][1];
count8x8_lp += counts->tx_size[2][i][1];
- count8x8_8x8p += counts->tx_size[0][i][1];
count16x16_16x16p += counts->tx_size[1][i][2];
count16x16_lp += counts->tx_size[2][i][2];
@@ -5087,9 +5175,9 @@
count4x4 += counts->tx_size_implied[1][TX_4X4];
count4x4 += counts->tx_size_implied[2][TX_4X4];
count4x4 += counts->tx_size_implied[3][TX_4X4];
+ count8x8_8x8p += counts->tx_size_implied[1][TX_8X8];
count8x8_lp += counts->tx_size_implied[2][TX_8X8];
count8x8_lp += counts->tx_size_implied[3][TX_8X8];
- count8x8_8x8p += counts->tx_size_implied[1][TX_8X8];
count16x16_lp += counts->tx_size_implied[3][TX_16X16];
count16x16_16x16p += counts->tx_size_implied[2][TX_16X16];
count32x32 += counts->tx_size_implied[3][TX_32X32];
@@ -5122,6 +5210,7 @@
cm->tx_mode = ALLOW_16X16;
reset_skip_tx_size(cm, TX_16X16);
}
+#endif // CONFIG_TX64X64
}
#endif
} else {
