Move the contents of clpf_simd_kernels.h to clpf_simd.h

The only reason for clpf_simd_kernels.h was to share the contents with
clpf_rdo_simd.h and clpf_simd.h, but clpf_rdo_simd.h is now removed.

Change-Id: I9132b2f397101069ab7d04065a215c662985e6ce
diff --git a/av1/common/clpf_simd.h b/av1/common/clpf_simd.h
index eb81a25..664ab6b 100644
--- a/av1/common/clpf_simd.h
+++ b/av1/common/clpf_simd.h
@@ -12,7 +12,54 @@
 #include "./av1_rtcd.h"
 #include "aom_ports/mem.h"
 #include "aom_ports/bitops.h"
-#include "av1/common/clpf_simd_kernel.h"
+
+// sign(a - b) * max(0, abs(a - b) - max(0, abs(a - b) -
+// strength + (abs(a - b) >> (5 - log2(s)))))
+SIMD_INLINE v128 constrain(v128 a, v128 b, unsigned int strength,
+                           unsigned int damping) {
+  const v128 diff = v128_sub_8(v128_max_u8(a, b), v128_min_u8(a, b));
+  const v128 sign = v128_cmpeq_8(v128_min_u8(a, b), a);  // -(a <= b)
+  const v128 s = v128_ssub_u8(v128_dup_8(strength),
+                              v128_shr_u8(diff, damping - get_msb(strength)));
+  return v128_sub_8(v128_xor(sign, v128_ssub_u8(diff, v128_ssub_u8(diff, s))),
+                    sign);
+}
+
+// delta = 1/16 * constrain(a, x, s) + 3/16 * constrain(b, x, s) +
+//         1/16 * constrain(c, x, s) + 3/16 * constrain(d, x, s) +
+//         3/16 * constrain(e, x, s) + 1/16 * constrain(f, x, s) +
+//         3/16 * constrain(g, x, s) + 1/16 * constrain(h, x, s)
+SIMD_INLINE v128 calc_delta(v128 x, v128 a, v128 b, v128 c, v128 d, v128 e,
+                            v128 f, v128 g, v128 h, unsigned int s,
+                            unsigned int dmp) {
+  const v128 bdeg =
+      v128_add_8(v128_add_8(constrain(b, x, s, dmp), constrain(d, x, s, dmp)),
+                 v128_add_8(constrain(e, x, s, dmp), constrain(g, x, s, dmp)));
+  const v128 delta = v128_add_8(
+      v128_add_8(v128_add_8(constrain(a, x, s, dmp), constrain(c, x, s, dmp)),
+                 v128_add_8(constrain(f, x, s, dmp), constrain(h, x, s, dmp))),
+      v128_add_8(v128_add_8(bdeg, bdeg), bdeg));
+  return v128_add_8(
+      x, v128_shr_s8(
+             v128_add_8(v128_dup_8(8),
+                        v128_add_8(delta, v128_cmplt_s8(delta, v128_zero()))),
+             4));
+}
+
+// delta = 1/8 * constrain(a, x, s) + 3/8 * constrain(b, x, s) +
+//         3/8 * constrain(c, x, s) + 1/8 * constrain(d, x, s) +
+SIMD_INLINE v128 calc_hdelta(v128 x, v128 a, v128 b, v128 c, v128 d,
+                             unsigned int s, unsigned int dmp) {
+  const v128 bc = v128_add_8(constrain(b, x, s, dmp), constrain(c, x, s, dmp));
+  const v128 delta =
+      v128_add_8(v128_add_8(constrain(a, x, s, dmp), constrain(d, x, s, dmp)),
+                 v128_add_8(v128_add_8(bc, bc), bc));
+  return v128_add_8(
+      x, v128_shr_s8(
+             v128_add_8(v128_dup_8(4),
+                        v128_add_8(delta, v128_cmplt_s8(delta, v128_zero()))),
+             3));
+}
 
 // Process blocks of width 8, two lines at a time, 8 bit.
 static void clpf_block8(uint8_t *dst, const uint16_t *src, int dstride,