commit 4d6ea54e3f8790db4a1f681e1ba0d263f1035505
author Luc Trudeau <luc@trud.ca> Wed Nov 22 21:24:42 2017 -0500
committer David Michael Barr <b@rr-dav.id.au> Tue Dec 05 23:35:42 2017 +0000
tree 57979712a9d0528f2e383206432f6a5d528a2bca
parent daccae3c0d2ce6c58c4397dbbd74caae18923572

[CFL] Disable CfL for 4:1 and 1:4 Partitions

Moving CfL to using partition unit DC_PRED requires 4:1 and 1:4 DC_PRED,
which are not currently implemented. A simple solution is to disable CfL
for 4:1 and 1:4 partitions.

CfL is also disabled for luma intra partitions < 4x4. This is inherent
to luma intra prediction partition sizes. We add an assert to enforce
this.

Resulting in the following regression for Subset1
   PSNR | PSNR Cb | PSNR Cr | PSNR HVS |   SSIM | MS SSIM | CIEDE 2000
-0.0093 |  0.1803 |  0.1519 |  -0.0180 | 0.0256 |  0.0226 |     0.0352

https://two.arewecompressedyet.com/?job=CfL%402017-11-30T19%3A05%3A05.639Z&job=CfL-Disable-4to1%402017-11-30T19%3A04%3A00.761Z

Change-Id: Ie2c8b4d9cb6b6f33a103b540209e1a2fb6df74a7

av1/encoder/bitstream.c

diff --git a/av1/encoder/bitstream.c b/av1/encoder/bitstream.c
index e4f1fec..26bc975 100644
--- a/av1/encoder/bitstream.c
+++ b/av1/encoder/bitstream.c
@@ -1359,6 +1359,12 @@
 
 #if CONFIG_CFL
       if (mbmi->uv_mode == UV_CFL_PRED) {
+        if (!is_cfl_allowed(mbmi)) {
+          aom_internal_error(
+              &cm->error, AOM_CODEC_UNSUP_BITSTREAM,
+              "Chroma from Luma (CfL) cannot be signaled for a %dx%d block.",
+              block_size_wide[bsize], block_size_high[bsize]);
+        }
         write_cfl_alphas(ec_ctx, mbmi->cfl_alpha_idx, mbmi->cfl_alpha_signs, w);
       }
 #endif
@@ -1658,6 +1664,12 @@
 
 #if CONFIG_CFL
     if (mbmi->uv_mode == UV_CFL_PRED) {
+      if (!is_cfl_allowed(mbmi)) {
+        aom_internal_error(
+            &cm->error, AOM_CODEC_UNSUP_BITSTREAM,
+            "Chroma from Luma (CfL) cannot be signaled for a %dx%d block.",
+            block_size_wide[bsize], block_size_high[bsize]);
+      }
       write_cfl_alphas(ec_ctx, mbmi->cfl_alpha_idx, mbmi->cfl_alpha_signs, w);
     }
 #endif

av1/encoder/rdopt.c

diff --git a/av1/encoder/rdopt.c b/av1/encoder/rdopt.c
index 27806ab..ed7869b 100644
--- a/av1/encoder/rdopt.c
+++ b/av1/encoder/rdopt.c
@@ -5498,6 +5498,7 @@
 #if CONFIG_CFL
     int cfl_alpha_rate = 0;
     if (mode == UV_CFL_PRED) {
+      if (!is_cfl_allowed(mbmi)) continue;
       assert(!is_directional_mode);
       const TX_SIZE uv_tx_size = av1_get_uv_tx_size(mbmi, &xd->plane[1]);
       cfl_alpha_rate = cfl_rd_pick_alpha(x, cpi, bsize, uv_tx_size, best_rd);
@@ -5529,6 +5530,7 @@
 
 #if CONFIG_CFL
     if (mode == UV_CFL_PRED) {
+      assert(is_cfl_allowed(mbmi));
       this_rate += cfl_alpha_rate;
 #if CONFIG_DEBUG
       assert(xd->cfl.rate == this_rate);