Add new MRC_DCT tx type
This adds the new transform to the list of possible transforms.
The impact on performance is in the noise range because the transform
implementation currently performs DCT as a placeholder. This transform
will initially only have an implementation for TX_32X32 and it is
skipped in the tx search for smaller transform sizes.
Change-Id: Iab2faddc525b478ca06972a753428a4f4ef53ac6
diff --git a/av1/common/blockd.h b/av1/common/blockd.h
index dfa0b9c..b3838de 100644
--- a/av1/common/blockd.h
+++ b/av1/common/blockd.h
@@ -797,18 +797,50 @@
// DCT only
EXT_TX_SET_DCTONLY = 0,
// DCT + Identity only
- EXT_TX_SET_DCT_IDTX = 1,
+ EXT_TX_SET_DCT_IDTX,
+#if CONFIG_MRC_TX
+ // DCT + MRC_DCT
+ EXT_TX_SET_MRC_DCT,
+ // DCT + MRC_DCT + IDTX
+ EXT_TX_SET_MRC_DCT_IDTX,
+#endif // CONFIG_MRC_TX
// Discrete Trig transforms w/o flip (4) + Identity (1)
- EXT_TX_SET_DTT4_IDTX = 2,
+ EXT_TX_SET_DTT4_IDTX,
// Discrete Trig transforms w/o flip (4) + Identity (1) + 1D Hor/vert DCT (2)
- EXT_TX_SET_DTT4_IDTX_1DDCT = 3,
+ EXT_TX_SET_DTT4_IDTX_1DDCT,
// Discrete Trig transforms w/ flip (9) + Identity (1) + 1D Hor/Ver DCT (2)
- EXT_TX_SET_DTT9_IDTX_1DDCT = 4,
+ EXT_TX_SET_DTT9_IDTX_1DDCT,
// Discrete Trig transforms w/ flip (9) + Identity (1) + 1D Hor/Ver (6)
- EXT_TX_SET_ALL16 = 5,
+ EXT_TX_SET_ALL16,
EXT_TX_SET_TYPES
} TxSetType;
+#if CONFIG_MRC_TX
+// Number of transform types in each set type
+static const int num_ext_tx_set[EXT_TX_SET_TYPES] = {
+ 1, 2, 2, 3, 5, 7, 12, 16
+};
+
+// Maps intra set index to the set type
+static const int ext_tx_set_type_intra[EXT_TX_SETS_INTRA] = {
+ EXT_TX_SET_DCTONLY, EXT_TX_SET_DTT4_IDTX_1DDCT, EXT_TX_SET_DTT4_IDTX,
+ EXT_TX_SET_MRC_DCT
+};
+
+// Maps inter set index to the set type
+static const int ext_tx_set_type_inter[EXT_TX_SETS_INTER] = {
+ EXT_TX_SET_DCTONLY, EXT_TX_SET_ALL16, EXT_TX_SET_DTT9_IDTX_1DDCT,
+ EXT_TX_SET_DCT_IDTX, EXT_TX_SET_MRC_DCT_IDTX
+};
+
+// Maps set types above to the indices used for intra
+static const int ext_tx_set_index_intra[EXT_TX_SET_TYPES] = { 0, -1, 3, -1,
+ 2, 1, -1, -1 };
+
+// Maps set types above to the indices used for inter
+static const int ext_tx_set_index_inter[EXT_TX_SET_TYPES] = { 0, 3, -1, 4,
+ -1, -1, 2, 1 };
+#else // CONFIG_MRC_TX
// Number of transform types in each set type
static const int num_ext_tx_set[EXT_TX_SET_TYPES] = { 1, 2, 5, 7, 12, 16 };
@@ -831,6 +863,7 @@
static const int ext_tx_set_index_inter[EXT_TX_SET_TYPES] = {
0, 3, -1, -1, 2, 1
};
+#endif // CONFIG_MRC_TX
static INLINE TxSetType get_ext_tx_set_type(TX_SIZE tx_size, BLOCK_SIZE bs,
int is_inter, int use_reduced_set) {
@@ -844,6 +877,10 @@
#endif
if (use_reduced_set)
return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DTT4_IDTX;
+#if CONFIG_MRC_TX
+ if (tx_size == TX_32X32)
+ return is_inter ? EXT_TX_SET_MRC_DCT_IDTX : EXT_TX_SET_MRC_DCT;
+#endif // CONFIG_MRC_TX
if (tx_size_sqr_up == TX_32X32)
return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DCTONLY;
if (is_inter)
@@ -862,6 +899,63 @@
: ext_tx_set_index_intra[set_type];
}
+#if CONFIG_MRC_TX
+static const int use_intra_ext_tx_for_txsize[EXT_TX_SETS_INTRA][EXT_TX_SIZES] =
+ {
+#if CONFIG_CHROMA_2X2
+ { 1, 1, 1, 1, 1 }, // unused
+ { 0, 1, 1, 0, 0 },
+ { 0, 0, 0, 1, 0 },
+ { 0, 0, 0, 0, 1 },
+#else
+ { 1, 1, 1, 1 }, // unused
+ { 1, 1, 0, 0 },
+ { 0, 0, 1, 0 },
+ { 0, 0, 0, 1 },
+#endif // CONFIG_CHROMA_2X2
+ };
+
+static const int use_inter_ext_tx_for_txsize[EXT_TX_SETS_INTER][EXT_TX_SIZES] =
+ {
+#if CONFIG_CHROMA_2X2
+ { 1, 1, 1, 1, 1 }, // unused
+ { 0, 1, 1, 0, 0 }, { 0, 0, 0, 1, 0 },
+ { 0, 0, 0, 0, 1 }, { 0, 0, 0, 0, 1 },
+#else
+ { 1, 1, 1, 1 }, // unused
+ { 1, 1, 0, 0 }, { 0, 0, 1, 0 }, { 0, 0, 0, 1 }, { 0, 0, 0, 1 },
+#endif // CONFIG_CHROMA_2X2
+ };
+
+// Transform types used in each intra set
+static const int ext_tx_used_intra[EXT_TX_SETS_INTRA][TX_TYPES] = {
+ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0 },
+ { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 },
+ { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1 },
+};
+
+// Numbers of transform types used in each intra set
+static const int ext_tx_cnt_intra[EXT_TX_SETS_INTRA] = { 1, 7, 5, 2 };
+
+// Transform types used in each inter set
+static const int ext_tx_used_inter[EXT_TX_SETS_INTER][TX_TYPES] = {
+ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 },
+ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0 },
+ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 },
+ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1 },
+};
+
+// Numbers of transform types used in each inter set
+static const int ext_tx_cnt_inter[EXT_TX_SETS_INTER] = { 1, 16, 12, 2, 3 };
+
+// 1D Transforms used in inter set, this needs to be changed if
+// ext_tx_used_inter is changed
+static const int ext_tx_used_inter_1D[EXT_TX_SETS_INTER][TX_TYPES_1D] = {
+ { 1, 0, 0, 0 }, { 1, 1, 1, 1 }, { 1, 1, 1, 1 }, { 1, 0, 0, 1 }, { 1, 0, 0, 1 }
+};
+#else // CONFIG_MRC_TX
static const int use_intra_ext_tx_for_txsize[EXT_TX_SETS_INTRA][EXT_TX_SIZES] =
{
#if CONFIG_CHROMA_2X2
@@ -916,6 +1010,7 @@
static const int ext_tx_used_inter_1D[EXT_TX_SETS_INTER][TX_TYPES_1D] = {
{ 1, 0, 0, 0 }, { 1, 1, 1, 1 }, { 1, 1, 1, 1 }, { 1, 0, 0, 1 },
};
+#endif // CONFIG_MRC_TX
static INLINE int get_ext_tx_types(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
int use_reduced_set) {
@@ -1149,6 +1244,15 @@
#endif // FIXED_TX_TYPE
#if CONFIG_EXT_TX
+#if CONFIG_MRC_TX
+ if (mbmi->tx_type == MRC_DCT) {
+ if (plane_type == PLANE_TYPE_Y) {
+ assert(tx_size == TX_32X32);
+ return mbmi->tx_type;
+ }
+ return DCT_DCT;
+ }
+#endif // CONFIG_MRC_TX
if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] > TX_32X32 ||
(txsize_sqr_map[tx_size] >= TX_32X32 && !is_inter_block(mbmi)))
return DCT_DCT;
@@ -1193,6 +1297,15 @@
#endif // CONFIG_CB4X4
#else // CONFIG_EXT_TX
(void)block;
+#if CONFIG_MRC_TX
+ if (mbmi->tx_type == MRC_DCT) {
+ if (plane_type == PLANE_TYPE_Y && !xd->lossless[mbmi->segment_id]) {
+ assert(tx_size == TX_32X32);
+ return mbmi->tx_type;
+ }
+ return DCT_DCT;
+ }
+#endif // CONFIG_MRC_TX
if (plane_type != PLANE_TYPE_Y || xd->lossless[mbmi->segment_id] ||
txsize_sqr_map[tx_size] >= TX_32X32)
return DCT_DCT;
diff --git a/av1/common/entropymode.c b/av1/common/entropymode.c
index da997a1..ec051e0 100644
--- a/av1/common/entropymode.c
+++ b/av1/common/entropymode.c
@@ -2134,7 +2134,12 @@
-ADST_FLIPADST, -FLIPADST_ADST
}, {
-IDTX, -DCT_DCT,
+ },
+#if CONFIG_MRC_TX
+ {
+ -IDTX, 2, -DCT_DCT, -MRC_DCT,
}
+#endif // CONFIG_MRC_TX
};
const aom_tree_index av1_ext_tx_intra_tree[EXT_TX_SETS_INTRA]
@@ -2153,7 +2158,12 @@
-DCT_DCT, 4,
-ADST_ADST, 6,
-ADST_DCT, -DCT_ADST,
+ },
+#if CONFIG_MRC_TX
+ {
+ -DCT_DCT, -MRC_DCT,
}
+#endif // CONFIG_MRC_TX
};
/* clang-format on */
@@ -2199,7 +2209,18 @@
{ 12 },
{ 12 },
{ 12 },
+ },
+#if CONFIG_MRC_TX
+ {
+#if CONFIG_CHROMA_2X2
+ { 0 },
+#endif
+ { 12, 128 },
+ { 12, 128 },
+ { 12, 128 },
+ { 12, 128 },
}
+#endif // CONFIG_MRC_TX
};
// TODO(urvang): 3rd context should be tx_type instead of intra mode just like
@@ -2457,20 +2478,152 @@
{ 10, 32, 16, 64 },
},
},
+#if CONFIG_MRC_TX
+ {
+// ToDo(yaowu): remove unused entry 0.
+#if CONFIG_CHROMA_2X2
+ {
+ { 0 },
+ },
+#endif
+ {
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+#if CONFIG_ALT_INTRA
+ { 128 },
+#if CONFIG_SMOOTH_HV
+ { 128 },
+ { 128 },
+#endif // CONFIG_SMOOTH_HV
+#endif // CONFIG_ALT_INTRA
+ { 128 },
+ },
+ {
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+#if CONFIG_ALT_INTRA
+ { 128 },
+#if CONFIG_SMOOTH_HV
+ { 128 },
+ { 128 },
+#endif // CONFIG_SMOOTH_HV
+#endif // CONFIG_ALT_INTRA
+ { 128 },
+ },
+ {
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+#if CONFIG_ALT_INTRA
+ { 128 },
+#if CONFIG_SMOOTH_HV
+ { 128 },
+ { 128 },
+#endif // CONFIG_SMOOTH_HV
+#endif // CONFIG_ALT_INTRA
+ { 128 },
+ },
+ {
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+ { 128 },
+#if CONFIG_ALT_INTRA
+ { 128 },
+#if CONFIG_SMOOTH_HV
+ { 128 },
+ { 128 },
+#endif // CONFIG_SMOOTH_HV
+#endif // CONFIG_ALT_INTRA
+ { 128 },
+ },
+ },
+
+#endif // CONFIG_MRC_TX
};
#else // !CONFIG_EXT_TX
/* clang-format off */
+#if CONFIG_MRC_TX
+const aom_tree_index av1_ext_tx_tree[TREE_SIZE(TX_TYPES)] = {
+ -DCT_DCT, 2,
+ -MRC_DCT, 4,
+ -ADST_ADST, 6,
+ -ADST_DCT, -DCT_ADST
+};
+#else
const aom_tree_index av1_ext_tx_tree[TREE_SIZE(TX_TYPES)] = {
-DCT_DCT, 2,
-ADST_ADST, 4,
-ADST_DCT, -DCT_ADST
};
+#endif // CONFIG_MRC_TX
/* clang-format on */
int av1_ext_tx_ind[TX_TYPES];
int av1_ext_tx_inv[TX_TYPES];
+#if CONFIG_MRC_TX
+static const aom_prob default_intra_ext_tx_prob[EXT_TX_SIZES][TX_TYPES]
+ [TX_TYPES - 1] = {
+#if CONFIG_CHROMA_2X2
+ { { 240, 1, 85, 128 },
+ { 4, 1, 1, 248 },
+ { 4, 1, 1, 8 },
+ { 4, 1, 248, 128 },
+ { 4, 1, 248, 128 } },
+#endif
+ { { 240, 1, 85, 128 },
+ { 4, 1, 1, 248 },
+ { 4, 1, 1, 8 },
+ { 4, 1, 248, 128 },
+ { 4, 1, 248, 128 } },
+ { { 244, 1, 85, 128 },
+ { 8, 1, 2, 248 },
+ { 8, 1, 2, 8 },
+ { 8, 1, 248, 128 },
+ { 4, 1, 248, 128 } },
+ { { 248, 128, 85, 128 },
+ { 16, 128, 4, 248 },
+ { 16, 128, 4, 8 },
+ { 16, 128, 248, 128 },
+ { 4, 1, 248, 128 } },
+ };
+
+static const aom_prob default_inter_ext_tx_prob[EXT_TX_SIZES][TX_TYPES - 1] = {
+#if CONFIG_CHROMA_2X2
+ { 160, 1, 85, 128 },
+#endif
+ { 160, 1, 85, 128 },
+ { 176, 1, 85, 128 },
+ { 192, 128, 85, 128 },
+};
+#else
static const aom_prob
default_intra_ext_tx_prob[EXT_TX_SIZES][TX_TYPES][TX_TYPES - 1] = {
#if CONFIG_CHROMA_2X2
@@ -2489,6 +2642,7 @@
{ 176, 85, 128 },
{ 192, 85, 128 },
};
+#endif // CONFIG_MRC_TX
#endif // CONFIG_EXT_TX
#if CONFIG_EXT_INTRA && CONFIG_INTRA_INTERP
@@ -3260,7 +3414,87 @@
{ AOM_ICDF(1280), AOM_ICDF(5216), AOM_ICDF(6938), AOM_ICDF(13396),
AOM_ICDF(32768), 0 },
},
+ },
+#if CONFIG_MRC_TX
+ {
+ {
+ { AOM_ICDF(1024), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1152), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1024), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#if CONFIG_ALT_INTRA
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#if CONFIG_SMOOTH_HV
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#endif // CONFIG_SMOOTH_HV
+#endif // CONFIG_ALT_INTRA
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ },
+ {
+ { AOM_ICDF(1024), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1152), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1024), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#if CONFIG_ALT_INTRA
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#if CONFIG_SMOOTH_HV
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#endif // CONFIG_SMOOTH_HV
+#endif // CONFIG_ALT_INTRA
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ },
+ {
+ { AOM_ICDF(1024), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1152), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1024), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#if CONFIG_ALT_INTRA
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#if CONFIG_SMOOTH_HV
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#endif // CONFIG_SMOOTH_HV
+#endif // CONFIG_ALT_INTRA
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ },
+ {
+ { AOM_ICDF(1024), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1152), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1024), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#if CONFIG_ALT_INTRA
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#if CONFIG_SMOOTH_HV
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+#endif // CONFIG_SMOOTH_HV
+#endif // CONFIG_ALT_INTRA
+ { AOM_ICDF(1280), AOM_ICDF(32768), 0 },
+ },
}
+#endif // CONFIG_MRC_TX
};
static const aom_cdf_prob
default_inter_ext_tx_cdf[EXT_TX_SETS_INTER][EXT_TX_SIZES][CDF_SIZE(
@@ -3324,9 +3558,82 @@
{ AOM_ICDF(1536), AOM_ICDF(32768), 0 },
{ AOM_ICDF(1536), AOM_ICDF(32768), 0 },
{ AOM_ICDF(1536), AOM_ICDF(32768), 0 },
- { AOM_ICDF(1536), AOM_ICDF(32768), 0 } }
+ { AOM_ICDF(1536), AOM_ICDF(32768), 0 } },
+#if CONFIG_MRC_TX
+ {
+#if CONFIG_CHROMA_2X2
+ { 0 },
+#endif
+ { AOM_ICDF(30080), AOM_ICDF(31781), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(4608), AOM_ICDF(32658), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(4352), AOM_ICDF(4685), AOM_ICDF(32768), 0 },
+ { AOM_ICDF(19072), AOM_ICDF(26776), AOM_ICDF(32768), 0 } },
+#endif // CONFIG_MRC_TX
};
#else
+#if CONFIG_MRC_TX
+static const aom_cdf_prob
+ default_intra_ext_tx_cdf[EXT_TX_SIZES][TX_TYPES][CDF_SIZE(TX_TYPES)] = {
+#if CONFIG_CHROMA_2X2
+ { { AOM_ICDF(30720), AOM_ICDF(31104), AOM_ICDF(31400), AOM_ICDF(32084),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(512), AOM_ICDF(582), AOM_ICDF(638), AOM_ICDF(31764),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(512), AOM_ICDF(582), AOM_ICDF(638), AOM_ICDF(1642),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(512), AOM_ICDF(582), AOM_ICDF(638), AOM_ICDF(1642),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(512), AOM_ICDF(1280), AOM_ICDF(31760), AOM_ICDF(32264),
+ AOM_ICDF(32768), 0 } },
+#endif
+ { { AOM_ICDF(30720), AOM_ICDF(31104), AOM_ICDF(31400), AOM_ICDF(32084),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(512), AOM_ICDF(582), AOM_ICDF(638), AOM_ICDF(31764),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(512), AOM_ICDF(582), AOM_ICDF(638), AOM_ICDF(1642),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(512), AOM_ICDF(582), AOM_ICDF(638), AOM_ICDF(1642),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(512), AOM_ICDF(1280), AOM_ICDF(31760), AOM_ICDF(32264),
+ AOM_ICDF(32768), 0 } },
+
+ { { AOM_ICDF(31232), AOM_ICDF(31488), AOM_ICDF(31742), AOM_ICDF(32255),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1024), AOM_ICDF(1152), AOM_ICDF(1272), AOM_ICDF(31784),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1024), AOM_ICDF(1152), AOM_ICDF(1272), AOM_ICDF(2256),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1024), AOM_ICDF(1052), AOM_ICDF(1272), AOM_ICDF(2256),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(1024), AOM_ICDF(1792), AOM_ICDF(31776), AOM_ICDF(32272),
+ AOM_ICDF(32768), 0 } },
+
+ { { AOM_ICDF(31744), AOM_ICDF(29440), AOM_ICDF(32084), AOM_ICDF(32426),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(2048), AOM_ICDF(2176), AOM_ICDF(2528), AOM_ICDF(31823),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(2048), AOM_ICDF(2176), AOM_ICDF(2528), AOM_ICDF(3473),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(2048), AOM_ICDF(2176), AOM_ICDF(2528), AOM_ICDF(3473),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(2048), AOM_ICDF(28160), AOM_ICDF(31808), AOM_ICDF(32288),
+ AOM_ICDF(32768), 0 } },
+ };
+
+static const aom_cdf_prob
+ default_inter_ext_tx_cdf[EXT_TX_SIZES][CDF_SIZE(TX_TYPES)] = {
+#if CONFIG_CHROMA_2X2
+ { AOM_ICDF(20480), AOM_ICDF(23040), AOM_ICDF(24560), AOM_ICDF(28664),
+ AOM_ICDF(32768), 0 },
+#endif
+ { AOM_ICDF(20480), AOM_ICDF(23040), AOM_ICDF(24560), AOM_ICDF(28664),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(22528), AOM_ICDF(24320), AOM_ICDF(25928), AOM_ICDF(29348),
+ AOM_ICDF(32768), 0 },
+ { AOM_ICDF(24576), AOM_ICDF(25600), AOM_ICDF(27296), AOM_ICDF(30032),
+ AOM_ICDF(32768), 0 },
+ };
+#else // CONFIG_MRC_TX
static const aom_cdf_prob
default_intra_ext_tx_cdf[EXT_TX_SIZES][TX_TYPES][CDF_SIZE(TX_TYPES)] = {
#if CONFIG_CHROMA_2X2
@@ -3367,6 +3674,7 @@
{ AOM_ICDF(22528), AOM_ICDF(25928), AOM_ICDF(29348), AOM_ICDF(32768), 0 },
{ AOM_ICDF(24576), AOM_ICDF(27296), AOM_ICDF(30032), AOM_ICDF(32768), 0 },
};
+#endif // CONFIG_MRC_TX
#endif // !CONFIG_EXT_TX
#if CONFIG_EXT_INTRA && CONFIG_INTRA_INTERP
diff --git a/av1/common/enums.h b/av1/common/enums.h
index e643a0f..3b065bb 100644
--- a/av1/common/enums.h
+++ b/av1/common/enums.h
@@ -227,6 +227,8 @@
ADST_1D = 1,
FLIPADST_1D = 2,
IDTX_1D = 3,
+ // TODO(sarahparker) need to eventually put something here for the
+ // mrc experiment to make this work with the ext-tx pruning functions
TX_TYPES_1D = 4,
} TX_TYPE_1D;
@@ -249,6 +251,9 @@
V_FLIPADST = 14,
H_FLIPADST = 15,
#endif // CONFIG_EXT_TX
+#if CONFIG_MRC_TX
+ MRC_DCT, // DCT in both directions with mrc based bitmask
+#endif // CONFIG_MRC_TX
TX_TYPES,
} TX_TYPE;
@@ -273,10 +278,15 @@
#if CONFIG_CHROMA_2X2
#define EXT_TX_SIZES 5 // number of sizes that use extended transforms
#else
-#define EXT_TX_SIZES 4 // number of sizes that use extended transforms
-#endif // CONFIG_CHROMA_2X2
+#define EXT_TX_SIZES 4 // number of sizes that use extended transforms
+#endif // CONFIG_CHROMA_2X2
+#if CONFIG_MRC_TX
+#define EXT_TX_SETS_INTER 5 // Sets of transform selections for INTER
+#define EXT_TX_SETS_INTRA 4 // Sets of transform selections for INTRA
+#else // CONFIG_MRC_TX
#define EXT_TX_SETS_INTER 4 // Sets of transform selections for INTER
#define EXT_TX_SETS_INTRA 3 // Sets of transform selections for INTRA
+#endif // CONFIG_MRC_TX
#else
#if CONFIG_CHROMA_2X2
#define EXT_TX_SIZES 4 // number of sizes that use extended transforms
diff --git a/av1/common/idct.c b/av1/common/idct.c
index 0c6ee3a..9d4e4b3 100644
--- a/av1/common/idct.c
+++ b/av1/common/idct.c
@@ -254,6 +254,9 @@
void av1_iht4x4_16_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if !CONFIG_DAALA_DCT4
if (tx_type == DCT_DCT) {
aom_idct4x4_16_add(input, dest, stride);
@@ -355,6 +358,9 @@
void av1_iht4x8_32_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -435,6 +441,9 @@
void av1_iht8x4_32_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -516,6 +525,9 @@
void av1_iht4x16_64_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -587,6 +599,9 @@
void av1_iht16x4_64_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -659,6 +674,9 @@
void av1_iht8x16_128_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -731,6 +749,9 @@
void av1_iht16x8_128_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -804,6 +825,9 @@
void av1_iht8x32_256_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -875,6 +899,9 @@
void av1_iht32x8_256_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -947,6 +974,9 @@
void av1_iht16x32_512_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1006,6 +1036,9 @@
void av1_iht32x16_512_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1065,6 +1098,9 @@
void av1_iht8x8_64_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1149,6 +1185,9 @@
void av1_iht16x16_256_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1274,6 +1313,9 @@
void av1_iht64x64_4096_add_c(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1426,6 +1468,24 @@
aom_idct32x32_1024_add(input, dest, stride);
}
+#if CONFIG_MRC_TX
+static void get_masked_residual32_inv(const tran_low_t *input, uint8_t *dest,
+ tran_low_t *output) {
+ // placeholder for bitmask creation, in the future it
+ // will likely be made based on dest
+ (void)dest;
+ memcpy(output, input, 32 * 32 * sizeof(*input));
+}
+
+static void imrc32x32_add_c(const tran_low_t *input, uint8_t *dest, int stride,
+ const TxfmParam *param) {
+ // placeholder mrc tx function
+ tran_low_t masked_input[32 * 32];
+ get_masked_residual32_inv(input, dest, masked_input);
+ idct32x32_add(input, dest, stride, param);
+}
+#endif // CONFIG_MRC_TX
+
#if CONFIG_TX64X64
static void idct64x64_add(const tran_low_t *input, uint8_t *dest, int stride,
const TxfmParam *txfm_param) {
@@ -1669,6 +1729,9 @@
break;
case IDTX: inv_idtx_add_c(input, dest, stride, 16, tx_type); break;
#endif // CONFIG_EXT_TX
+#if CONFIG_MRC_TX
+ case MRC_DCT: assert(0 && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
default: assert(0); break;
}
}
@@ -1697,6 +1760,9 @@
break;
case IDTX: inv_idtx_add_c(input, dest, stride, 32, tx_type); break;
#endif // CONFIG_EXT_TX
+#if CONFIG_MRC_TX
+ case MRC_DCT: imrc32x32_add_c(input, dest, stride, txfm_param); break;
+#endif // CONFIG_MRC_TX
default: assert(0); break;
}
}
@@ -1726,6 +1792,9 @@
break;
case IDTX: inv_idtx_add_c(input, dest, stride, 64, tx_type); break;
#endif // CONFIG_EXT_TX
+#if CONFIG_MRC_TX
+ case MRC_DCT: assert(0 && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
default: assert(0); break;
}
}
diff --git a/av1/common/scan.h b/av1/common/scan.h
index 3db6623..d137d04 100644
--- a/av1/common/scan.h
+++ b/av1/common/scan.h
@@ -80,6 +80,10 @@
static INLINE const SCAN_ORDER *get_scan(const AV1_COMMON *cm, TX_SIZE tx_size,
TX_TYPE tx_type,
const MB_MODE_INFO *mbmi) {
+#if CONFIG_MRC_TX
+ // use the DCT_DCT scan order for MRC_DCT for now
+ if (tx_type == MRC_DCT) tx_type = DCT_DCT;
+#endif // CONFIG_MRC_TX
#if CONFIG_ADAPT_SCAN
(void)mbmi;
return &cm->fc->sc[tx_size][tx_type];
diff --git a/av1/encoder/dct.c b/av1/encoder/dct.c
index c989d49..a0f0e51 100644
--- a/av1/encoder/dct.c
+++ b/av1/encoder/dct.c
@@ -1037,6 +1037,21 @@
// Note overall scaling factor is 4 times orthogonal
}
+#if CONFIG_MRC_TX
+static void get_masked_residual32_fwd(const tran_low_t *input,
+ tran_low_t *output) {
+ // placeholder for future bitmask creation
+ memcpy(output, input, 32 * 32 * sizeof(*input));
+}
+
+static void fmrc32(const tran_low_t *input, tran_low_t *output) {
+ // placeholder for mrc_dct, this just performs regular dct
+ tran_low_t masked_input[32 * 32];
+ get_masked_residual32_fwd(input, masked_input);
+ fdct32(masked_input, output);
+}
+#endif // CONFIG_MRC_TX
+
#if CONFIG_LGT
static void flgt4(const tran_low_t *input, tran_low_t *output,
const tran_high_t *lgtmtx) {
@@ -1181,6 +1196,9 @@
static void maybe_flip_input(const int16_t **src, int *src_stride, int l, int w,
int16_t *buff, int tx_type) {
switch (tx_type) {
+#if CONFIG_MRC_TX
+ case MRC_DCT:
+#endif // CONFIG_MRC_TX
case DCT_DCT:
case ADST_DCT:
case DCT_ADST:
@@ -1217,6 +1235,9 @@
void av1_fht4x4_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1305,6 +1326,9 @@
void av1_fht4x8_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1378,6 +1402,9 @@
void av1_fht8x4_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1451,6 +1478,9 @@
void av1_fht4x16_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1515,6 +1545,9 @@
void av1_fht16x4_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1579,6 +1612,9 @@
void av1_fht8x16_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1645,6 +1681,9 @@
void av1_fht16x8_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1711,6 +1750,9 @@
void av1_fht8x32_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1775,6 +1817,9 @@
void av1_fht32x8_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1839,6 +1884,9 @@
void av1_fht16x32_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -1895,6 +1943,9 @@
void av1_fht32x16_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -2076,6 +2127,9 @@
void av1_fht8x8_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -2205,6 +2259,9 @@
void av1_fht16x16_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
@@ -2284,6 +2341,9 @@
{ fhalfright32, fidtx32 }, // V_FLIPADST
{ fidtx32, fhalfright32 }, // H_FLIPADST
#endif
+#if CONFIG_MRC_TX
+ { fmrc32, fmrc32 }, // MRC_TX
+#endif // CONFIG_MRC_TX
};
const transform_2d ht = FHT[tx_type];
tran_low_t out[1024];
@@ -2354,6 +2414,9 @@
void av1_fht64x64_c(const int16_t *input, tran_low_t *output, int stride,
TxfmParam *txfm_param) {
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif // CONFIG_MRC_TX
#if CONFIG_DCT_ONLY
assert(tx_type == DCT_DCT);
#endif
diff --git a/av1/encoder/hybrid_fwd_txfm.c b/av1/encoder/hybrid_fwd_txfm.c
index 1e53c63..81b895c 100644
--- a/av1/encoder/hybrid_fwd_txfm.c
+++ b/av1/encoder/hybrid_fwd_txfm.c
@@ -121,6 +121,13 @@
static void fwd_txfm_32x32(const int16_t *src_diff, tran_low_t *coeff,
int diff_stride, TxfmParam *txfm_param) {
+#if CONFIG_MRC_TX
+ // MRC_DCT currently only has a C implementation
+ if (txfm_param->tx_type == MRC_DCT) {
+ av1_fht32x32_c(src_diff, coeff, diff_stride, txfm_param);
+ return;
+ }
+#endif // CONFIG_MRC_TX
av1_fht32x32(src_diff, coeff, diff_stride, txfm_param);
}
diff --git a/av1/encoder/rdopt.c b/av1/encoder/rdopt.c
index 872faeb..e897e56 100644
--- a/av1/encoder/rdopt.c
+++ b/av1/encoder/rdopt.c
@@ -2274,6 +2274,11 @@
// transforms should be considered for pruning
prune = prune_tx_types(cpi, bs, x, xd, -1);
+#if CONFIG_MRC_TX
+ // MRC_DCT only implemented for TX_32X32 so only include this tx in
+ // the search for TX_32X32
+ if (tx_type == MRC_DCT && tx_size != TX_32X32) return 1;
+#endif // CONFIG_MRC_TX
if (mbmi->ref_mv_idx > 0 && tx_type != DCT_DCT) return 1;
if (FIXED_TX_TYPE && tx_type != get_default_tx_type(0, xd, 0, tx_size))
return 1;
@@ -4503,7 +4508,13 @@
#endif
}
+#if CONFIG_MRC_TX
+ // If the tx type we are trying is MRC_DCT, we cannot partition the transform
+ // into anything smaller than TX_32X32
+ if (tx_size > TX_4X4 && depth < MAX_VARTX_DEPTH && mbmi->tx_type != MRC_DCT) {
+#else
if (tx_size > TX_4X4 && depth < MAX_VARTX_DEPTH) {
+#endif
const TX_SIZE sub_txs = sub_tx_size_map[tx_size];
const int bsl = tx_size_wide_unit[sub_txs];
int sub_step = tx_size_wide_unit[sub_txs] * tx_size_high_unit[sub_txs];
@@ -4841,6 +4852,11 @@
for (tx_type = txk_start; tx_type < txk_end; ++tx_type) {
RD_STATS this_rd_stats;
av1_init_rd_stats(&this_rd_stats);
+#if CONFIG_MRC_TX
+ // MRC_DCT only implemented for TX_32X32 so only include this tx in
+ // the search for TX_32X32
+ if (tx_type == MRC_DCT && max_tx_size != TX_32X32) continue;
+#endif // CONFIG_MRC_TX
#if CONFIG_EXT_TX
if (is_inter) {
if (!ext_tx_used_inter[ext_tx_set][tx_type]) continue;
diff --git a/av1/encoder/x86/dct_intrin_sse2.c b/av1/encoder/x86/dct_intrin_sse2.c
index ba6345f..496c333 100644
--- a/av1/encoder/x86/dct_intrin_sse2.c
+++ b/av1/encoder/x86/dct_intrin_sse2.c
@@ -206,6 +206,9 @@
TxfmParam *txfm_param) {
__m128i in[4];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
switch (tx_type) {
case DCT_DCT: aom_fdct4x4_sse2(input, output, stride); break;
@@ -1305,6 +1308,9 @@
TxfmParam *txfm_param) {
__m128i in[8];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
switch (tx_type) {
case DCT_DCT: aom_fdct8x8_sse2(input, output, stride); break;
@@ -2339,6 +2345,9 @@
TxfmParam *txfm_param) {
__m128i in0[16], in1[16];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
switch (tx_type) {
case DCT_DCT:
@@ -2556,6 +2565,9 @@
TxfmParam *txfm_param) {
__m128i in[8];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
switch (tx_type) {
case DCT_DCT:
@@ -2731,6 +2743,9 @@
TxfmParam *txfm_param) {
__m128i in[8];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
switch (tx_type) {
case DCT_DCT:
@@ -2872,6 +2887,9 @@
TxfmParam *txfm_param) {
__m128i in[16];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
__m128i *const t = in; // Alias to top 8x8 sub block
__m128i *const b = in + 8; // Alias to bottom 8x8 sub block
@@ -3054,6 +3072,9 @@
TxfmParam *txfm_param) {
__m128i in[16];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
__m128i *const l = in; // Alias to left 8x8 sub block
__m128i *const r = in + 8; // Alias to right 8x8 sub block, which we store
@@ -3365,6 +3386,9 @@
TxfmParam *txfm_param) {
__m128i intl[16], intr[16], inbl[16], inbr[16];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
switch (tx_type) {
case DCT_DCT:
@@ -3555,6 +3579,9 @@
TxfmParam *txfm_param) {
__m128i in0[16], in1[16], in2[16], in3[16];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
load_buffer_32x16(input, in0, in1, in2, in3, stride, 0, 0);
switch (tx_type) {
@@ -3796,6 +3823,9 @@
TxfmParam *txfm_param) {
__m128i in0[32], in1[32], in2[32], in3[32];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "No 32x32 sse2 MRC_DCT implementation");
+#endif
load_buffer_32x32(input, in0, in1, in2, in3, stride, 0, 0);
switch (tx_type) {
diff --git a/av1/encoder/x86/hybrid_fwd_txfm_avx2.c b/av1/encoder/x86/hybrid_fwd_txfm_avx2.c
index 6e82679..af8e9a5 100644
--- a/av1/encoder/x86/hybrid_fwd_txfm_avx2.c
+++ b/av1/encoder/x86/hybrid_fwd_txfm_avx2.c
@@ -917,6 +917,9 @@
TxfmParam *txfm_param) {
__m256i in[16];
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "Invalid tx type for tx size");
+#endif
switch (tx_type) {
case DCT_DCT:
@@ -1514,6 +1517,9 @@
__m256i in0[32]; // left 32 columns
__m256i in1[32]; // right 32 columns
int tx_type = txfm_param->tx_type;
+#if CONFIG_MRC_TX
+ assert(tx_type != MRC_DCT && "No avx2 32x32 implementation of MRC_DCT");
+#endif
switch (tx_type) {
case DCT_DCT:
