commit 9ca05b7e3d271645e043d6d8fd02d7d1f07f086e
author Jingning Han <jingning@google.com> Tue Jan 03 14:41:36 2017 -0800
committer Jingning Han <jingning@google.com> Fri Jan 06 18:08:08 2017 +0000
tree d808d2c58d713e2b53374c99e7067ff19f7161f8
parent a43a2d98e360abc6bfc77dfcf909df43b014924b

Refactor var-tx pipeline to support cb4x4 mode

Replace hard coded 4x4 transform block step size assumption with
scalable table access.

Change-Id: Ib1cc555c2641e5634acdd91ca33217f00aeb0b89

av1/encoder/block.h

diff --git a/av1/encoder/block.h b/av1/encoder/block.h
index 436a000..b8e886b 100644
--- a/av1/encoder/block.h
+++ b/av1/encoder/block.h
@@ -158,9 +158,9 @@
   int mv_row_max;
 
 #if CONFIG_VAR_TX
-  uint8_t blk_skip[MAX_MB_PLANE][MAX_MIB_SIZE * MAX_MIB_SIZE * 4];
+  uint8_t blk_skip[MAX_MB_PLANE][MAX_MIB_SIZE * MAX_MIB_SIZE * 8];
 #if CONFIG_REF_MV
-  uint8_t blk_skip_drl[MAX_MB_PLANE][MAX_MIB_SIZE * MAX_MIB_SIZE * 4];
+  uint8_t blk_skip_drl[MAX_MB_PLANE][MAX_MIB_SIZE * MAX_MIB_SIZE * 8];
 #endif
 #endif