)]}'
{
  "commit": "9f268611472bbdfa751aedb74a306ee502e7faca",
  "tree": "fc89f4ed13ff9c91675eac815810a557bed73192",
  "parents": [
    "81b9fd4310960854a6e0a66f0376eac901324c80"
  ],
  "author": {
    "name": "Erik Niemeyer",
    "email": "erik.a.niemeyer@gmail.com",
    "time": "Tue Nov 19 21:11:57 2013 -0700"
  },
  "committer": {
    "name": "Gerrit Code Review",
    "email": "gerrit@gerrit.golo.chromium.org",
    "time": "Wed Nov 20 11:10:54 2013 -0800"
  },
  "message": "Support for extended feature flags enumeration leaf in CPUID instruction\n\nThis CL fixes an overcite with the AVX2 support CL previously\nmerged (Change-Id: Idc03f3fca4bf2d0afd33631ea1d3caf8fc34ec29) that\nprevented runtime execution of AVX2 code in WebM. \n\nBackground:\nStarting with the Sandybridge processor, the CPUID instruction was\nenhanced to add various extended feature flag enumeration leaves.\nReading these leaves requires an additional input value for the CPUID\ninstruction which is stored in ECX. This change adds this second input\nvalue for all ARCH_X86 and ARCH_x86_64 targets to the CPUID macros,\nallowing checks of EBX bit 5 for AVX2 support. This capability will be\nrequired moving forward to check for future processor features.\n\nChange-Id: Ie9d872bc9ff68dad4b6578e4544e4dfd0ae26c36\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "29905834772b37baceef8d182c52e7f8513d10b4",
      "old_mode": 33188,
      "old_path": "vpx_ports/x86.h",
      "new_id": "344a5739b09e7042dd3703d9c2fb90902b98677d",
      "new_mode": 33188,
      "new_path": "vpx_ports/x86.h"
    },
    {
      "type": "modify",
      "old_id": "fe86cfc7b8a0645c7cf342ee80bbd6a40166db55",
      "old_mode": 33188,
      "old_path": "vpx_ports/x86_cpuid.c",
      "new_id": "02d382c5db32105450c70e692ee844a33fd67321",
      "new_mode": 33188,
      "new_path": "vpx_ports/x86_cpuid.c"
    }
  ]
}
