Reset hash logic before winner mode processing
Hash logic is reset before winner mode evaluation
to avoid incorrect usage.
Instruction count
cpu-used Reduction BD rate impact
3 0.0% -0.07%
4 0.3% -0.01%
STATS_CHANGED
Change-Id: Icd4537eac3e100b00d8fd29bcaef992d9a6e0d52
diff --git a/av1/encoder/rd.h b/av1/encoder/rd.h
index 1c8de01..b50af0f 100644
--- a/av1/encoder/rd.h
+++ b/av1/encoder/rd.h
@@ -282,6 +282,35 @@
return coeff_opt_thresh;
}
+// Used to reset the state of tx/mb rd hash information
+static INLINE void reset_hash_records(MACROBLOCK *const x) {
+ int32_t record_idx;
+
+ // Reset the state for use_inter_txb_hash
+ for (record_idx = 0; record_idx < ((MAX_MIB_SIZE >> 1) * (MAX_MIB_SIZE >> 1));
+ record_idx++)
+ x->txb_rd_record_8X8[record_idx].num =
+ x->txb_rd_record_8X8[record_idx].index_start = 0;
+ for (record_idx = 0; record_idx < ((MAX_MIB_SIZE >> 2) * (MAX_MIB_SIZE >> 2));
+ record_idx++)
+ x->txb_rd_record_16X16[record_idx].num =
+ x->txb_rd_record_16X16[record_idx].index_start = 0;
+ for (record_idx = 0; record_idx < ((MAX_MIB_SIZE >> 3) * (MAX_MIB_SIZE >> 3));
+ record_idx++)
+ x->txb_rd_record_32X32[record_idx].num =
+ x->txb_rd_record_32X32[record_idx].index_start = 0;
+ for (record_idx = 0; record_idx < ((MAX_MIB_SIZE >> 4) * (MAX_MIB_SIZE >> 4));
+ record_idx++)
+ x->txb_rd_record_64X64[record_idx].num =
+ x->txb_rd_record_64X64[record_idx].index_start = 0;
+
+ // Reset the state for use_intra_txb_hash
+ x->txb_rd_record_intra.num = x->txb_rd_record_intra.index_start = 0;
+
+ // Reset the state for use_mb_rd_hash
+ x->mb_rd_record.num = x->mb_rd_record.index_start = 0;
+}
+
void av1_setup_pred_block(const MACROBLOCKD *xd,
struct buf_2d dst[MAX_MB_PLANE],
const YV12_BUFFER_CONFIG *src,
