commit d8782ff454701b81092550e46aa5a21f139a5257
author Tom Finegan <tomfinegan@google.com> Mon Jul 10 18:26:17 2017 -0700
committer Tom Finegan <tomfinegan@google.com> Tue Jul 11 16:41:23 2017 +0000
tree a886d632ba96ee234fb25d80ad5e5efa6c916e38
parent 6a00268901c75b8f91ab7281c6987942c156b0c0

Fix cmake build with CONFIG_HIGHBITDEPTH=0.

Change-Id: If7e9ef6509a1be821484f081152bec47ea55cb00

aom_dsp/aom_dsp.cmake

diff --git a/aom_dsp/aom_dsp.cmake b/aom_dsp/aom_dsp.cmake
index d77e959..3ce6761 100644
--- a/aom_dsp/aom_dsp.cmake
+++ b/aom_dsp/aom_dsp.cmake
@@ -287,6 +287,7 @@
       "${AOM_ROOT}/aom_dsp/x86/fwd_dct32x32_impl_avx2.h"
       "${AOM_ROOT}/aom_dsp/x86/fwd_txfm_avx2.c"
       "${AOM_ROOT}/aom_dsp/x86/fwd_txfm_avx2.h"
+      "${AOM_ROOT}/aom_dsp/x86/highbd_quantize_intrin_avx2.c"
       "${AOM_ROOT}/aom_dsp/x86/sad4d_avx2.c"
       "${AOM_ROOT}/aom_dsp/x86/sad_avx2.c"
       "${AOM_ROOT}/aom_dsp/x86/sad_impl_avx2.c"
@@ -312,6 +313,7 @@
         "${AOM_ROOT}/aom_dsp/x86/fwd_txfm_sse2.c"
         "${AOM_ROOT}/aom_dsp/x86/fwd_txfm_sse2.h"
         "${AOM_ROOT}/aom_dsp/x86/halfpix_variance_sse2.c"
+        "${AOM_ROOT}/aom_dsp/x86/highbd_quantize_intrin_sse2.c"
         "${AOM_ROOT}/aom_dsp/x86/variance_sse2.c"
         "${AOM_ROOT}/aom_dsp/x86/sum_squares_sse2.c")
 
@@ -340,7 +342,6 @@
     if (CONFIG_HIGHBITDEPTH)
       set(AOM_DSP_ENCODER_INTRIN_SSE2
           ${AOM_DSP_ENCODER_INTRIN_SSE2}
-          "${AOM_ROOT}/aom_dsp/x86/highbd_quantize_intrin_sse2.c"
           "${AOM_ROOT}/aom_dsp/x86/highbd_subtract_sse2.c")
     endif ()
   endif ()
@@ -363,7 +364,6 @@
 
     set(AOM_DSP_ENCODER_INTRIN_AVX2
         ${AOM_DSP_ENCODER_INTRIN_AVX2}
-        "${AOM_ROOT}/aom_dsp/x86/highbd_quantize_intrin_avx2.c"
         "${AOM_ROOT}/aom_dsp/x86/sad_highbd_avx2.c")
   endif ()
 

av1/av1.cmake

diff --git a/av1/av1.cmake b/av1/av1.cmake
index 80d860e..f269c72 100644
--- a/av1/av1.cmake
+++ b/av1/av1.cmake
@@ -158,9 +158,11 @@
 
 set(AOM_AV1_COMMON_INTRIN_SSE4_1
     "${AOM_ROOT}/av1/common/x86/av1_fwd_txfm1d_sse4.c"
-    "${AOM_ROOT}/av1/common/x86/av1_fwd_txfm2d_sse4.c")
+    "${AOM_ROOT}/av1/common/x86/av1_fwd_txfm2d_sse4.c"
+    "${AOM_ROOT}/av1/common/x86/highbd_inv_txfm_sse4.c")
 
 set(AOM_AV1_COMMON_INTRIN_AVX2
+    "${AOM_ROOT}/av1/common/x86/highbd_inv_txfm_avx2.c"
     "${AOM_ROOT}/av1/common/x86/hybrid_inv_txfm_avx2.c")
 
 set(AOM_AV1_COMMON_INTRIN_DSPR2
@@ -189,10 +191,17 @@
 set(AOM_AV1_ENCODER_INTRIN_SSSE3
     "${AOM_ROOT}/av1/encoder/x86/dct_ssse3.c")
 
+set(AOM_AV1_ENCODER_INTRIN_SSE4_1
+    ${AOM_AV1_ENCODER_INTRIN_SSE4_1}
+    "${AOM_ROOT}/av1/encoder/x86/av1_highbd_quantize_sse4.c"
+    "${AOM_ROOT}/av1/encoder/x86/highbd_fwd_txfm_sse4.c")
+
 set(AOM_AV1_ENCODER_INTRIN_AVX2
     "${AOM_ROOT}/av1/encoder/x86/av1_quantize_avx2.c"
+    "${AOM_ROOT}/av1/encoder/x86/av1_highbd_quantize_avx2.c"
     "${AOM_ROOT}/av1/encoder/x86/error_intrin_avx2.c"
     "${AOM_ROOT}/av1/encoder/x86/hybrid_fwd_txfm_avx2.c")
+
 set(AOM_AV1_ENCODER_INTRIN_NEON
     "${AOM_ROOT}/av1/encoder/arm/neon/quantize_neon.c")
 
@@ -207,21 +216,7 @@
 if (CONFIG_HIGHBITDEPTH)
   set(AOM_AV1_COMMON_INTRIN_SSE4_1
       ${AOM_AV1_COMMON_INTRIN_SSE4_1}
-      "${AOM_ROOT}/av1/common/x86/av1_highbd_convolve_sse4.c"
-      "${AOM_ROOT}/av1/common/x86/highbd_inv_txfm_sse4.c")
-
-  set(AOM_AV1_COMMON_INTRIN_AVX2
-      ${AOM_AV1_COMMON_INTRIN_AVX2}
-      "${AOM_ROOT}/av1/common/x86/highbd_inv_txfm_avx2.c")
-
-  set(AOM_AV1_ENCODER_INTRIN_SSE4_1
-      ${AOM_AV1_ENCODER_INTRIN_SSE4_1}
-      "${AOM_ROOT}/av1/encoder/x86/av1_highbd_quantize_sse4.c"
-      "${AOM_ROOT}/av1/encoder/x86/highbd_fwd_txfm_sse4.c")
-
-  set(AOM_AV1_ENCODER_INTRIN_AVX2
-      ${AOM_AV1_ENCODER_INTRIN_AVX2}
-      "${AOM_ROOT}/av1/encoder/x86/av1_highbd_quantize_avx2.c")
+      "${AOM_ROOT}/av1/common/x86/av1_highbd_convolve_sse4.c")
 else ()
   set(AOM_AV1_COMMON_INTRIN_NEON
       ${AOM_AV1_COMMON_INTRIN_NEON}