)]}'
{
  "commit": "db05eb00911fea60b29006d5bb7181f35b6456ee",
  "tree": "1240af2e798cc9c5909f4cbf5213079882cd942d",
  "parents": [
    "6834b537f81e00bc36cd9593e06bdf1ec634f8b0"
  ],
  "author": {
    "name": "Luc Trudeau",
    "email": "luc@trud.ca",
    "time": "Tue Mar 06 22:35:47 2018 -0500"
  },
  "committer": {
    "name": "Luc Trudeau",
    "email": "luc@trud.ca",
    "time": "Sat Mar 10 01:33:29 2018 +0000"
  },
  "message": "[CFL] Faster AVX2 Average Subtract\n\nBased on the observation that for small blocks AVX2 does not outperform\nSSE2, we call the SSE2 code for block widths 4 and 8.\n\nFor widths 16 and 32, the AVX2 version is optimized by:\n  * Summing over two rows in the summing loop;\n  * Operating over the full 256bit registers in the summing loop;\n  * Using more accumulators to reduce coupling operations;\n  * Leveraging chained hadd calls in the fill function.\n\nAVX2/CFLSubAvgTest\n4x4: C time \u003d 384 us, SIMD time \u003d 153 us (~2.5x)\n8x8: C time \u003d 805 us, SIMD time \u003d 229 us (~3.5x)\n16x16: C time \u003d 2757 us, SIMD time \u003d 775 us (~3.6x)\n32x32: C time \u003d 10035 us, SIMD time \u003d 2524 us (~4x)\n\nChange-Id: I683994026c1f1626828e90949cd0bd911b46ed5e\n",
  "tree_diff": [
    {
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      "old_path": "av1/common/cfl.h",
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      "new_mode": 33188,
      "new_path": "av1/common/cfl.h"
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    {
      "type": "modify",
      "old_id": "d7ecad1e79b2dee182dd61c94d29b8225e7e2073",
      "old_mode": 33188,
      "old_path": "av1/common/x86/cfl_avx2.c",
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      "new_mode": 33188,
      "new_path": "av1/common/x86/cfl_avx2.c"
    },
    {
      "type": "modify",
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      "old_path": "av1/common/x86/cfl_simd.h",
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      "new_path": "av1/common/x86/cfl_simd.h"
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}