diff --git a/aom/aom_encoder.h b/aom/aom_encoder.h
index bdef6b5..582b7f3 100644
--- a/aom/aom_encoder.h
+++ b/aom/aom_encoder.h
@@ -518,12 +518,10 @@
    *
    */
   unsigned int enable_filter_intra;
-#if CONFIG_DIP
   /*!\brief enable intra_dip
    *
    */
   unsigned int enable_intra_dip;
-#endif
   /*!\brief enable intra angle delta
    *
    */
diff --git a/aom/aomcx.h b/aom/aomcx.h
index 4f52a5d..adf000f 100644
--- a/aom/aomcx.h
+++ b/aom/aomcx.h
@@ -1235,11 +1235,9 @@
   /*!\brief Control to set frame output order derivation method
    */
   AV1E_SET_FRAME_OUTPUT_ORDER_DERIVATION = 166,
-#if CONFIG_DIP
   /*!\brief Control to enable intra_dip mode
    */
   AV1E_SET_ENABLE_INTRA_DIP = 167,
-#endif
 #if CONFIG_ENHANCED_FRAME_CONTEXT_INIT
   /*!\brief Control to enable CDF averaging for context initialization
    */
@@ -1577,10 +1575,8 @@
 AOM_CTRL_USE_TYPE(AV1E_SET_ENABLE_FILTER_INTRA, int)
 #define AOM_CTRL_AV1E_SET_ENABLE_FILTER_INTRA
 
-#if CONFIG_DIP
 AOM_CTRL_USE_TYPE(AV1E_SET_ENABLE_INTRA_DIP, int)
 #define AOM_CTRL_AV1E_SET_ENABLE_INTRA_DIP
-#endif
 
 AOM_CTRL_USE_TYPE(AV1E_SET_ENABLE_SMOOTH_INTRA, int)
 #define AOM_CTRL_AV1E_SET_ENABLE_SMOOTH_INTRA
diff --git a/apps/aomenc.c b/apps/aomenc.c
index 532db05..5a1049f 100644
--- a/apps/aomenc.c
+++ b/apps/aomenc.c
@@ -159,9 +159,7 @@
                                         AV1E_SET_ENABLE_GLOBAL_MOTION,
                                         AV1E_SET_ENABLE_WARPED_MOTION,
                                         AV1E_SET_ENABLE_FILTER_INTRA,
-#if CONFIG_DIP
                                         AV1E_SET_ENABLE_INTRA_DIP,
-#endif
                                         AV1E_SET_ENABLE_SMOOTH_INTRA,
                                         AV1E_SET_ENABLE_PAETH_INTRA,
                                         AV1E_SET_ENABLE_CFL_INTRA,
@@ -365,9 +363,7 @@
   &g_av1_codec_arg_defs.enable_global_motion,
   &g_av1_codec_arg_defs.enable_warped_motion,
   &g_av1_codec_arg_defs.enable_filter_intra,
-#if CONFIG_DIP
   &g_av1_codec_arg_defs.enable_intra_dip,
-#endif
   &g_av1_codec_arg_defs.enable_smooth_intra,
   &g_av1_codec_arg_defs.enable_paeth_intra,
   &g_av1_codec_arg_defs.enable_cfl_intra,
@@ -727,9 +723,7 @@
 #endif  // CONFIG_ENABLE_MHCCP
   config->enable_smooth_intra = 1;
   config->enable_filter_intra = 0;
-#if CONFIG_DIP
   config->enable_intra_dip = 1;
-#endif
   config->enable_angle_delta = 1;
   config->enable_opfl_refine = 1;
 #if CONFIG_AFFINE_REFINEMENT
@@ -1581,10 +1575,8 @@
   fprintf(stdout, "                               : MHCCP: (%d)\n",
           encoder_cfg->enable_mhccp);
 #endif  // CONFIG_ENABLE_MHCCP
-#if CONFIG_DIP
   fprintf(stdout, "                               : IntraDIP (%d)\n",
           encoder_cfg->enable_intra_dip);
-#endif
   fprintf(stdout, "                               : IntraDeltaAngle (%d)\n",
           encoder_cfg->enable_angle_delta);
 
diff --git a/av1/arg_defs.c b/av1/arg_defs.c
index abbc706..accc4f4 100644
--- a/av1/arg_defs.c
+++ b/av1/arg_defs.c
@@ -576,11 +576,9 @@
   .enable_filter_intra = ARG_DEF(NULL, "enable-filter-intra", 1,
                                  "Enable filter intra prediction mode "
                                  "(0: false (default), 1: true)"),
-#if CONFIG_DIP
   .enable_intra_dip = ARG_DEF(NULL, "enable-intra-dip", 1,
                               "Enable intra data-driven prediction mode "
                               "(0: false, 1: true (default))"),
-#endif  // CONFIG_DIP
   .enable_smooth_intra = ARG_DEF(NULL, "enable-smooth-intra", 1,
                                  "Enable smooth intra prediction modes "
                                  "(0: false, 1: true (default))"),
diff --git a/av1/arg_defs.h b/av1/arg_defs.h
index af17718..d68b26b 100644
--- a/av1/arg_defs.h
+++ b/av1/arg_defs.h
@@ -213,9 +213,7 @@
 #endif  // CONFIG_SIX_PARAM_WARP_DELTA
   arg_def_t enable_warp_extend;
   arg_def_t enable_filter_intra;
-#if CONFIG_DIP
   arg_def_t enable_intra_dip;
-#endif  // CONFIG_DIP
   arg_def_t enable_smooth_intra;
   arg_def_t enable_paeth_intra;
   arg_def_t enable_cfl_intra;
diff --git a/av1/av1.cmake b/av1/av1.cmake
index 1c6c5f6..361d0eb 100644
--- a/av1/av1.cmake
+++ b/av1/av1.cmake
@@ -109,14 +109,11 @@
   "${AOM_ROOT}/av1/common/entropy_inits_mv.h"
   "${AOM_ROOT}/av1/common/entropy_sideinfo.h")
 
-if(CONFIG_DIP)
-  list(
-    APPEND AOM_AV1_COMMON_SOURCES "${AOM_ROOT}/av1/common/intra_matrix.c"
-    "${AOM_ROOT}/av1/common/intra_matrix.h"
-    "${AOM_ROOT}/av1/common/intra_dip.cc" "${AOM_ROOT}/av1/common/intra_dip.h")
-  list(APPEND AOM_AV1_COMMON_INTRIN_AVX2
-       "${AOM_ROOT}/av1/common/x86/intra_matrix_avx2.c")
-endif()
+list(APPEND AOM_AV1_COMMON_SOURCES "${AOM_ROOT}/av1/common/intra_matrix.c"
+     "${AOM_ROOT}/av1/common/intra_matrix.h"
+     "${AOM_ROOT}/av1/common/intra_dip.cc" "${AOM_ROOT}/av1/common/intra_dip.h")
+list(APPEND AOM_AV1_COMMON_INTRIN_AVX2
+     "${AOM_ROOT}/av1/common/x86/intra_matrix_avx2.c")
 
 if(CONFIG_AV1_ENCODER)
   list(APPEND AOM_AV1_COMMON_SOURCES "${AOM_ROOT}/av1/encoder/erp_tflite.cc"
diff --git a/av1/av1_cx_iface.c b/av1/av1_cx_iface.c
index 57d78fa..617e588 100644
--- a/av1/av1_cx_iface.c
+++ b/av1/av1_cx_iface.c
@@ -190,9 +190,7 @@
 #endif                              // CONFIG_SIX_PARAM_WARP_DELTA
   int enable_warp_extend;           // enable warp extension for sequence
   int enable_filter_intra;          // enable filter intra for sequence
-#if CONFIG_DIP
   int enable_intra_dip;     // enable intra DIP (data-driven intra) sequence
-#endif                      // CONFIG_DIP
   int enable_smooth_intra;  // enable smooth intra modes for sequence
   int enable_paeth_intra;   // enable Paeth intra mode for sequence
   int enable_cfl_intra;     // enable CFL uv intra mode for sequence
@@ -546,9 +544,7 @@
 #endif  // CONFIG_SIX_PARAM_WARP_DELTA
   1,    // enable_warp_extend at sequence level
   0,    // enable filter intra at sequence level
-#if CONFIG_DIP
   1,    // enable_intra_dip at sequence level
-#endif  // CONFIG_DIP
   1,    // enable smooth intra modes usage for sequence
   1,    // enable Paeth intra mode usage for sequence
   1,    // enable CFL uv intra mode usage for sequence
@@ -1072,9 +1068,7 @@
 #endif  // CONFIG_SIX_PARAM_WARP_DELTA
   cfg->enable_warp_extend = extra_cfg->enable_warp_extend;
   cfg->enable_filter_intra = extra_cfg->enable_filter_intra;
-#if CONFIG_DIP
   cfg->enable_intra_dip = extra_cfg->enable_intra_dip;
-#endif  // CONFIG_DIP
   cfg->enable_smooth_intra = extra_cfg->enable_smooth_intra;
   cfg->enable_paeth_intra = extra_cfg->enable_paeth_intra;
   cfg->enable_cfl_intra = extra_cfg->enable_cfl_intra;
@@ -1218,9 +1212,7 @@
 #endif  // CONFIG_SIX_PARAM_WARP_DELTA
   extra_cfg->enable_warp_extend = cfg->enable_warp_extend;
   extra_cfg->enable_filter_intra = cfg->enable_filter_intra;
-#if CONFIG_DIP
   extra_cfg->enable_intra_dip = cfg->enable_intra_dip;
-#endif  // CONFIG_DIP
   extra_cfg->enable_smooth_intra = cfg->enable_smooth_intra;
   extra_cfg->enable_paeth_intra = cfg->enable_paeth_intra;
   extra_cfg->enable_cfl_intra = cfg->enable_cfl_intra;
@@ -1865,9 +1857,7 @@
   intra_mode_cfg->enable_intra_edge_filter =
       extra_cfg->enable_intra_edge_filter;
   intra_mode_cfg->enable_filter_intra = extra_cfg->enable_filter_intra;
-#if CONFIG_DIP
   intra_mode_cfg->enable_intra_dip = extra_cfg->enable_intra_dip;
-#endif  // CONFIG_DIP
   intra_mode_cfg->enable_smooth_intra = extra_cfg->enable_smooth_intra;
   intra_mode_cfg->enable_paeth_intra = extra_cfg->enable_paeth_intra;
   intra_mode_cfg->enable_cfl_intra = extra_cfg->enable_cfl_intra;
@@ -2635,14 +2625,12 @@
   return update_extra_cfg(ctx, &extra_cfg);
 }
 
-#if CONFIG_DIP
 static aom_codec_err_t ctrl_set_enable_intra_dip(aom_codec_alg_priv_t *ctx,
                                                  va_list args) {
   struct av1_extracfg extra_cfg = ctx->extra_cfg;
   extra_cfg.enable_intra_dip = CAST(AV1E_SET_ENABLE_INTRA_DIP, args);
   return update_extra_cfg(ctx, &extra_cfg);
 }
-#endif  // CONFIG_DIP
 
 static aom_codec_err_t ctrl_set_enable_smooth_intra(aom_codec_alg_priv_t *ctx,
                                                     va_list args) {
@@ -4360,11 +4348,9 @@
   } else if (arg_match_helper(&arg, &g_av1_codec_arg_defs.enable_filter_intra,
                               argv, err_string)) {
     extra_cfg.enable_filter_intra = arg_parse_int_helper(&arg, err_string);
-#if CONFIG_DIP
   } else if (arg_match_helper(&arg, &g_av1_codec_arg_defs.enable_intra_dip,
                               argv, err_string)) {
     extra_cfg.enable_intra_dip = arg_parse_int_helper(&arg, err_string);
-#endif  // CONFIG_DIP
   } else if (arg_match_helper(&arg, &g_av1_codec_arg_defs.enable_smooth_intra,
                               argv, err_string)) {
     extra_cfg.enable_smooth_intra = arg_parse_int_helper(&arg, err_string);
@@ -4633,9 +4619,7 @@
   { AV1E_SET_ENABLE_GLOBAL_MOTION, ctrl_set_enable_global_motion },
   { AV1E_SET_ENABLE_WARPED_MOTION, ctrl_set_enable_warped_motion },
   { AV1E_SET_ENABLE_FILTER_INTRA, ctrl_set_enable_filter_intra },
-#if CONFIG_DIP
   { AV1E_SET_ENABLE_INTRA_DIP, ctrl_set_enable_intra_dip },
-#endif  // CONFIG_DIP
   { AV1E_SET_ENABLE_SMOOTH_INTRA, ctrl_set_enable_smooth_intra },
   { AV1E_SET_ENABLE_PAETH_INTRA, ctrl_set_enable_paeth_intra },
   { AV1E_SET_ENABLE_CFL_INTRA, ctrl_set_enable_cfl_intra },
@@ -4838,11 +4822,8 @@
 #if CONFIG_ENABLE_MHCCP
         1,
 #endif  // CONFIG_ENABLE_MHCCP
-        1,   1,
-#if CONFIG_DIP
+        1,   1, 1, 1,
         1,
-#endif  // CONFIG_DIP
-        1,   1,
 #if CONFIG_AFFINE_REFINEMENT
         1,
 #endif  // CONFIG_AFFINE_REFINEMENT
diff --git a/av1/common/av1_common_int.h b/av1/common/av1_common_int.h
index ce1a22c..9bd0875 100644
--- a/av1/common/av1_common_int.h
+++ b/av1/common/av1_common_int.h
@@ -600,11 +600,9 @@
   uint8_t enable_imp_msk_bld;  // enable implicit maksed blending
 #endif                         // CONFIG_D071_IMP_MSK_BLD
 
-  uint8_t enable_fsc;           // enables/disables forward skip coding
-  uint8_t enable_filter_intra;  // enables/disables filterintra
-#if CONFIG_DIP
+  uint8_t enable_fsc;                // enables/disables forward skip coding
+  uint8_t enable_filter_intra;       // enables/disables filterintra
   uint8_t enable_intra_dip;          // enables/disables intra_dip
-#endif                               // CONFIG_DIP
   uint8_t enable_intra_edge_filter;  // enables/disables edge upsampling
   uint8_t enable_orip;               // To turn on/off sub-block based ORIP
   uint8_t enable_ist;        // enables/disables intra secondary transform
diff --git a/av1/common/av1_rtcd_defs.pl b/av1/common/av1_rtcd_defs.pl
index c4f5a28..921b412 100644
--- a/av1/common/av1_rtcd_defs.pl
+++ b/av1/common/av1_rtcd_defs.pl
@@ -276,10 +276,8 @@
     "const IbpWeightsType weights[][IBP_WEIGHT_SIZE][DIR_MODES_0_90], int mode_idx, uint16_t *dst, ptrdiff_t stride, uint16_t* second_pred, ptrdiff_t second_stride, int bw, int bh";
 
 # Data-driven intra prediction (DIP)
-if (aom_config("CONFIG_DIP") eq "yes") {
-  add_proto qw/void av1_dip_matrix_multiplication/, "const uint16_t *A, const uint16_t *B, uint16_t *C, int bd";
-  specialize qw/av1_dip_matrix_multiplication avx2/
-}
+add_proto qw/void av1_dip_matrix_multiplication/, "const uint16_t *A, const uint16_t *B, uint16_t *C, int bd";
+specialize qw/av1_dip_matrix_multiplication avx2/;
 
 # build compound seg mask functions
 add_proto qw/void av1_build_compound_diffwtd_mask_highbd/, "uint8_t *mask, DIFFWTD_MASK_TYPE mask_type, const uint16_t *src0, int src0_stride, const uint16_t *src1, int src1_stride, int h, int w, int bd";
diff --git a/av1/common/blockd.h b/av1/common/blockd.h
index 678c8c1..4365f5b 100644
--- a/av1/common/blockd.h
+++ b/av1/common/blockd.h
@@ -543,7 +543,6 @@
   int8_t angle_delta[PLANE_TYPES];
   /*! \brief The type of filter intra mode used (if applicable). */
   FILTER_INTRA_MODE_INFO filter_intra_mode_info;
-#if CONFIG_DIP
   /*! \brief intra_dip prediction mode (0=disable). */
   uint8_t use_intra_dip;
   /*! \brief intra_dip prediction mode selection. */
@@ -553,7 +552,6 @@
   // Top-left corner, 5 along top edge, 5 along bottom edge (11 total).
   uint16_t intra_dip_features[11];
 #endif  // CONFIG_DIP_EXT_PRUNING
-#endif  // CONFIG_DIP
   /*! \brief Chroma from Luma: Joint sign of alpha Cb and alpha Cr */
   int8_t cfl_alpha_signs;
   /*! \brief Chroma from Luma: Index of the alpha Cb and alpha Cr combination */
diff --git a/av1/common/bru.c b/av1/common/bru.c
index c8909da..4fee879 100644
--- a/av1/common/bru.c
+++ b/av1/common/bru.c
@@ -252,9 +252,7 @@
 #if CONFIG_MORPH_PRED
   mbmi->morph_pred = 0;
 #endif
-#if CONFIG_DIP
   mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
   mbmi->seg_id_predicted = 0;
   mbmi->use_amvd = 0;
   // todo find del idx
diff --git a/av1/common/entropy.c b/av1/common/entropy.c
index 6955388..1e08b78 100644
--- a/av1/common/entropy.c
+++ b/av1/common/entropy.c
@@ -84,10 +84,8 @@
   av1_copy(cm->fc->coeff_br_ph_cdf, av1_default_coeff_br_ph_cdfs[index]);
   av1_copy(cm->fc->coeff_base_bob_cdf,
            av1_default_coeff_base_bob_multi_cdfs[index]);
-#if CONFIG_DIP
   av1_copy(cm->fc->intra_dip_cdf, default_intra_dip_cdf[index]);
   av1_copy(cm->fc->intra_dip_mode_n6_cdf, default_intra_dip_mode_n6_cdf);
-#endif  // CONFIG_DIP
 }
 
 static AOM_INLINE void reset_cdf_symbol_counter(aom_cdf_prob *cdf_ptr,
@@ -361,10 +359,8 @@
 #endif  // CONFIG_ENABLE_MHCCP
   RESET_CDF_COUNTER(fc->filter_intra_cdfs, 2);
   RESET_CDF_COUNTER(fc->filter_intra_mode_cdf, FILTER_INTRA_MODES);
-#if CONFIG_DIP
   RESET_CDF_COUNTER(fc->intra_dip_cdf, 2);
   RESET_CDF_COUNTER(fc->intra_dip_mode_n6_cdf, 6);
-#endif  // CONFIG_DIP
   RESET_CDF_COUNTER(fc->switchable_flex_restore_cdf, 2);
   for (int plane = 0; plane < MAX_MB_PLANE; plane++) {
     for (int ctx = 0; ctx < CCSO_CONTEXT; ctx++) {
diff --git a/av1/common/entropy.h b/av1/common/entropy.h
index db72edb..dffbd70 100644
--- a/av1/common/entropy.h
+++ b/av1/common/entropy.h
@@ -28,10 +28,8 @@
 
 #define TOKEN_CDF_Q_CTXS 4
 
-#if CONFIG_DIP
 // Number of contexts for intra_dip_cdf.
 #define DIP_CTXS 3
-#endif  // CONFIG_DIP
 
 #if CONFIG_CONTEXT_DERIVATION
 #define CROSS_COMPONENT_CONTEXTS 3
diff --git a/av1/common/entropymode.c b/av1/common/entropymode.c
index 3a3ab09..8944c9d 100644
--- a/av1/common/entropymode.c
+++ b/av1/common/entropymode.c
@@ -7572,11 +7572,9 @@
                          ctx_tr->coeff_base_eob_cdf, 3);
   CUMULATIVE_AVERAGE_CDF(ctx_left->coeff_base_bob_cdf,
                          ctx_tr->coeff_base_bob_cdf, 3);
-#if CONFIG_DIP
   CUMULATIVE_AVERAGE_CDF(ctx_left->intra_dip_cdf, ctx_tr->intra_dip_cdf, 2);
   CUMULATIVE_AVERAGE_CDF(ctx_left->intra_dip_mode_n6_cdf,
                          ctx_tr->intra_dip_mode_n6_cdf, 6);
-#endif  // CONFIG_DIP
   CUMULATIVE_AVERAGE_CDF(ctx_left->coeff_base_lf_cdf, ctx_tr->coeff_base_lf_cdf,
                          LF_BASE_SYMBOLS);
   CUMULATIVE_AVERAGE_CDF(ctx_left->coeff_base_lf_eob_cdf,
@@ -8043,10 +8041,8 @@
   SHIFT_CDF(ctx_ptr->eob_flag_cdf1024, EOB_MAX_SYMS);
   SHIFT_CDF(ctx_ptr->coeff_base_eob_cdf, 3);
   SHIFT_CDF(ctx_ptr->coeff_base_bob_cdf, 3);
-#if CONFIG_DIP
   SHIFT_CDF(ctx_ptr->intra_dip_cdf, 2);
   SHIFT_CDF(ctx_ptr->intra_dip_mode_n6_cdf, 6);
-#endif  // CONFIG_DIP
   SHIFT_CDF(ctx_ptr->coeff_base_lf_cdf, LF_BASE_SYMBOLS);
   SHIFT_CDF(ctx_ptr->coeff_base_lf_eob_cdf, LF_BASE_SYMBOLS - 1);
   SHIFT_CDF(ctx_ptr->coeff_br_lf_cdf, BR_CDF_SIZE);
@@ -8424,11 +8420,9 @@
               EOB_MAX_SYMS);
   AVERAGE_CDF(ctx_left->coeff_base_eob_cdf, ctx_tr->coeff_base_eob_cdf, 3);
   AVERAGE_CDF(ctx_left->coeff_base_bob_cdf, ctx_tr->coeff_base_bob_cdf, 3);
-#if CONFIG_DIP
   AVERAGE_CDF(ctx_left->intra_dip_cdf, ctx_tr->intra_dip_cdf, 2);
   AVERAGE_CDF(ctx_left->intra_dip_mode_n6_cdf, ctx_tr->intra_dip_mode_n6_cdf,
               6);
-#endif  // CONFIG_DIP
   AVERAGE_CDF(ctx_left->coeff_base_lf_cdf, ctx_tr->coeff_base_lf_cdf,
               LF_BASE_SYMBOLS);
   AVERAGE_CDF(ctx_left->coeff_base_lf_eob_cdf, ctx_tr->coeff_base_lf_eob_cdf,
diff --git a/av1/common/entropymode.h b/av1/common/entropymode.h
index 808d205..75c129e 100644
--- a/av1/common/entropymode.h
+++ b/av1/common/entropymode.h
@@ -474,10 +474,8 @@
   aom_cdf_prob filter_intra_cdfs[BLOCK_SIZES_ALL][CDF_SIZE(2)];
 #endif  // CONFIG_D149_CTX_MODELING_OPT
   aom_cdf_prob filter_intra_mode_cdf[CDF_SIZE(FILTER_INTRA_MODES)];
-#if CONFIG_DIP
   aom_cdf_prob intra_dip_cdf[DIP_CTXS][CDF_SIZE(2)];
   aom_cdf_prob intra_dip_mode_n6_cdf[CDF_SIZE(6)];
-#endif                          // CONFIG_DIP
 #define MAX_LR_FLEX_MB_PLANE 3  // Needs to match MAX_MB_PLANE.
   // The code for switchable resroration mode is to signal a bit for
   // every allowed restoration type in order from 0 (RESTORE_NONE).
diff --git a/av1/common/reconintra.c b/av1/common/reconintra.c
index ce5840a..8147098 100644
--- a/av1/common/reconintra.c
+++ b/av1/common/reconintra.c
@@ -1291,9 +1291,7 @@
   int p_angle = 0;
   const int is_dr_mode = av1_is_directional_mode(mode);
   const int use_filter_intra = filter_intra_mode != FILTER_INTRA_MODES;
-#if CONFIG_DIP
   const int use_intra_dip = mbmi->use_intra_dip && plane == PLANE_TYPE_Y;
-#endif  // CONFIG_DIP
   int base = 128 << (xd->bd - 8);
   // The left_data, above_data buffers must be zeroed to fix some intermittent
   // valgrind errors. Uninitialized reads in intra pred modules (e.g. width =
@@ -1357,9 +1355,7 @@
 #endif
   }
   if (use_filter_intra) need_left = need_above = need_above_left = 1;
-#if CONFIG_DIP
   if (use_intra_dip) need_left = need_above = need_above_left = 1;
-#endif  // CONFIG_DIP
   assert(n_top_px >= 0);
   assert(n_topright_px >= 0);
   assert(n_left_px >= 0);
@@ -1384,20 +1380,16 @@
   if (need_left) {
     int need_bottom = extend_modes[mode] & NEED_BOTTOMLEFT;
     if (use_filter_intra) need_bottom = 0;
-#if CONFIG_DIP
     if (use_intra_dip) need_bottom = 1;
-#endif  // CONFIG_DIP
     if (is_dr_mode)
       need_bottom =
           apply_ibp ? (p_angle < 90) || (p_angle > 180) : p_angle > 180;
     int num_left_pixels_needed =
         txhpx + (need_bottom ? txwpx : 3) + (mrl_index << 1);
-#if CONFIG_DIP
     if (use_intra_dip) {
       // DIP mode requires left edge + 1/4 tx height for overhang feature.
       num_left_pixels_needed = txhpx + (txhpx >> 2);
     }
-#endif  // CONFIG_DIP
     i = 0;
     if (n_left_px > 0) {
       for (; i < n_left_px; i++) {
@@ -1427,19 +1419,15 @@
   if (need_above) {
     int need_right = extend_modes[mode] & NEED_ABOVERIGHT;
     if (use_filter_intra) need_right = 0;
-#if CONFIG_DIP
     if (use_intra_dip) need_right = 1;
-#endif  // CONFIG_DIP
     if (is_dr_mode)
       need_right = apply_ibp ? (p_angle < 90) || (p_angle > 180) : p_angle < 90;
     int num_top_pixels_needed =
         txwpx + (need_right ? txhpx : 0) + (mrl_index << 1);
-#if CONFIG_DIP
     if (use_intra_dip) {
       // DIP mode requires above line + 1/4 tx width for overhang feature.
       num_top_pixels_needed = txwpx + (txwpx >> 2);
     }
-#endif  // CONFIG_DIP
     if (n_top_px > 0) {
       memcpy(above_row_1st, above_ref_1st, n_top_px * sizeof(above_ref_1st[0]));
       memcpy(above_row_2nd, above_ref_2nd, n_top_px * sizeof(above_ref_2nd[0]));
@@ -1495,7 +1483,6 @@
     return;
   }
 
-#if CONFIG_DIP
   if (use_intra_dip) {
     av1_highbd_intra_dip_predictor(mbmi->intra_dip_mode, dst, dst_stride,
                                    above_row_1st, left_col_1st, tx_size, xd->bd
@@ -1506,7 +1493,6 @@
     );
     return;
   }
-#endif  // CONFIG_DIP
 
   if (is_dr_mode) {
     int upsample_above = 0;
diff --git a/av1/common/reconintra.h b/av1/common/reconintra.h
index 46a69e9..591eb7f 100644
--- a/av1/common/reconintra.h
+++ b/av1/common/reconintra.h
@@ -194,19 +194,14 @@
          av1_filter_intra_allowed_bsize(cm, mbmi->sb_type[PLANE_TYPE_Y]);
 }
 
-#if CONFIG_DIP
 static INLINE int av1_intra_dip_allowed_bsize(const AV1_COMMON *const cm,
                                               BLOCK_SIZE bs) {
   if (!cm->seq_params.enable_intra_dip || bs == BLOCK_INVALID) return 0;
   int width = block_size_wide[bs];
   int height = block_size_high[bs];
   int equal_or_greater_rect_16x8 = width * height >= (8 * 16);
-#if CONFIG_DIP_EXT
   int width_and_height_greater_than_4 = width > 4 && height > 4;
   int allow = equal_or_greater_rect_16x8 && width_and_height_greater_than_4;
-#else
-  int allow = equal_or_greater_rect_16x8;
-#endif  // CONFIG_DIP_EXT
   return allow;
 }
 
@@ -225,7 +220,6 @@
   int ctx1 = nbr1 ? nbr1->use_intra_dip != 0 : 0;
   return ctx0 + ctx1;
 }
-#endif  // CONFIG_DIP
 
 #if DF_RESTRICT_ORIP
 static INLINE int av1_allow_orip_smooth_dc(PREDICTION_MODE mode, int plane,
diff --git a/av1/common/token_cdfs.h b/av1/common/token_cdfs.h
index 837e2c8..57eb272 100644
--- a/av1/common/token_cdfs.h
+++ b/av1/common/token_cdfs.h
@@ -10368,7 +10368,6 @@
                                   },
                                 };
 
-#if CONFIG_DIP
 static const aom_cdf_prob default_intra_dip_mode_n6_cdf[CDF_SIZE(6)] = {
   AOM_CDF6(5461, 10923, 16384, 21845, 27307)
 };
@@ -10380,6 +10379,5 @@
       { { AOM_CDF2(9008) }, { AOM_CDF2(11031) }, { AOM_CDF2(16384) } },
       { { AOM_CDF2(26870) }, { AOM_CDF2(21845) }, { AOM_CDF2(16384) } }
     };
-#endif  // CONFIG_DIP
 
 #endif  // AOM_AV1_COMMON_TOKEN_CDFS_H_
diff --git a/av1/decoder/decodeframe.c b/av1/decoder/decodeframe.c
index 2b6ac21..439f185 100644
--- a/av1/decoder/decodeframe.c
+++ b/av1/decoder/decodeframe.c
@@ -6522,9 +6522,7 @@
   setup_seq_sb_size(seq_params, rb);
 
   seq_params->enable_filter_intra = aom_rb_read_bit(rb);
-#if CONFIG_DIP
   seq_params->enable_intra_dip = aom_rb_read_bit(rb);
-#endif  // CONFIG_DIP
   seq_params->enable_intra_edge_filter = aom_rb_read_bit(rb);
   if (seq_params->reduced_still_picture_hdr) {
     seq_params->seq_enabled_motion_modes = (1 << SIMPLE_TRANSLATION);
diff --git a/av1/decoder/decodemv.c b/av1/decoder/decodemv.c
index 3ade0a9..f32f0f5 100644
--- a/av1/decoder/decodemv.c
+++ b/av1/decoder/decodemv.c
@@ -906,9 +906,7 @@
       mbmi->dpcm_mode_uv = 0;
 #endif  // CONFIG_LOSSLESS_DPCM
       mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
       mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
       if (av1_is_wedge_used(bsize)) {
         mbmi->use_wedge_interintra =
 #if CONFIG_D149_CTX_MODELING_OPT
@@ -1561,7 +1559,6 @@
   }
 }
 
-#if CONFIG_DIP
 static void read_intra_dip_mode_info(const AV1_COMMON *const cm,
                                      MACROBLOCKD *const xd, aom_reader *r) {
   MB_MODE_INFO *const mbmi = xd->mi[0];
@@ -1587,7 +1584,6 @@
     }
   }
 }
-#endif  // CONFIG_DIP
 
 void av1_read_tx_type(const AV1_COMMON *const cm, MACROBLOCKD *xd, int blk_row,
                       int blk_col, TX_SIZE tx_size, aom_reader *r,
@@ -2279,9 +2275,7 @@
   mbmi->palette_mode_info.palette_size[1] = 0;
   if (xd->tree_type != CHROMA_PART) {
     mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
     mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
   }
 
   if (av1_allow_intrabc(cm, xd
@@ -2454,12 +2448,10 @@
 
   if (xd->tree_type != CHROMA_PART) read_filter_intra_mode_info(cm, xd, r);
 
-#if CONFIG_DIP
   if (xd->tree_type != CHROMA_PART) {
     mbmi->use_intra_dip = 0;
     read_intra_dip_mode_info(cm, xd, r);
   }
-#endif  // CONFIG_DIP
 }
 
 #if !CONFIG_VQ_MVD_CODING
@@ -3242,12 +3234,10 @@
 
   if (xd->tree_type != CHROMA_PART) read_filter_intra_mode_info(cm, xd, r);
 
-#if CONFIG_DIP
   if (xd->tree_type != CHROMA_PART) {
     mbmi->use_intra_dip = 0;
     read_intra_dip_mode_info(cm, xd, r);
   }
-#endif  // CONFIG_DIP
 }
 
 static INLINE int is_mv_valid(const MV *mv) {
@@ -4181,9 +4171,7 @@
       mbmi->dpcm_mode_uv = 0;
 #endif  // CONFIG_LOSSLESS_DPCM
       mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
       mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
       if (av1_is_wedge_used(bsize)) {
         mbmi->use_wedge_interintra =
 #if CONFIG_D149_CTX_MODELING_OPT
@@ -4549,9 +4537,7 @@
     mbmi->use_intrabc[0] = 0;
     mbmi->use_intrabc[1] = 0;
 #endif  // CONFIG_NEW_CONTEXT_MODELING
-#if CONFIG_DIP
     mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
 #if CONFIG_MORPH_PRED
     mbmi->morph_pred = 0;
 #endif  // CONFIG_MORPH_PRED
diff --git a/av1/encoder/bitstream.c b/av1/encoder/bitstream.c
index 67858aa..35820d7 100644
--- a/av1/encoder/bitstream.c
+++ b/av1/encoder/bitstream.c
@@ -1212,7 +1212,6 @@
   }
 }
 
-#if CONFIG_DIP
 static AOM_INLINE void write_intra_dip_mode_info(const AV1_COMMON *cm,
                                                  const MACROBLOCKD *xd,
                                                  const MB_MODE_INFO *const mbmi,
@@ -1234,7 +1233,6 @@
     }
   }
 }
-#endif  // CONFIG_DIP
 
 static AOM_INLINE void write_mb_interp_filter(AV1_COMMON *const cm,
                                               const MACROBLOCKD *xd,
@@ -2125,10 +2123,8 @@
   // Filter intra.
   write_filter_intra_mode_info(cm, xd, mbmi, w);
 
-#if CONFIG_DIP
   // Intra ML prediction
   write_intra_dip_mode_info(cm, xd, mbmi, w);
-#endif  // CONFIG_DIP
 }
 
 static INLINE int16_t mode_context_analyzer(
@@ -5804,9 +5800,7 @@
 
   write_sb_size(seq_params, wb);
   aom_wb_write_bit(wb, seq_params->enable_filter_intra);
-#if CONFIG_DIP
   aom_wb_write_bit(wb, seq_params->enable_intra_dip);
-#endif  // CONFIG_DIP
   aom_wb_write_bit(wb, seq_params->enable_intra_edge_filter);
   if (!seq_params->reduced_still_picture_hdr) {
     // Encode allowed motion modes
diff --git a/av1/encoder/block.h b/av1/encoder/block.h
index 2f6198e..ab454c8 100644
--- a/av1/encoder/block.h
+++ b/av1/encoder/block.h
@@ -945,12 +945,10 @@
 #endif  // CONFIG_D149_CTX_MODELING_OPT
   //! filter_intra_mode_cost
   int filter_intra_mode_cost[FILTER_INTRA_MODES];
-#if CONFIG_DIP
   //! intra_dip_cost
   int intra_dip_cost[DIP_CTXS][2];
   //! intra_dip_mode_cost
   int intra_dip_mode_cost[16];
-#endif  // CONFIG_DIP
   //! angle_delta_cost
   int angle_delta_cost[PARTITION_STRUCTURE_NUM][DIRECTIONAL_MODES]
                       [2 * MAX_ANGLE_DELTA + 1];
diff --git a/av1/encoder/encodeframe_utils.c b/av1/encoder/encodeframe_utils.c
index 147aeca..3572df9 100644
--- a/av1/encoder/encodeframe_utils.c
+++ b/av1/encoder/encodeframe_utils.c
@@ -745,7 +745,6 @@
                    FILTER_INTRA_MODES);
       }
     }
-#if CONFIG_DIP
     if (av1_intra_dip_allowed(cm, mbmi)) {
       const int use_intra_dip = mbmi->use_intra_dip;
       int ctx = get_intra_dip_ctx(xd->neighbors[0], xd->neighbors[1], bsize);
@@ -763,7 +762,6 @@
         update_cdf(mode_cdf, mbmi->intra_dip_mode & 15, n_modes);
       }
     }
-#endif  // CONFIG_DIP
   }
 
   if (!xd->is_chroma_ref) return;
diff --git a/av1/encoder/encoder.c b/av1/encoder/encoder.c
index 519cecf..a209260 100644
--- a/av1/encoder/encoder.c
+++ b/av1/encoder/encoder.c
@@ -459,9 +459,7 @@
   seq->enable_masked_compound = oxcf->comp_type_cfg.enable_masked_comp;
   seq->enable_intra_edge_filter = oxcf->intra_mode_cfg.enable_intra_edge_filter;
   seq->enable_filter_intra = oxcf->intra_mode_cfg.enable_filter_intra;
-#if CONFIG_DIP
   seq->enable_intra_dip = oxcf->intra_mode_cfg.enable_intra_dip;
-#endif  // CONFIG_DIP
 
   seq->enable_sdp = oxcf->part_cfg.enable_sdp;
   seq->enable_extended_sdp = oxcf->part_cfg.enable_extended_sdp;
diff --git a/av1/encoder/encoder.h b/av1/encoder/encoder.h
index 7929048..2d48678 100644
--- a/av1/encoder/encoder.h
+++ b/av1/encoder/encoder.h
@@ -271,12 +271,10 @@
    * enabled.
    */
   bool enable_filter_intra;
-#if CONFIG_DIP
   /*!
    * Flag to indicate if data-drive intra prediction should be enabled.
    */
   bool enable_intra_dip;
-#endif  // CONFIG_DIP
   /*!
    * Flag to indicate if smooth intra prediction modes should be enabled.
    */
@@ -1681,10 +1679,8 @@
 #else
   unsigned int filter_intra[BLOCK_SIZES_ALL][2];
 #endif  // CONFIG_D149_CTX_MODELING_OPT
-#if CONFIG_DIP
   unsigned int intra_dip[TOKEN_CDF_Q_CTXS][DIP_CTXS][2];
   unsigned int intra_dip_mode_n6[6];
-#endif  // CONFIG_DIP
   unsigned int switchable_restore[RESTORE_SWITCHABLE_TYPES];
   unsigned int sgrproj_restore[2];
   unsigned int wienerns_4part_cnts[WIENERNS_4PART_CTX_MAX]
@@ -1941,9 +1937,7 @@
 #if CONFIG_ML_PART_SPLIT
   void *partition_model;
 #endif  // CONFIG_ML_PART_SPLIT
-#if CONFIG_DIP_EXT_PRUNING
   void *dip_pruning_model;
-#endif  // CONFIG_DIP_EXT_PRUNING
 } ThreadData;
 
 struct EncWorkerData;
diff --git a/av1/encoder/intra_mode_search.c b/av1/encoder/intra_mode_search.c
index c904294..7ee5f0c 100644
--- a/av1/encoder/intra_mode_search.c
+++ b/av1/encoder/intra_mode_search.c
@@ -150,7 +150,6 @@
   }
 }
 
-#if CONFIG_DIP
 #if CONFIG_DIP_EXT_PRUNING
 // Check if the mode is found in the modelrd list
 static uint8_t skip_this_dip_mode(
@@ -416,7 +415,6 @@
     return 0;
   }
 }
-#endif  // CONFIG_DIP
 
 void av1_count_colors_highbd(const uint16_t *src, int stride, int rows,
                              int cols, int bit_depth, int *val_count,
@@ -1272,9 +1270,7 @@
   TX_SIZE best_tx_partition = mbmi->tx_partition_type[0];
   av1_copy_array(best_tx_type_map, xd->tx_type_map, ctx->num_4x4_blk);
   mbmi->filter_intra_mode_info.use_filter_intra = 1;
-#if CONFIG_DIP
   mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
   for (FILTER_INTRA_MODE fi_mode = FILTER_DC_PRED; fi_mode < FILTER_INTRA_MODES;
        ++fi_mode) {
     mbmi->filter_intra_mode_info.filter_intra_mode = fi_mode;
@@ -1328,7 +1324,6 @@
   }
 }
 
-#if CONFIG_DIP
 /*!\brief Search for the best data-driven intra mode when coding inter frame.
  *
  * \ingroup intra_mode_search
@@ -1429,7 +1424,6 @@
     mbmi->use_intra_dip = 0;
   }
 }
-#endif  // CONFIG_DIP
 
 int64_t av1_handle_intra_mode(IntraModeSearchState *intra_search_state,
                               const AV1_COMP *cpi, MACROBLOCK *x,
@@ -1597,7 +1591,6 @@
     }
   }
 
-#if CONFIG_DIP
   if (mode == DC_PRED && xd->tree_type != CHROMA_PART &&
       av1_intra_dip_allowed_bsize(cm, bsize)) {
     int try_intra_dip = 1;
@@ -1615,7 +1608,6 @@
                             best_rd_so_far);
     }
   }
-#endif  // CONFIG_DIP
 
   if (rd_stats_y->rate == INT_MAX) return INT64_MAX;
 
@@ -1852,9 +1844,7 @@
 #else
         mbmi->fsc_mode[PLANE_TYPE_Y] = 1;
 #endif
-#if CONFIG_DIP
           mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
           mbmi->filter_intra_mode_info.use_filter_intra = 0;
           mbmi->palette_mode_info.palette_size[0] = 0;
           int64_t this_rd;
@@ -2033,9 +2023,7 @@
                               directional_mode_skip_mask);
   }
   mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
   mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
   pmi->palette_size[0] = 0;
 
   mbmi->motion_mode = SIMPLE_TRANSLATION;
@@ -2276,7 +2264,6 @@
     }
   }
 
-#if CONFIG_DIP
   // Try Intra ML prediction (within intra frame).
   const int try_intra_dip = !cpi->sf.intra_sf.skip_intra_dip_search &&
                             av1_intra_dip_allowed_bsize(&cpi->common, bsize);
@@ -2293,7 +2280,6 @@
       best_mbmi = *mbmi;
     }
   }
-#endif  // CONFIG_DIP
 
   // No mode is identified with less rd value than best_rd passed to this
   // function. In such cases winner mode processing is not necessary and
diff --git a/av1/encoder/intra_mode_search_utils.h b/av1/encoder/intra_mode_search_utils.h
index 507cd70..bdcb2b0 100644
--- a/av1/encoder/intra_mode_search_utils.h
+++ b/av1/encoder/intra_mode_search_utils.h
@@ -270,7 +270,6 @@
                                                  .filter_intra_mode];
     }
   }
-#if CONFIG_DIP
   const int use_intra_dip = mbmi->use_intra_dip;
   if (av1_intra_dip_allowed(&cpi->common, mbmi)) {
     int ctx = get_intra_dip_ctx(xd->neighbors[0], xd->neighbors[1], bsize);
@@ -285,7 +284,6 @@
       }
     }
   }
-#endif  // CONFIG_DIP
   if (av1_allow_intrabc(&cpi->common, xd
 #if CONFIG_ENABLE_IBC_NAT
                         ,
@@ -418,7 +416,6 @@
     }
 #endif  // CONFIG_D149_CTX_MODELING_OPT
   }
-#if CONFIG_DIP
   const int use_intra_dip = mbmi->use_intra_dip;
   if (av1_intra_dip_allowed(&cpi->common, mbmi)) {
     int ctx = get_intra_dip_ctx(xd->neighbors[0], xd->neighbors[1], bsize);
@@ -434,7 +431,6 @@
       }
     }
   }
-#endif  // CONFIG_DIP
   this_rd =
       RDCOST(x->rdmult, this_rd_stats.rate + mode_cost, this_rd_stats.dist);
   return this_rd;
diff --git a/av1/encoder/palette.c b/av1/encoder/palette.c
index bddeda7..c8efcc5 100644
--- a/av1/encoder/palette.c
+++ b/av1/encoder/palette.c
@@ -482,9 +482,7 @@
     mbmi->joint_y_mode_delta_angle = DC_PRED;
     mbmi->y_mode_idx = DC_PRED;
     mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
     mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
 
     uint16_t color_cache[2 * PALETTE_MAX_SIZE];
     const int n_cache = av1_get_palette_cache(xd, 0, color_cache);
diff --git a/av1/encoder/rd.c b/av1/encoder/rd.c
index 48eb2cd..0f6fbc7 100644
--- a/av1/encoder/rd.c
+++ b/av1/encoder/rd.c
@@ -221,14 +221,12 @@
   }
 #endif  // CONFIG_D149_CTX_MODELING_OPT
 
-#if CONFIG_DIP
   for (i = 0; i < DIP_CTXS; i++) {
     av1_cost_tokens_from_cdf(mode_costs->intra_dip_cost[i],
                              fc->intra_dip_cdf[i], NULL);
   }
   av1_cost_tokens_from_cdf(mode_costs->intra_dip_mode_cost,
                            fc->intra_dip_mode_n6_cdf, NULL);
-#endif  // CONFIG_DIP
 
   for (i = 0; i < SWITCHABLE_FILTER_CONTEXTS; ++i)
     av1_cost_tokens_from_cdf(mode_costs->switchable_interp_costs[i],
diff --git a/av1/encoder/rdopt.c b/av1/encoder/rdopt.c
index e3a1d42..5b726fb 100644
--- a/av1/encoder/rdopt.c
+++ b/av1/encoder/rdopt.c
@@ -7060,9 +7060,7 @@
 
     memset(&mbmi->palette_mode_info, 0, sizeof(mbmi->palette_mode_info));
     mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
     mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
     mbmi->use_intrabc[xd->tree_type == CHROMA_PART] = 1;
     assert(xd->tree_type != CHROMA_PART);
     mbmi->angle_delta[PLANE_TYPE_Y] = 0;
@@ -7642,9 +7640,7 @@
   mbmi->bawp_flag[0] = 0;
   mbmi->bawp_flag[1] = 0;
   mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
   mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
   mbmi->interintra_mode = (INTERINTRA_MODE)(II_DC_PRED - 1);
   mbmi->comp_group_idx = 0;
   mbmi->interinter_comp.type = COMPOUND_AVERAGE;
@@ -7970,9 +7966,7 @@
       search_state->best_mbmode.interintra_mode =
           (INTERINTRA_MODE)(II_DC_PRED - 1);
       search_state->best_mbmode.filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
       search_state->best_mbmode.use_intra_dip = 0;
-#endif  // CONFIG_DIP
 
       set_default_interp_filters(&search_state->best_mbmode, cm,
 #if CONFIG_COMPOUND_4XN
@@ -8064,9 +8058,7 @@
   }
 
   mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
   mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
   mbmi->interintra_mode = (INTERINTRA_MODE)(II_DC_PRED - 1);
   mbmi->comp_group_idx = 0;
   mbmi->interinter_comp.type = COMPOUND_AVERAGE;
@@ -8155,9 +8147,7 @@
     search_state->best_mbmode.interintra_mode =
         (INTERINTRA_MODE)(II_DC_PRED - 1);
     search_state->best_mbmode.filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
     search_state->best_mbmode.use_intra_dip = 0;
-#endif  // CONFIG_DIP
 
     set_default_interp_filters(&search_state->best_mbmode, cm,
 #if CONFIG_COMPOUND_4XN
@@ -9030,9 +9020,7 @@
   pmi->palette_size[0] = 0;
   pmi->palette_size[1] = 0;
   mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
   mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
   mbmi->mv[0].as_int = mbmi->mv[1].as_int = 0;
   mbmi->cwp_idx = CWP_EQUAL;
   mbmi->motion_mode = SIMPLE_TRANSLATION;
@@ -10462,9 +10450,7 @@
             mbmi->angle_delta[PLANE_TYPE_Y] = 0;
             mbmi->angle_delta[PLANE_TYPE_UV] = 0;
             mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
             mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
 #if CONFIG_LOSSLESS_DPCM
             mbmi->use_dpcm_y = 0;
             mbmi->dpcm_mode_y = 0;
@@ -11088,9 +11074,7 @@
   mbmi->palette_mode_info.palette_size[0] = 0;
   mbmi->palette_mode_info.palette_size[1] = 0;
   mbmi->filter_intra_mode_info.use_filter_intra = 0;
-#if CONFIG_DIP
   mbmi->use_intra_dip = 0;
-#endif  // CONFIG_DIP
   mbmi->mode = GLOBALMV;
   mbmi->motion_mode = SIMPLE_TRANSLATION;
   mbmi->uv_mode = UV_DC_PRED;
diff --git a/av1/encoder/speed_features.c b/av1/encoder/speed_features.c
index 7d07959..1602fd9 100644
--- a/av1/encoder/speed_features.c
+++ b/av1/encoder/speed_features.c
@@ -387,9 +387,7 @@
 
     sf->interp_sf.use_interp_filter = 1;
     sf->intra_sf.prune_palette_search_level = 1;
-#if CONFIG_DIP
     sf->intra_sf.skip_intra_dip_search = true;
-#endif  // CONFIG_DIP
 
     sf->tx_sf.adaptive_tx_type_search_idx = 4;
     sf->tx_sf.adaptive_tx_partition_type_search_idx = 4;
@@ -786,9 +784,7 @@
   intra_sf->src_var_thresh_intra_skip = 1;
   intra_sf->prune_palette_search_level = 0;
   intra_sf->reuse_uv_mode_rd_info = false;
-#if CONFIG_DIP
   intra_sf->skip_intra_dip_search = false;
-#endif  // CONFIG_DIP
 
   for (int i = 0; i < TX_SIZES; i++) {
     intra_sf->intra_y_mode_mask[i] = INTRA_ALL;
@@ -1090,11 +1086,9 @@
     if (sf->inter_sf.disable_wedge_interintra_search) {
       cpi->common.seq_params.seq_enabled_motion_modes &= ~(1 << INTERINTRA);
     }
-#if CONFIG_DIP
     if (sf->intra_sf.skip_intra_dip_search) {
       cpi->common.seq_params.enable_intra_dip = 0;
     }
-#endif  // CONFIG_DIP
 #if CONFIG_TCQ
     // Disable tcq modes in sequence header when cpu-used >= 2
     if (sf->rd_sf.disable_tcq) {
diff --git a/av1/encoder/speed_features.h b/av1/encoder/speed_features.h
index 1d057e2..c186f465 100644
--- a/av1/encoder/speed_features.h
+++ b/av1/encoder/speed_features.h
@@ -819,9 +819,7 @@
   // False: No reuse
   // True: Reuse UV mode RD info.
   bool reuse_uv_mode_rd_info;
-#if CONFIG_DIP
   bool skip_intra_dip_search;
-#endif  // CONFIG_DIP
 } INTRA_MODE_SPEED_FEATURES;
 
 typedef struct TX_SPEED_FEATURES {
diff --git a/build/cmake/aom_config_defaults.cmake b/build/cmake/aom_config_defaults.cmake
index 2abc7f5..ebaacaf 100644
--- a/build/cmake/aom_config_defaults.cmake
+++ b/build/cmake/aom_config_defaults.cmake
@@ -164,8 +164,6 @@
 set_aom_config_var(CONFIG_EOB_POS_LUMA 1 "EOB position coding for luma.")
 set_aom_config_var(CONFIG_INTRA_SDP_SIMPLIFICATION 1 NUMBER
                    "Simplify intra sdp logic")
-set_aom_config_var(CONFIG_DIP 1 "AV2 intra data-driven prediction.")
-set_aom_config_var(CONFIG_DIP_EXT 1 "AV2 DIP Improvements.")
 set_aom_config_var(CONFIG_DIP_EXT_PRUNING 1 "AV2 DIP TFLite pruning.")
 set_aom_config_var(CONFIG_ERP_TFLITE 0 NUMBER "Build ERP with TFLite")
 set_aom_config_var(CONFIG_TCQ 1 "AV2 trellis coded quantization flag")
diff --git a/common/args.c b/common/args.c
index 0b7593e..62cb59b 100644
--- a/common/args.c
+++ b/common/args.c
@@ -149,9 +149,7 @@
 #endif  // CONFIG_ENABLE_MHCCP
     GET_PARAMS(enable_smooth_intra);
     GET_PARAMS(enable_filter_intra);
-#if CONFIG_DIP
     GET_PARAMS(enable_intra_dip);
-#endif
     GET_PARAMS(enable_angle_delta);
     GET_PARAMS(enable_opfl_refine);
 #if CONFIG_AFFINE_REFINEMENT
diff --git a/test/test.cmake b/test/test.cmake
index d42dd0a..ae3e889 100644
--- a/test/test.cmake
+++ b/test/test.cmake
@@ -102,6 +102,7 @@
     "${AOM_ROOT}/test/hiprec_convolve_test_util.h"
     "${AOM_ROOT}/test/intrabc_test.cc"
     "${AOM_ROOT}/test/intrapred_test.cc"
+    "${AOM_ROOT}/test/intra_matrix_test.cc"
     "${AOM_ROOT}/test/opt_flow_test.cc"
     "${AOM_ROOT}/test/scan_test.cc"
     "${AOM_ROOT}/test/selfguided_filter_test.cc"
@@ -112,11 +113,6 @@
     list(APPEND AOM_UNIT_TEST_COMMON_SOURCES "${AOM_ROOT}/test/gdf_test.cc")
   endif()
 
-  if(CONFIG_DIP)
-    list(APPEND AOM_UNIT_TEST_COMMON_SOURCES
-         "${AOM_ROOT}/test/intra_matrix_test.cc")
-  endif()
-
   if(CONFIG_ACCOUNTING)
     list(APPEND AOM_UNIT_TEST_COMMON_SOURCES
          "${AOM_ROOT}/test/accounting_test.cc")
diff --git a/tools/aom_entropy_optimizer.c b/tools/aom_entropy_optimizer.c
index f048ee9..9c0e0c3 100644
--- a/tools/aom_entropy_optimizer.c
+++ b/tools/aom_entropy_optimizer.c
@@ -1784,7 +1784,6 @@
                      0, &total_count, 0, mem_wanted, "Intra");
 #endif  // CONFIG_D149_CTX_MODELING_OPT
 
-#if CONFIG_DIP
   cts_each_dim[0] = TOKEN_CDF_Q_CTXS;
   cts_each_dim[1] = DIP_CTXS;
   cts_each_dim[2] = 2;
@@ -1798,7 +1797,6 @@
                      "static const aom_cdf_prob "
                      "default_intra_dip_mode_n6_cdf[CDF_SIZE(6)]",
                      0, &total_count, 0, mem_wanted, "Intra");
-#endif
 
   /* forward skip coding flag */
   cts_each_dim[0] = FSC_MODE_CONTEXTS;