{highbd,}sad_sse2.asm: add missing CONFIG_REALTIME_ONLY check
For 1:4/4:1 sizes.
Bug: aomedia:3416
Change-Id: I4f909df90ad8913bc1a46193a40afcd7af3ea674
diff --git a/aom_dsp/x86/highbd_sad_sse2.asm b/aom_dsp/x86/highbd_sad_sse2.asm
index 7aa44ea..c61c134 100644
--- a/aom_dsp/x86/highbd_sad_sse2.asm
+++ b/aom_dsp/x86/highbd_sad_sse2.asm
@@ -180,13 +180,15 @@
INIT_XMM sse2
HIGH_SAD64XN 64 ; highbd_sad64x64_sse2
HIGH_SAD64XN 32 ; highbd_sad64x32_sse2
-HIGH_SAD64XN 16 ; highbd_sad_64x16_sse2
HIGH_SAD64XN 64, 1 ; highbd_sad64x64_avg_sse2
HIGH_SAD64XN 32, 1 ; highbd_sad64x32_avg_sse2
-HIGH_SAD64XN 16, 1 ; highbd_sad_64x16_avg_sse2
HIGH_SAD64XN 64, 2 ; highbd_sad_skip_64x64_sse2
HIGH_SAD64XN 32, 2 ; highbd_sad_skip_64x32_sse2
+%if CONFIG_REALTIME_ONLY==0
+HIGH_SAD64XN 16 ; highbd_sad_64x16_sse2
+HIGH_SAD64XN 16, 1 ; highbd_sad_64x16_avg_sse2
HIGH_SAD64XN 16, 2 ; highbd_sad_skip_64x16_sse2
+%endif
; unsigned int aom_highbd_sad32x{16,32,64}_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
@@ -259,15 +261,17 @@
HIGH_SAD32XN 64 ; highbd_sad32x64_sse2
HIGH_SAD32XN 32 ; highbd_sad32x32_sse2
HIGH_SAD32XN 16 ; highbd_sad32x16_sse2
-HIGH_SAD32XN 8 ; highbd_sad_32x8_sse2
HIGH_SAD32XN 64, 1 ; highbd_sad32x64_avg_sse2
HIGH_SAD32XN 32, 1 ; highbd_sad32x32_avg_sse2
HIGH_SAD32XN 16, 1 ; highbd_sad32x16_avg_sse2
-HIGH_SAD32XN 8, 1 ; highbd_sad_32x8_avg_sse2
HIGH_SAD32XN 64, 2 ; highbd_sad_skip_32x64_sse2
HIGH_SAD32XN 32, 2 ; highbd_sad_skip_32x32_sse2
HIGH_SAD32XN 16, 2 ; highbd_sad_skip_32x16_sse2
+%if CONFIG_REALTIME_ONLY==0
+HIGH_SAD32XN 8 ; highbd_sad_32x8_sse2
+HIGH_SAD32XN 8, 1 ; highbd_sad_32x8_avg_sse2
HIGH_SAD32XN 8, 2 ; highbd_sad_skip_32x8_sse2
+%endif
; unsigned int aom_highbd_sad16x{8,16,32}_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
@@ -337,22 +341,24 @@
%endmacro
INIT_XMM sse2
-HIGH_SAD16XN 64 ; highbd_sad_16x64_sse2
HIGH_SAD16XN 32 ; highbd_sad16x32_sse2
HIGH_SAD16XN 16 ; highbd_sad16x16_sse2
HIGH_SAD16XN 8 ; highbd_sad16x8_sse2
-HIGH_SAD16XN 4 ; highbd_sad_16x4_sse2
-HIGH_SAD16XN 64, 1 ; highbd_sad_16x64_avg_sse2
HIGH_SAD16XN 32, 1 ; highbd_sad16x32_avg_sse2
HIGH_SAD16XN 16, 1 ; highbd_sad16x16_avg_sse2
HIGH_SAD16XN 8, 1 ; highbd_sad16x8_avg_sse2
-HIGH_SAD16XN 4, 1 ; highbd_sad_16x4_avg_sse2
-HIGH_SAD16XN 64, 2 ; highbd_sad_skip_16x64_sse2
HIGH_SAD16XN 32, 2 ; highbd_sad_skip_16x32_sse2
HIGH_SAD16XN 16, 2 ; highbd_sad_skip_16x16_sse2
HIGH_SAD16XN 8, 2 ; highbd_sad_skip_16x8_sse2
+%if CONFIG_REALTIME_ONLY==0
+HIGH_SAD16XN 64 ; highbd_sad_16x64_sse2
+HIGH_SAD16XN 4 ; highbd_sad_16x4_sse2
+HIGH_SAD16XN 64, 1 ; highbd_sad_16x64_avg_sse2
+HIGH_SAD16XN 4, 1 ; highbd_sad_16x4_avg_sse2
+HIGH_SAD16XN 64, 2 ; highbd_sad_skip_16x64_sse2
; Current code fails there are only 2 rows
; HIGH_SAD16XN 4, 2 ; highbd_sad_skip_16x4_sse2
+%endif
; unsigned int aom_highbd_sad8x{4,8,16}_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
@@ -430,19 +436,21 @@
%endmacro
INIT_XMM sse2
-HIGH_SAD8XN 32 ; highbd_sad_8x32_sse2
HIGH_SAD8XN 16 ; highbd_sad8x16_sse2
HIGH_SAD8XN 8 ; highbd_sad8x8_sse2
HIGH_SAD8XN 4 ; highbd_sad8x4_sse2
-HIGH_SAD8XN 32, 1 ; highbd_sad_8x32_avg_sse2
HIGH_SAD8XN 16, 1 ; highbd_sad8x16_avg_sse2
HIGH_SAD8XN 8, 1 ; highbd_sad8x8_avg_sse2
HIGH_SAD8XN 4, 1 ; highbd_sad8x4_avg_sse2
-HIGH_SAD8XN 32, 2 ; highbd_sad_skip_8x32_sse2
HIGH_SAD8XN 16, 2 ; highbd_sad_skip_8x16_sse2
HIGH_SAD8XN 8, 2 ; highbd_sad_skip_8x8_sse2
; Current code fails there are only 2 rows
; HIGH_SAD8XN 4, 2 ; highbd_sad8x4_avg_sse2
+%if CONFIG_REALTIME_ONLY==0
+HIGH_SAD8XN 32 ; highbd_sad_8x32_sse2
+HIGH_SAD8XN 32, 1 ; highbd_sad_8x32_avg_sse2
+HIGH_SAD8XN 32, 2 ; highbd_sad_skip_8x32_sse2
+%endif
; unsigned int aom_highbd_sad4x{4,8,16}_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
@@ -512,13 +520,15 @@
%endmacro
INIT_XMM sse2
-HIGH_SAD4XN 16 ; highbd_sad4x16_sse2
HIGH_SAD4XN 8 ; highbd_sad4x8_sse2
HIGH_SAD4XN 4 ; highbd_sad4x4_sse2
-HIGH_SAD4XN 16, 1 ; highbd_sad4x16_avg_sse2
HIGH_SAD4XN 8, 1 ; highbd_sad4x8_avg_sse2
HIGH_SAD4XN 4, 1 ; highbd_sad4x4_avg_sse2
-HIGH_SAD4XN 16, 2 ; highbd_sad_skip_4x16_sse2
HIGH_SAD4XN 8, 2 ; highbd_sad_skip_4x8_sse2
; Current code fails there are only 2 rows
; HIGH_SAD4XN 4, 2 ; highbd_sad_skip_4x4_sse2
+%if CONFIG_REALTIME_ONLY==0
+HIGH_SAD4XN 16 ; highbd_sad4x16_sse2
+HIGH_SAD4XN 16, 1 ; highbd_sad4x16_avg_sse2
+HIGH_SAD4XN 16, 2 ; highbd_sad_skip_4x16_sse2
+%endif
diff --git a/aom_dsp/x86/sad_sse2.asm b/aom_dsp/x86/sad_sse2.asm
index 0209add..424a954 100644
--- a/aom_dsp/x86/sad_sse2.asm
+++ b/aom_dsp/x86/sad_sse2.asm
@@ -190,15 +190,17 @@
SAD64XN 128 ; sad64x128_sse2
SAD64XN 64 ; sad64x64_sse2
SAD64XN 32 ; sad64x32_sse2
-SAD64XN 16 ; sad64x16_sse2
SAD64XN 128, 1 ; sad64x128_avg_sse2
SAD64XN 64, 1 ; sad64x64_avg_sse2
SAD64XN 32, 1 ; sad64x32_avg_sse2
-SAD64XN 16, 1 ; sad64x16_avg_sse2
SAD64XN 128, 2 ; sad64x128_skip_sse2
SAD64XN 64, 2 ; sad64x64_skip_sse2
SAD64XN 32, 2 ; sad64x32_skip_sse2
+%if CONFIG_REALTIME_ONLY==0
+SAD64XN 16 ; sad64x16_sse2
+SAD64XN 16, 1 ; sad64x16_avg_sse2
SAD64XN 16, 2 ; sad64x16_skip_sse2
+%endif
; unsigned int aom_sad32x32_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
@@ -248,15 +250,17 @@
SAD32XN 64 ; sad32x64_sse2
SAD32XN 32 ; sad32x32_sse2
SAD32XN 16 ; sad32x16_sse2
-SAD32XN 8 ; sad_32x8_sse2
SAD32XN 64, 1 ; sad32x64_avg_sse2
SAD32XN 32, 1 ; sad32x32_avg_sse2
SAD32XN 16, 1 ; sad32x16_avg_sse2
-SAD32XN 8, 1 ; sad_32x8_avg_sse2
SAD32XN 64, 2 ; sad32x64_skip_sse2
SAD32XN 32, 2 ; sad32x32_skip_sse2
SAD32XN 16, 2 ; sad32x16_skip_sse2
+%if CONFIG_REALTIME_ONLY==0
+SAD32XN 8 ; sad_32x8_sse2
+SAD32XN 8, 1 ; sad_32x8_avg_sse2
SAD32XN 8, 2 ; sad_32x8_skip_sse2
+%endif
; unsigned int aom_sad16x{8,16}_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
@@ -304,20 +308,22 @@
%endmacro
INIT_XMM sse2
-SAD16XN 64 ; sad_16x64_sse2
SAD16XN 32 ; sad16x32_sse2
SAD16XN 16 ; sad16x16_sse2
SAD16XN 8 ; sad16x8_sse2
-SAD16XN 4 ; sad_16x4_sse2
-SAD16XN 64, 1 ; sad_16x64_avg_sse2
SAD16XN 32, 1 ; sad16x32_avg_sse2
SAD16XN 16, 1 ; sad16x16_avg_sse2
SAD16XN 8, 1 ; sad16x8_avg_sse2
-SAD16XN 4, 1 ; sad_16x4_avg_sse2
-SAD16XN 64, 2 ; sad_16x64_skip_sse2
SAD16XN 32, 2 ; sad16x32_skip_sse2
SAD16XN 16, 2 ; sad16x16_skip_sse2
SAD16XN 8, 2 ; sad16x8_skip_sse2
+%if CONFIG_REALTIME_ONLY==0
+SAD16XN 64 ; sad_16x64_sse2
+SAD16XN 4 ; sad_16x4_sse2
+SAD16XN 64, 1 ; sad_16x64_avg_sse2
+SAD16XN 4, 1 ; sad_16x4_avg_sse2
+SAD16XN 64, 2 ; sad_16x64_skip_sse2
+%endif
; unsigned int aom_sad8x{8,16}_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
@@ -363,17 +369,19 @@
%endmacro
INIT_XMM sse2
-SAD8XN 32 ; sad_8x32_sse2
SAD8XN 16 ; sad8x16_sse2
SAD8XN 8 ; sad8x8_sse2
SAD8XN 4 ; sad8x4_sse2
-SAD8XN 32, 1 ; sad_8x32_avg_sse2
SAD8XN 16, 1 ; sad8x16_avg_sse2
SAD8XN 8, 1 ; sad8x8_avg_sse2
SAD8XN 4, 1 ; sad8x4_avg_sse2
-SAD8XN 32, 2 ; sad_8x32_skip_sse2
SAD8XN 16, 2 ; sad8x16_skip_sse2
SAD8XN 8, 2 ; sad8x8_skip_sse2
+%if CONFIG_REALTIME_ONLY==0
+SAD8XN 32 ; sad_8x32_sse2
+SAD8XN 32, 1 ; sad_8x32_avg_sse2
+SAD8XN 32, 2 ; sad_8x32_skip_sse2
+%endif
; unsigned int aom_sad4x{4, 8}_sse2(uint8_t *src, int src_stride,
; uint8_t *ref, int ref_stride);
@@ -422,11 +430,13 @@
%endmacro
INIT_XMM sse2
+SAD4XN 8 ; sad4x8_sse2
+SAD4XN 4 ; sad4x4_sse2
+SAD4XN 8, 1 ; sad4x8_avg_sse2
+SAD4XN 4, 1 ; sad4x4_avg_sse2
+SAD4XN 8, 2 ; sad4x8_skip_sse2
+%if CONFIG_REALTIME_ONLY==0
SAD4XN 16 ; sad_4x16_sse2
-SAD4XN 8 ; sad4x8_sse
-SAD4XN 4 ; sad4x4_sse
SAD4XN 16, 1 ; sad_4x16_avg_sse2
-SAD4XN 8, 1 ; sad4x8_avg_sse
-SAD4XN 4, 1 ; sad4x4_avg_sse
SAD4XN 16, 2 ; sad_4x16_skip_sse2
-SAD4XN 8, 2 ; sad4x8_skip_sse
+%endif
