commit 6e245de8f0ad3321f843ef979509cd6bcd9697d6
author chiyotsai <chiyotsai@google.com> Mon Jul 12 19:18:16 2021 -0700
committer Chi Yo Tsai <chiyotsai@google.com> Tue Jul 13 21:00:53 2021 +0000
tree 7e395e157ada6ab9949ab7272658fed41ba38a12
parent e2dc0caf5ae6732d351796db7b571065195f1341

Enable skip_intra_in_inter_frames for realtime mode

 SPD_SET | TESTSET | AVG_PSNR | OVR_PSNR |  SSIM   |  SPD
---------+---------+----------+----------+---------+-------
    5    |rtc_derf | +0.053%  | +0.076%  | +0.093% |+20.0%
    5    |   rtc   | +0.175%  | +0.176%  | +0.266% |+14.1%
---------+---------+----------+----------+---------+-------
    6    |rtc_derf | +0.271%  | +0.313%  | +0.493% |+19.2%
    6    |   rtc   | +0.193%  | +0.191%  | +0.562% |+15.7%
---------+---------+----------+----------+---------+-------

STATS_CHANGED

Change-Id: I270cb86a266a17f66c9b803238d00b17dd6caadc

av1/encoder/speed_features.c

diff --git a/av1/encoder/speed_features.c b/av1/encoder/speed_features.c
index c29d4bc..438c12f 100644
--- a/av1/encoder/speed_features.c
+++ b/av1/encoder/speed_features.c
@@ -1355,6 +1355,7 @@
       sf->intra_sf.intra_y_mode_mask[i] = INTRA_DC;
       sf->intra_sf.intra_uv_mode_mask[i] = UV_INTRA_DC_CFL;
     }
+    sf->intra_sf.skip_intra_in_interframe = 5;
 
     sf->tx_sf.tx_type_search.prune_2d_txfm_mode = TX_TYPE_PRUNE_3;
     sf->tx_sf.use_inter_txb_hash = 0;