Merge "Add VPX_TS_ prefix to MAX_LAYERS, MAX_PERIODICITY" into eider
diff --git a/vp8/common/arm/neon/vp8_subpixelvariance16x16_neon.asm b/vp8/common/arm/neon/vp8_subpixelvariance16x16_neon.asm
index d753ad1..e7a3ed1 100644
--- a/vp8/common/arm/neon/vp8_subpixelvariance16x16_neon.asm
+++ b/vp8/common/arm/neon/vp8_subpixelvariance16x16_neon.asm
@@ -9,6 +9,11 @@
;
+bilinear_taps_coeff
+ DCD 128, 0, 112, 16, 96, 32, 80, 48, 64, 64, 48, 80, 32, 96, 16, 112
+
+;-----------------
+
EXPORT |vp8_sub_pixel_variance16x16_neon_func|
ARM
REQUIRE8
@@ -27,7 +32,7 @@
|vp8_sub_pixel_variance16x16_neon_func| PROC
push {r4-r6, lr}
- ldr r12, _BilinearTaps_coeff_
+ adr r12, bilinear_taps_coeff
ldr r4, [sp, #16] ;load *dst_ptr from stack
ldr r5, [sp, #20] ;load dst_pixels_per_line from stack
ldr r6, [sp, #24] ;load *sse from stack
@@ -415,11 +420,4 @@
ENDP
-;-----------------
-
-_BilinearTaps_coeff_
- DCD bilinear_taps_coeff
-bilinear_taps_coeff
- DCD 128, 0, 112, 16, 96, 32, 80, 48, 64, 64, 48, 80, 32, 96, 16, 112
-
END
diff --git a/vp8/common/arm/neon/vp8_subpixelvariance8x8_neon.asm b/vp8/common/arm/neon/vp8_subpixelvariance8x8_neon.asm
index cc7ae52..f6b6847 100644
--- a/vp8/common/arm/neon/vp8_subpixelvariance8x8_neon.asm
+++ b/vp8/common/arm/neon/vp8_subpixelvariance8x8_neon.asm
@@ -27,7 +27,7 @@
|vp8_sub_pixel_variance8x8_neon| PROC
push {r4-r5, lr}
- ldr r12, _BilinearTaps_coeff_
+ adr r12, bilinear_taps_coeff
ldr r4, [sp, #12] ;load *dst_ptr from stack
ldr r5, [sp, #16] ;load dst_pixels_per_line from stack
ldr lr, [sp, #20] ;load *sse from stack
@@ -216,8 +216,6 @@
;-----------------
-_BilinearTaps_coeff_
- DCD bilinear_taps_coeff
bilinear_taps_coeff
DCD 128, 0, 112, 16, 96, 32, 80, 48, 64, 64, 48, 80, 32, 96, 16, 112
diff --git a/vp8/common/onyx.h b/vp8/common/onyx.h
index b9a282b..2e282f6 100644
--- a/vp8/common/onyx.h
+++ b/vp8/common/onyx.h
@@ -60,14 +60,14 @@
MODE_BESTQUALITY = 0x2,
MODE_FIRSTPASS = 0x3,
MODE_SECONDPASS = 0x4,
- MODE_SECONDPASS_BEST = 0x5,
+ MODE_SECONDPASS_BEST = 0x5
} MODE;
typedef enum
{
FRAMEFLAGS_KEY = 1,
FRAMEFLAGS_GOLDEN = 2,
- FRAMEFLAGS_ALTREF = 4,
+ FRAMEFLAGS_ALTREF = 4
} FRAMETYPE_FLAGS;
diff --git a/vp8/encoder/arm/neon/fastquantizeb_neon.asm b/vp8/encoder/arm/neon/fastquantizeb_neon.asm
index c970cb7..1430588 100644
--- a/vp8/encoder/arm/neon/fastquantizeb_neon.asm
+++ b/vp8/encoder/arm/neon/fastquantizeb_neon.asm
@@ -98,7 +98,7 @@
vmul.s16 q2, q6, q4 ; x * Dequant
vmul.s16 q3, q7, q5
- ldr r0, _inv_zig_zag_ ; load ptr of inverse zigzag table
+ adr r0, inv_zig_zag ; load ptr of inverse zigzag table
vceq.s16 q8, q8 ; set q8 to all 1
@@ -181,7 +181,7 @@
vadd.s16 q12, q14 ; x + Round
vadd.s16 q13, q15
- ldr r0, _inv_zig_zag_ ; load ptr of inverse zigzag table
+ adr r0, inv_zig_zag ; load ptr of inverse zigzag table
vqdmulh.s16 q12, q8 ; y = ((Round+abs(z)) * Quant) >> 16
vqdmulh.s16 q13, q9
@@ -247,9 +247,6 @@
ENDP
; default inverse zigzag table is defined in vp8/common/entropy.c
-_inv_zig_zag_
- DCD inv_zig_zag
-
ALIGN 16 ; enable use of @128 bit aligned loads
inv_zig_zag
DCW 0x0001, 0x0002, 0x0006, 0x0007
diff --git a/vp8/encoder/onyx_int.h b/vp8/encoder/onyx_int.h
index c7cfc09..364a46d 100644
--- a/vp8/encoder/onyx_int.h
+++ b/vp8/encoder/onyx_int.h
@@ -162,7 +162,7 @@
THR_SPLIT2 = 17,
THR_SPLIT3 = 18,
- THR_B_PRED = 19,
+ THR_B_PRED = 19
}
THR_MODES;
diff --git a/vpx/vp8.h b/vpx/vp8.h
index eec9797..393b161 100644
--- a/vpx/vp8.h
+++ b/vpx/vp8.h
@@ -46,7 +46,7 @@
VP8_SET_DBG_COLOR_B_MODES = 6, /**< set which blocks modes to color */
VP8_SET_DBG_DISPLAY_MV = 7, /**< set which motion vector modes to draw */
VP8_COMMON_CTRL_ID_MAX,
- VP8_DECODER_CTRL_ID_START = 256,
+ VP8_DECODER_CTRL_ID_START = 256
};
/*!\brief post process flags
@@ -63,7 +63,7 @@
VP8_DEBUG_TXT_MBLK_MODES = 1<<4, /**< print macro block modes over each macro block */
VP8_DEBUG_TXT_DC_DIFF = 1<<5, /**< print dc diff for each macro block */
VP8_DEBUG_TXT_RATE_INFO = 1<<6, /**< print video rate info (encoder only) */
- VP8_MFQE = 1<<10,
+ VP8_MFQE = 1<<10
};
/*!\brief post process flags
diff --git a/vpx/vp8cx.h b/vpx/vp8cx.h
index 5275283..0af631c 100644
--- a/vpx/vp8cx.h
+++ b/vpx/vp8cx.h
@@ -177,7 +177,7 @@
* to a keyframe, set this to 450.
*
*/
- VP8E_SET_MAX_INTRA_BITRATE_PCT,
+ VP8E_SET_MAX_INTRA_BITRATE_PCT
};
/*!\brief vpx 1-D scaling mode
@@ -258,7 +258,7 @@
VP8_ONE_TOKENPARTITION = 0,
VP8_TWO_TOKENPARTITION = 1,
VP8_FOUR_TOKENPARTITION = 2,
- VP8_EIGHT_TOKENPARTITION = 3,
+ VP8_EIGHT_TOKENPARTITION = 3
} vp8e_token_partitions;
diff --git a/vpx_ports/mem.h b/vpx_ports/mem.h
index 9ec34fe..29e507f 100644
--- a/vpx_ports/mem.h
+++ b/vpx_ports/mem.h
@@ -14,7 +14,7 @@
#include "vpx_config.h"
#include "vpx/vpx_integer.h"
-#if defined(__GNUC__) && __GNUC__
+#if (defined(__GNUC__) && __GNUC__) || defined(__SUNPRO_C)
#define DECLARE_ALIGNED(n,typ,val) typ val __attribute__ ((aligned (n)))
#elif defined(_MSC_VER)
#define DECLARE_ALIGNED(n,typ,val) __declspec(align(n)) typ val
diff --git a/vpx_ports/x86.h b/vpx_ports/x86.h
index 1f3d5eb..1341c7f 100644
--- a/vpx_ports/x86.h
+++ b/vpx_ports/x86.h
@@ -50,6 +50,26 @@
: "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \
: "a" (func));
#endif
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+#if ARCH_X86_64
+#define cpuid(func,ax,bx,cx,dx)\
+ asm volatile (\
+ "xchg %rsi, %rbx \n\t" \
+ "cpuid \n\t" \
+ "movl %ebx, %edi \n\t" \
+ "xchg %rsi, %rbx \n\t" \
+ : "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \
+ : "a" (func));
+#else
+#define cpuid(func,ax,bx,cx,dx)\
+ asm volatile (\
+ "pushl %ebx \n\t" \
+ "cpuid \n\t" \
+ "movl %ebx, %edi \n\t" \
+ "popl %ebx \n\t" \
+ : "=a" (ax), "=D" (bx), "=c" (cx), "=d" (dx) \
+ : "a" (func));
+#endif
#else
#if ARCH_X86_64
void __cpuid(int CPUInfo[4], int info_type);
@@ -136,6 +156,10 @@
unsigned int tsc;
__asm__ __volatile__("rdtsc\n\t":"=a"(tsc):);
return tsc;
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+ unsigned int tsc;
+ asm volatile("rdtsc\n\t":"=a"(tsc):);
+ return tsc;
#else
#if ARCH_X86_64
return __rdtsc();
@@ -149,6 +173,9 @@
#if defined(__GNUC__) && __GNUC__
#define x86_pause_hint()\
__asm__ __volatile__ ("pause \n\t")
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+#define x86_pause_hint()\
+ asm volatile ("pause \n\t")
#else
#if ARCH_X86_64
#define x86_pause_hint()\
@@ -172,6 +199,19 @@
__asm__ __volatile__("fstcw %0\n\t":"=m"(*&mode):);
return mode;
}
+#elif defined(__SUNPRO_C) || defined(__SUNPRO_CC)
+static void
+x87_set_control_word(unsigned short mode)
+{
+ asm volatile("fldcw %0" : : "m"(*&mode));
+}
+static unsigned short
+x87_get_control_word(void)
+{
+ unsigned short mode;
+ asm volatile("fstcw %0\n\t":"=m"(*&mode):);
+ return mode;
+}
#elif ARCH_X86_64
/* No fldcw intrinsics on Windows x64, punt to external asm */
extern void vpx_winx64_fldcw(unsigned short mode);
