Fix Hadamard 32x32 test failures for Arm Neon

Some Hadamard 32x32 tests started to fail for Arm Neon after
https://aomedia-review.googlesource.com/c/aom/+/177101. The cause of the
test failures is replacing a right shift of 2 bits by two right shifts
of 1 bit with an addition or subtraction in between. The test failures
for bit depth 8 are also caused by int16_t being too small for some
intermediate results.

Fix the test failures by using int32_t for bit depth 8 and
right-shifting by 2.

Relevant CLs:
https://aomedia-review.googlesource.com/c/aom/+/168121
https://aomedia-review.googlesource.com/c/aom/+/175883
https://aomedia-review.googlesource.com/c/aom/+/176963
https://aomedia-review.googlesource.com/c/aom/+/177041

Bug: aomedia:3455
Change-Id: I771e429c373097b51b044a8a2615104e834563fa
(cherry picked from commit 5adc4286964c929c0d13d95afb8243dc857a17b3)

aom_dsp/arm/hadamard_neon.c

diff --git a/aom_dsp/arm/hadamard_neon.c b/aom_dsp/arm/hadamard_neon.c
index 93f2b81..82ce0cd 100644
--- a/aom_dsp/arm/hadamard_neon.c
+++ b/aom_dsp/arm/hadamard_neon.c
@@ -265,27 +265,27 @@
   aom_hadamard_16x16_neon(src_diff + 16 + 16 * src_stride, src_stride,
                           coeff + 768);
 
-  for (int i = 0; i < 256; i += 8) {
-    const int16x8_t a0 = load_tran_low_to_s16q(coeff);
-    const int16x8_t a1 = load_tran_low_to_s16q(coeff + 256);
-    const int16x8_t a2 = load_tran_low_to_s16q(coeff + 512);
-    const int16x8_t a3 = load_tran_low_to_s16q(coeff + 768);
+  for (int i = 0; i < 256; i += 4) {
+    const int32x4_t a0 = vld1q_s32(coeff);
+    const int32x4_t a1 = vld1q_s32(coeff + 256);
+    const int32x4_t a2 = vld1q_s32(coeff + 512);
+    const int32x4_t a3 = vld1q_s32(coeff + 768);
 
-    const int16x8_t b0 = vhaddq_s16(a0, a1);
-    const int16x8_t b1 = vhsubq_s16(a0, a1);
-    const int16x8_t b2 = vhaddq_s16(a2, a3);
-    const int16x8_t b3 = vhsubq_s16(a2, a3);
+    const int32x4_t b0 = vshrq_n_s32(vaddq_s32(a0, a1), 2);
+    const int32x4_t b1 = vshrq_n_s32(vsubq_s32(a0, a1), 2);
+    const int32x4_t b2 = vshrq_n_s32(vaddq_s32(a2, a3), 2);
+    const int32x4_t b3 = vshrq_n_s32(vsubq_s32(a2, a3), 2);
 
-    const int16x8_t c0 = vhaddq_s16(b0, b2);
-    const int16x8_t c1 = vhaddq_s16(b1, b3);
-    const int16x8_t c2 = vhsubq_s16(b0, b2);
-    const int16x8_t c3 = vhsubq_s16(b1, b3);
+    const int32x4_t c0 = vaddq_s32(b0, b2);
+    const int32x4_t c1 = vaddq_s32(b1, b3);
+    const int32x4_t c2 = vsubq_s32(b0, b2);
+    const int32x4_t c3 = vsubq_s32(b1, b3);
 
-    store_s16q_to_tran_low(coeff + 0, c0);
-    store_s16q_to_tran_low(coeff + 256, c1);
-    store_s16q_to_tran_low(coeff + 512, c2);
-    store_s16q_to_tran_low(coeff + 768, c3);
+    vst1q_s32(coeff + 0, c0);
+    vst1q_s32(coeff + 256, c1);
+    vst1q_s32(coeff + 512, c2);
+    vst1q_s32(coeff + 768, c3);
 
-    coeff += 8;
+    coeff += 4;
   }
 }

aom_dsp/arm/highbd_hadamard_neon.c

diff --git a/aom_dsp/arm/highbd_hadamard_neon.c b/aom_dsp/arm/highbd_hadamard_neon.c
index 2d0f8bc..aad2046 100644
--- a/aom_dsp/arm/highbd_hadamard_neon.c
+++ b/aom_dsp/arm/highbd_hadamard_neon.c
@@ -195,15 +195,15 @@
     int32x4_t a2 = vld1q_s32(coeff + 4 * i + 512);
     int32x4_t a3 = vld1q_s32(coeff + 4 * i + 768);
 
-    int32x4_t b0 = vhaddq_s32(a0, a1);
-    int32x4_t b1 = vhsubq_s32(a0, a1);
-    int32x4_t b2 = vhaddq_s32(a2, a3);
-    int32x4_t b3 = vhsubq_s32(a2, a3);
+    int32x4_t b0 = vshrq_n_s32(vaddq_s32(a0, a1), 2);
+    int32x4_t b1 = vshrq_n_s32(vsubq_s32(a0, a1), 2);
+    int32x4_t b2 = vshrq_n_s32(vaddq_s32(a2, a3), 2);
+    int32x4_t b3 = vshrq_n_s32(vsubq_s32(a2, a3), 2);
 
-    int32x4_t c0 = vhaddq_s32(b0, b2);
-    int32x4_t c1 = vhaddq_s32(b1, b3);
-    int32x4_t c2 = vhsubq_s32(b0, b2);
-    int32x4_t c3 = vhsubq_s32(b1, b3);
+    int32x4_t c0 = vaddq_s32(b0, b2);
+    int32x4_t c1 = vaddq_s32(b1, b3);
+    int32x4_t c2 = vsubq_s32(b0, b2);
+    int32x4_t c3 = vsubq_s32(b1, b3);
 
     vst1q_s32(coeff + 4 * i, c0);
     vst1q_s32(coeff + 4 * i + 256, c1);