commit fc1865925fcc36aa581abfbfb11c52c10a6f4c97
author James Zern <jzern@google.com> Fri Apr 28 15:57:17 2023 -0700
committer James Zern <jzern@google.com> Mon May 01 10:25:08 2023 -0700
tree 5b8d53323be0ceb0743239471772f7de3bfb4508
parent ca11f82d3969093d8ac85a7470dc754a437c8c52

temporal_filter_neon: set lanes with intrinsic fns

Don't assume the NEON types are backed by a vector type and use
intrinsics to set register lanes. This fixes compilation errors on
Windows Arm64; no change in assembly.

Bug: b/277255390
Change-Id: Ic1f23eba427cf26902dacc36bfdd80532251e732

av1/encoder/arm/neon/temporal_filter_neon.c

diff --git a/av1/encoder/arm/neon/temporal_filter_neon.c b/av1/encoder/arm/neon/temporal_filter_neon.c
index a287ffe..0b74630 100644
--- a/av1/encoder/arm/neon/temporal_filter_neon.c
+++ b/av1/encoder/arm/neon/temporal_filter_neon.c
@@ -63,11 +63,13 @@
   uint8x8_t s = vld1_u8(src);
 
   if (col == 0) {
-    s[0] = s[2];
-    s[1] = s[2];
+    const uint8_t lane2 = vget_lane_u8(s, 2);
+    s = vset_lane_u8(lane2, s, 0);
+    s = vset_lane_u8(lane2, s, 1);
   } else if (col >= block_width - 4) {
-    s[6] = s[5];
-    s[7] = s[5];
+    const uint8_t lane5 = vget_lane_u8(s, 5);
+    s = vset_lane_u8(lane5, s, 6);
+    s = vset_lane_u8(lane5, s, 7);
   }
   return vcombine_u8(s, s);
 }
@@ -236,11 +238,13 @@
   uint16x8_t s = vld1q_u16(src);
 
   if (col == 0) {
-    s[0] = s[2];
-    s[1] = s[2];
+    const uint16_t lane2 = vgetq_lane_u16(s, 2);
+    s = vsetq_lane_u16(lane2, s, 0);
+    s = vsetq_lane_u16(lane2, s, 1);
   } else if (col >= block_width - 4) {
-    s[6] = s[5];
-    s[7] = s[5];
+    const uint16_t lane5 = vgetq_lane_u16(s, 5);
+    s = vsetq_lane_u16(lane5, s, 6);
+    s = vsetq_lane_u16(lane5, s, 7);
   }
   return s;
 }