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Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_ENCODER_BLOCK_H_
13#define AV1_ENCODER_BLOCK_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
15#include "av1/common/entropymv.h"
16#include "av1/common/entropy.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070017#include "av1/common/mvref_common.h"
Hui Su1ddf2312017-08-19 15:21:34 -070018#include "av1/encoder/hash.h"
Yushin Cho55104332017-08-14 16:15:43 -070019#if CONFIG_DIST_8X8
20#include "aom/aomcx.h"
21#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070022
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27typedef struct {
28 unsigned int sse;
29 int sum;
30 unsigned int var;
Urvang Joshi454280d2016-10-14 16:51:44 -070031} DIFF;
Yaowu Xuc27fc142016-08-22 16:08:15 -070032
33typedef struct macroblock_plane {
34 DECLARE_ALIGNED(16, int16_t, src_diff[MAX_SB_SQUARE]);
35 tran_low_t *qcoeff;
36 tran_low_t *coeff;
37 uint16_t *eobs;
Angie Chiang74e23072017-03-24 14:54:23 -070038#if CONFIG_LV_MAP
39 uint8_t *txb_entropy_ctx;
40#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070041 struct buf_2d src;
42
43 // Quantizer setings
Monty Montgomery125c0fc2017-10-26 00:44:35 -040044 // These are used/accessed only in the quantization process
45 // RDO does not / must not depend on any of these values
46 // All values below share the coefficient scale/shift used in TX
47 const int16_t *quant_fp_QTX;
48 const int16_t *round_fp_QTX;
49 const int16_t *quant_QTX;
50 const int16_t *quant_shift_QTX;
51 const int16_t *zbin_QTX;
52 const int16_t *round_QTX;
53 const int16_t *dequant_QTX;
Yaowu Xuc27fc142016-08-22 16:08:15 -070054#if CONFIG_NEW_QUANT
55 const cuml_bins_type_nuq *cuml_bins_nuq[QUANT_PROFILES];
Monty Montgomery125c0fc2017-10-26 00:44:35 -040056 const dequant_val_type_nuq *dequant_val_nuq_QTX[QUANT_PROFILES];
Yaowu Xuc27fc142016-08-22 16:08:15 -070057#endif // CONFIG_NEW_QUANT
Yaowu Xuc27fc142016-08-22 16:08:15 -070058} MACROBLOCK_PLANE;
59
hui suc0cf71d2017-07-20 16:38:50 -070060typedef int av1_coeff_cost[PLANE_TYPES][REF_TYPES][COEF_BANDS][COEFF_CONTEXTS]
61 [TAIL_TOKENS];
Yaowu Xuc27fc142016-08-22 16:08:15 -070062
Jingning Handfd72322017-08-09 14:04:12 -070063#if CONFIG_LV_MAP
64typedef struct {
65 int txb_skip_cost[TXB_SKIP_CONTEXTS][2];
Ola Hugosson13892102017-11-06 08:01:44 +010066#if CONFIG_LV_MAP_MULTI
Dake He3fe369c2017-11-16 17:56:44 -080067#if USE_BASE_EOB_ALPHABET
68 int base_eob_cost[SIG_COEF_CONTEXTS_EOB][3];
69#endif
Ola Hugosson13892102017-11-06 08:01:44 +010070 int base_cost[SIG_COEF_CONTEXTS][4];
71#else
Jingning Handfd72322017-08-09 14:04:12 -070072 int nz_map_cost[SIG_COEF_CONTEXTS][2];
Ola Hugosson13892102017-11-06 08:01:44 +010073#endif
Jingning Handfd72322017-08-09 14:04:12 -070074 int eob_cost[EOB_COEF_CONTEXTS][2];
Angie Chiang7ab884e2017-10-18 15:57:12 -070075 int eob_extra_cost[EOB_COEF_CONTEXTS][2];
Jingning Handfd72322017-08-09 14:04:12 -070076 int dc_sign_cost[DC_SIGN_CONTEXTS][2];
Ola Hugosson13892102017-11-06 08:01:44 +010077#if !CONFIG_LV_MAP_MULTI
Jingning Handfd72322017-08-09 14:04:12 -070078 int base_cost[NUM_BASE_LEVELS][COEFF_BASE_CONTEXTS][2];
Ola Hugosson13892102017-11-06 08:01:44 +010079#endif
Angie Chiang26d3e452017-09-29 17:40:02 -070080 int lps_cost[LEVEL_CONTEXTS][COEFF_BASE_RANGE + 1];
Ola Hugossone72a2092017-11-12 09:11:53 +010081#if !CONFIG_LV_MAP_MULTI
Jingning Han87b01b52017-08-31 12:07:20 -070082 int br_cost[BASE_RANGE_SETS][LEVEL_CONTEXTS][2];
Ola Hugossone72a2092017-11-12 09:11:53 +010083#endif
Jingning Handfd72322017-08-09 14:04:12 -070084} LV_MAP_COEFF_COST;
Jingning Hanf5a4d3b2017-08-27 23:01:19 -070085
86typedef struct {
87 tran_low_t tcoeff[MAX_MB_PLANE][MAX_SB_SQUARE];
88 uint16_t eobs[MAX_MB_PLANE][MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
89 uint8_t txb_skip_ctx[MAX_MB_PLANE]
90 [MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
91 int dc_sign_ctx[MAX_MB_PLANE]
92 [MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
93} CB_COEFF_BUFFER;
Jingning Handfd72322017-08-09 14:04:12 -070094#endif
95
Yaowu Xuc27fc142016-08-22 16:08:15 -070096typedef struct {
97 int_mv ref_mvs[MODE_CTX_REF_FRAMES][MAX_MV_REF_CANDIDATES];
98 int16_t mode_context[MODE_CTX_REF_FRAMES];
Angie Chiangf0fbf9d2017-03-15 15:01:22 -070099#if CONFIG_LV_MAP
Angie Chiangc484abe2017-03-20 15:43:11 -0700100 // TODO(angiebird): Reduce the buffer size according to sb_type
Jingning Hanf5a4d3b2017-08-27 23:01:19 -0700101 tran_low_t *tcoeff[MAX_MB_PLANE];
102 uint16_t *eobs[MAX_MB_PLANE];
103 uint8_t *txb_skip_ctx[MAX_MB_PLANE];
104 int *dc_sign_ctx[MAX_MB_PLANE];
Angie Chiangf0fbf9d2017-03-15 15:01:22 -0700105#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700106 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
107 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700108 int16_t compound_mode_context[MODE_CTX_REF_FRAMES];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700109} MB_MODE_INFO_EXT;
110
Alex Converse0fa0f422017-04-24 12:51:14 -0700111typedef struct {
112 int col_min;
113 int col_max;
114 int row_min;
115 int row_max;
116} MvLimits;
117
Yaowu Xuc27fc142016-08-22 16:08:15 -0700118typedef struct {
Hui Su473cf892017-11-08 18:14:31 -0800119 uint8_t best_palette_color_map[MAX_PALETTE_SQUARE];
120 float kmeans_data_buf[2 * MAX_PALETTE_SQUARE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700121} PALETTE_BUFFER;
122
Hui Su1ddf2312017-08-19 15:21:34 -0700123typedef struct {
124 TX_TYPE tx_type;
125 TX_SIZE tx_size;
Hui Su1ddf2312017-08-19 15:21:34 -0700126 TX_SIZE min_tx_size;
127 TX_SIZE inter_tx_size[MAX_MIB_SIZE][MAX_MIB_SIZE];
128 uint8_t blk_skip[MAX_MIB_SIZE * MAX_MIB_SIZE * 8];
Hui Su1ddf2312017-08-19 15:21:34 -0700129#if CONFIG_TXK_SEL
130 TX_TYPE txk_type[MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
131#endif // CONFIG_TXK_SEL
132 RD_STATS rd_stats;
133 uint32_t hash_value;
134} TX_RD_INFO;
135
136#define RD_RECORD_BUFFER_LEN 8
137typedef struct {
138 TX_RD_INFO tx_rd_info[RD_RECORD_BUFFER_LEN]; // Circular buffer.
139 int index_start;
140 int num;
141 CRC_CALCULATOR crc_calculator; // Hash function.
142} TX_RD_RECORD;
143
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700144typedef struct {
145 int64_t dist;
146 int rate;
Hui Su8c2b9132017-12-09 10:40:15 -0800147 uint16_t eob;
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700148 uint8_t entropy_context;
149 uint8_t valid;
150 uint8_t fast;
151} TX_SIZE_RD_INFO;
152
153#define TX_SIZE_RD_RECORD_BUFFER_LEN 256
154typedef struct {
155 uint32_t hash_vals[TX_SIZE_RD_RECORD_BUFFER_LEN];
156 TX_SIZE_RD_INFO tx_rd_info[TX_SIZE_RD_RECORD_BUFFER_LEN][TX_TYPES];
157 int index_start;
158 int num;
159} TX_SIZE_RD_RECORD;
160
161typedef struct tx_size_rd_info_node {
162 TX_SIZE_RD_INFO *rd_info_array; // Points to array of size TX_TYPES.
163 struct tx_size_rd_info_node *children[4];
164} TX_SIZE_RD_INFO_NODE;
165
Yaowu Xuc27fc142016-08-22 16:08:15 -0700166typedef struct macroblock MACROBLOCK;
167struct macroblock {
168 struct macroblock_plane plane[MAX_MB_PLANE];
169
Hui Su1ddf2312017-08-19 15:21:34 -0700170 // Save the transform RD search info.
171 TX_RD_RECORD tx_rd_record;
172
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700173 // Also save RD info on the TX size search level for square TX sizes.
174 TX_SIZE_RD_RECORD
175 tx_size_rd_record_8X8[(MAX_MIB_SIZE >> 1) * (MAX_MIB_SIZE >> 1)];
176 TX_SIZE_RD_RECORD
177 tx_size_rd_record_16X16[(MAX_MIB_SIZE >> 2) * (MAX_MIB_SIZE >> 2)];
178 TX_SIZE_RD_RECORD
179 tx_size_rd_record_32X32[(MAX_MIB_SIZE >> 3) * (MAX_MIB_SIZE >> 3)];
180#if CONFIG_TX64X64
181 TX_SIZE_RD_RECORD
182 tx_size_rd_record_64X64[(MAX_MIB_SIZE >> 4) * (MAX_MIB_SIZE >> 4)];
183#endif
184
Yaowu Xuc27fc142016-08-22 16:08:15 -0700185 MACROBLOCKD e_mbd;
186 MB_MODE_INFO_EXT *mbmi_ext;
187 int skip_block;
David Barkerd7d78c82016-10-24 10:55:35 +0100188 int qindex;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700189
190 // The equivalent error at the current rdmult of one whole bit (not one
191 // bitcost unit).
192 int errorperbit;
193 // The equivalend SAD error of one (whole) bit at the current quantizer
194 // for large blocks.
195 int sadperbit16;
196 // The equivalend SAD error of one (whole) bit at the current quantizer
197 // for sub-8x8 blocks.
198 int sadperbit4;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700199 int rdmult;
200 int mb_energy;
201 int *m_search_count_ptr;
202 int *ex_search_count_ptr;
203
Jingning Han9777afc2016-10-20 15:17:43 -0700204 unsigned int txb_split_count;
Jingning Han9777afc2016-10-20 15:17:43 -0700205
Yaowu Xuc27fc142016-08-22 16:08:15 -0700206 // These are set to their default values at the beginning, and then adjusted
207 // further in the encoding process.
208 BLOCK_SIZE min_partition_size;
209 BLOCK_SIZE max_partition_size;
210
211 int mv_best_ref_index[TOTAL_REFS_PER_FRAME];
212 unsigned int max_mv_context[TOTAL_REFS_PER_FRAME];
213 unsigned int source_variance;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700214 unsigned int pred_sse[TOTAL_REFS_PER_FRAME];
215 int pred_mv_sad[TOTAL_REFS_PER_FRAME];
216
Yaowu Xuc27fc142016-08-22 16:08:15 -0700217 int *nmvjointcost;
218 int nmv_vec_cost[NMV_CONTEXTS][MV_JOINTS];
219 int *nmvcost[NMV_CONTEXTS][2];
220 int *nmvcost_hp[NMV_CONTEXTS][2];
221 int **mv_cost_stack[NMV_CONTEXTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700222 int **mvcost;
Alex Conversea127a792017-05-23 15:27:21 -0700223
Yue Chene9638cc2016-10-10 12:37:54 -0700224 int32_t *wsrc_buf;
225 int32_t *mask_buf;
Jingning Hand064cf02017-06-01 10:00:39 -0700226 uint8_t *above_pred_buf;
227 uint8_t *left_pred_buf;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700228
229 PALETTE_BUFFER *palette_buffer;
230
231 // These define limits to motion vector components to prevent them
232 // from extending outside the UMV borders
Alex Converse0fa0f422017-04-24 12:51:14 -0700233 MvLimits mv_limits;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700234
Jingning Han9ca05b72017-01-03 14:41:36 -0800235 uint8_t blk_skip[MAX_MB_PLANE][MAX_MIB_SIZE * MAX_MIB_SIZE * 8];
Jingning Han9ca05b72017-01-03 14:41:36 -0800236 uint8_t blk_skip_drl[MAX_MB_PLANE][MAX_MIB_SIZE * MAX_MIB_SIZE * 8];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700237
238 int skip;
Jingning Han8efdbc82017-02-19 14:40:03 -0800239 int skip_chroma_rd;
Zoe Liu1eed2df2017-10-16 17:13:15 -0700240 int skip_cost[SKIP_CONTEXTS][2];
241
Zoe Liuf40a9572017-10-13 12:37:19 -0700242#if CONFIG_EXT_SKIP
243 int skip_mode; // 0: off; 1: on
244 int skip_mode_cost[SKIP_CONTEXTS][2];
245
246 int64_t skip_mode_rdcost; // -1: Not set
247 int skip_mode_rate;
248 int64_t skip_mode_sse;
249 int64_t skip_mode_dist;
250 MV_REFERENCE_FRAME skip_mode_ref_frame[2];
251 int_mv skip_mode_mv[2];
252 int skip_mode_index_candidate;
253 int skip_mode_index;
254#endif // CONFIG_EXT_SKIP
255
Jingning Handfd72322017-08-09 14:04:12 -0700256#if CONFIG_LV_MAP
257 LV_MAP_COEFF_COST coeff_costs[TX_SIZES][PLANE_TYPES];
Jingning Hanf5a4d3b2017-08-27 23:01:19 -0700258 uint16_t cb_offset;
Jingning Handfd72322017-08-09 14:04:12 -0700259#endif
260
hui suc0cf71d2017-07-20 16:38:50 -0700261 av1_coeff_cost token_head_costs[TX_SIZES];
262 av1_coeff_cost token_tail_costs[TX_SIZES];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700263
Yue Chenb23d00a2017-07-28 17:01:21 -0700264 // mode costs
Yue Chen170678a2017-10-17 13:43:10 -0700265 int intra_inter_cost[INTRA_INTER_CONTEXTS][2];
266
Yue Chenb23d00a2017-07-28 17:01:21 -0700267 int mbmode_cost[BLOCK_SIZE_GROUPS][INTRA_MODES];
268 int newmv_mode_cost[NEWMV_MODE_CONTEXTS][2];
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700269 int zeromv_mode_cost[GLOBALMV_MODE_CONTEXTS][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700270 int refmv_mode_cost[REFMV_MODE_CONTEXTS][2];
271 int drl_mode_cost0[DRL_MODE_CONTEXTS][2];
272
Yue Chenb23d00a2017-07-28 17:01:21 -0700273 int inter_compound_mode_cost[INTER_MODE_CONTEXTS][INTER_COMPOUND_MODES];
Cheng Chen2ef24ea2017-11-29 12:22:24 -0800274#if CONFIG_JNT_COMP
275 int compound_type_cost[BLOCK_SIZES_ALL][COMPOUND_TYPES - 1];
276#else
Yue Chena4245512017-08-31 11:58:08 -0700277 int compound_type_cost[BLOCK_SIZES_ALL][COMPOUND_TYPES];
Cheng Chen2ef24ea2017-11-29 12:22:24 -0800278#endif // CONFIG_JNT_COMP
Yue Cheneaf128a2017-10-16 17:01:36 -0700279 int interintra_cost[BLOCK_SIZE_GROUPS][2];
280 int wedge_interintra_cost[BLOCK_SIZES_ALL][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700281 int interintra_mode_cost[BLOCK_SIZE_GROUPS][INTERINTRA_MODES];
Yunqing Wang3afbf3f2017-11-21 20:16:18 -0800282#if CONFIG_EXT_WARPED_MOTION
283 int motion_mode_cost[MOTION_MODE_CTX][BLOCK_SIZES_ALL][MOTION_MODES];
284#else
Yue Chenb23d00a2017-07-28 17:01:21 -0700285 int motion_mode_cost[BLOCK_SIZES_ALL][MOTION_MODES];
Yunqing Wang3afbf3f2017-11-21 20:16:18 -0800286#endif // CONFIG_EXT_WARPED_MOTION
Yue Chenb23d00a2017-07-28 17:01:21 -0700287 int motion_mode_cost1[BLOCK_SIZES_ALL][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700288 int intra_uv_mode_cost[INTRA_MODES][UV_INTRA_MODES];
289 int y_mode_costs[INTRA_MODES][INTRA_MODES][INTRA_MODES];
Yue Chen63ce36f2017-10-10 23:37:31 -0700290#if CONFIG_FILTER_INTRA
Yue Chen4eba69b2017-11-09 22:37:35 -0800291 int filter_intra_cost[TX_SIZES_ALL][2];
Yue Chen63ce36f2017-10-10 23:37:31 -0700292 int filter_intra_mode_cost[PLANE_TYPES][FILTER_INTRA_MODES];
293#endif
Yue Chenb23d00a2017-07-28 17:01:21 -0700294 int switchable_interp_costs[SWITCHABLE_FILTER_CONTEXTS][SWITCHABLE_FILTERS];
295#if CONFIG_EXT_PARTITION_TYPES
Sebastien Alaiwana6a486c2017-11-07 17:04:27 +0100296 int partition_cost[PARTITION_CONTEXTS][EXT_PARTITION_TYPES];
Yue Chenb23d00a2017-07-28 17:01:21 -0700297#else
Sebastien Alaiwana6a486c2017-11-07 17:04:27 +0100298 int partition_cost[PARTITION_CONTEXTS][PARTITION_TYPES];
Yue Chenb23d00a2017-07-28 17:01:21 -0700299#endif // CONFIG_EXT_PARTITION_TYPES
Yue Chenb23d00a2017-07-28 17:01:21 -0700300 int palette_y_size_cost[PALETTE_BLOCK_SIZES][PALETTE_SIZES];
301 int palette_uv_size_cost[PALETTE_BLOCK_SIZES][PALETTE_SIZES];
302 int palette_y_color_cost[PALETTE_SIZES][PALETTE_COLOR_INDEX_CONTEXTS]
303 [PALETTE_COLORS];
304 int palette_uv_color_cost[PALETTE_SIZES][PALETTE_COLOR_INDEX_CONTEXTS]
305 [PALETTE_COLORS];
Yue Chendab2ca92017-10-16 17:48:48 -0700306 int palette_y_mode_cost[PALETTE_BLOCK_SIZES][PALETTE_Y_MODE_CONTEXTS][2];
307 int palette_uv_mode_cost[PALETTE_UV_MODE_CONTEXTS][2];
David Michael Barr38e560c2017-08-16 21:46:37 +0900308#if CONFIG_CFL
309 // The rate associated with each alpha codeword
310 int cfl_cost[CFL_JOINT_SIGNS][CFL_PRED_PLANES][CFL_ALPHABET_SIZE];
311#endif // CONFIG_CFL
Yue Chenb23d00a2017-07-28 17:01:21 -0700312 int tx_size_cost[TX_SIZES - 1][TX_SIZE_CONTEXTS][TX_SIZES];
Yue Chen171c17d2017-10-16 18:08:22 -0700313 int txfm_partition_cost[TXFM_PARTITION_CONTEXTS][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700314 int inter_tx_type_costs[EXT_TX_SETS_INTER][EXT_TX_SIZES][TX_TYPES];
315 int intra_tx_type_costs[EXT_TX_SETS_INTRA][EXT_TX_SIZES][INTRA_MODES]
316 [TX_TYPES];
Joe Young3ca43bf2017-10-06 15:12:46 -0700317#if CONFIG_EXT_INTRA && CONFIG_EXT_INTRA_MOD
318 int angle_delta_cost[DIRECTIONAL_MODES][2 * MAX_ANGLE_DELTA + 1];
319#endif // CONFIG_EXT_INTRA && CONFIG_EXT_INTRA_MOD
Yue Chenb23d00a2017-07-28 17:01:21 -0700320#if CONFIG_LOOP_RESTORATION
321 int switchable_restore_cost[RESTORE_SWITCHABLE_TYPES];
Debargha Mukherjeebc732ef2017-10-12 12:40:25 -0700322 int wiener_restore_cost[2];
323 int sgrproj_restore_cost[2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700324#endif // CONFIG_LOOP_RESTORATION
Hui Su6c8584f2017-09-14 15:37:02 -0700325#if CONFIG_INTRABC
326 int intrabc_cost[2];
327#endif // CONFIG_INTRABC
Yue Chenb23d00a2017-07-28 17:01:21 -0700328
Yaowu Xuc27fc142016-08-22 16:08:15 -0700329 int optimize;
330
Yaowu Xuc27fc142016-08-22 16:08:15 -0700331 // Used to store sub partition's choices.
332 MV pred_mv[TOTAL_REFS_PER_FRAME];
333
334 // Store the best motion vector during motion search
335 int_mv best_mv;
336 // Store the second best motion vector during full-pixel motion search
337 int_mv second_best_mv;
338
Yaowu Xuc27fc142016-08-22 16:08:15 -0700339 // use default transform and skip transform type search for intra modes
340 int use_default_intra_tx_type;
341 // use default transform and skip transform type search for inter modes
342 int use_default_inter_tx_type;
Yushin Chob7b60c52017-07-14 16:18:52 -0700343#if CONFIG_DIST_8X8
Yushin Cho55104332017-08-14 16:15:43 -0700344 int using_dist_8x8;
345 aom_tune_metric tune_metric;
Yushin Cho8ab875d2017-06-23 14:47:21 -0700346#if CONFIG_HIGHBITDEPTH
347 DECLARE_ALIGNED(16, uint16_t, decoded_8x8[8 * 8]);
348#else
Yushin Cho63927c42017-05-23 15:41:05 -0700349 DECLARE_ALIGNED(16, uint8_t, decoded_8x8[8 * 8]);
Yushin Cho8ab875d2017-06-23 14:47:21 -0700350#endif
Yushin Chob7b60c52017-07-14 16:18:52 -0700351#endif // CONFIG_DIST_8X8
Cheng Chen46970612017-10-24 14:53:36 -0700352#if CONFIG_JNT_COMP
353 int comp_idx_cost[COMP_INDEX_CONTEXTS][2];
Cheng Chen2ef24ea2017-11-29 12:22:24 -0800354 int comp_group_idx_cost[COMP_GROUP_IDX_CONTEXTS][2];
Cheng Chen46970612017-10-24 14:53:36 -0700355#endif // CONFIG_JNT_COMP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700356};
357
358#ifdef __cplusplus
359} // extern "C"
360#endif
361
Yaowu Xuf883b422016-08-30 14:01:10 -0700362#endif // AV1_ENCODER_BLOCK_H_