Remove CONFIG_MODIFY_SH macro on item in https://gitlab.com/AOMediaCodec/avm/-/issues/1076
diff --git a/av2/av2_dx_iface.c b/av2/av2_dx_iface.c index 6e28c2f..a359604 100644 --- a/av2/av2_dx_iface.c +++ b/av2/av2_dx_iface.c
@@ -366,9 +366,6 @@ avm_codec_stream_info_t *si) { int operating_point_idc0 = 0; if (is_reduced_header) { -#if !CONFIG_MODIFY_SH - avm_rb_read_literal(rb, LEVEL_BITS); // level -#endif // !CONFIG_MODIFY_SH } else { uint8_t decoder_model_info_present_flag = 0; int buffer_delay_length_minus_1 = 0; @@ -394,10 +391,6 @@ int operating_point_idc; operating_point_idc = avm_rb_read_literal(rb, OP_POINTS_IDC_BITS); if (i == 0) operating_point_idc0 = operating_point_idc; -#if !CONFIG_MODIFY_SH - int seq_level_idx = avm_rb_read_literal(rb, LEVEL_BITS); // level - if (seq_level_idx > 7) avm_rb_read_bit(rb); // tier -#endif // !CONFIG_MODIFY_SH if (decoder_model_info_present_flag) { const uint8_t decoder_model_present_for_this_op = avm_rb_read_bit(rb); if (decoder_model_present_for_this_op) { @@ -476,7 +469,6 @@ #endif // CONFIG_CWG_E242_SEQ_HDR_ID BITSTREAM_PROFILE profile = av2_read_profile(&rb); // profile -#if CONFIG_MODIFY_SH single_picture_header_flag = avm_rb_read_bit(&rb); if (!single_picture_header_flag) { avm_rb_read_literal(&rb, 3); // seq_lcr_id @@ -486,9 +478,6 @@ avm_rb_read_literal(&rb, LEVEL_BITS); // seq_level_idx if (seq_level_idx > 7 && !single_picture_header_flag) avm_rb_read_bit(&rb); // seq_tier_flag -#else - avm_rb_read_literal(&rb, 3); -#endif // CONFIG_MODIFY_SH int num_bits_width = avm_rb_read_literal(&rb, 4) + 1; int num_bits_height = avm_rb_read_literal(&rb, 4) + 1; @@ -514,15 +503,6 @@ #endif // CONFIG_CWG_F270_CI_OBU if (status != AVM_CODEC_OK) return status; -#if !CONFIG_MODIFY_SH - const uint8_t still_picture = avm_rb_read_bit(&rb); - single_picture_header_flag = avm_rb_read_bit(&rb); - - if (!still_picture && single_picture_header_flag) { - return AVM_CODEC_UNSUP_BITSTREAM; - } -#endif // !CONFIG_MODIFY_SH - #if !CONFIG_CWG_F270_OPS status = parse_operating_points(&rb, single_picture_header_flag, si); if (status != AVM_CODEC_OK) return status;
diff --git a/av2/decoder/obu.c b/av2/decoder/obu.c index 6d0d40e..916f36c 100644 --- a/av2/decoder/obu.c +++ b/av2/decoder/obu.c
@@ -276,7 +276,6 @@ return 0; } #endif // !CONFIG_CWG_F270_OPS -#if CONFIG_MODIFY_SH seq_params->single_picture_header_flag = avm_rb_read_bit(rb); if (seq_params->single_picture_header_flag) { seq_params->seq_lcr_id = LCR_ID_UNSPECIFIED; @@ -311,7 +310,6 @@ else seq_params->tier[0] = 0; #endif // CONFIG_CWG_F270_OPS -#endif // CONFIG_MODIFY_SH const int num_bits_width = avm_rb_read_literal(rb, 4) + 1; const int num_bits_height = avm_rb_read_literal(rb, 4) + 1; @@ -345,17 +343,6 @@ } #endif // !CONFIG_CWG_E242_CHROMA_FORMAT_IDC -#if !CONFIG_MODIFY_SH - // Still picture or not - seq_params->still_picture = avm_rb_read_bit(rb); - seq_params->single_picture_header_flag = avm_rb_read_bit(rb); - // Video must have single_picture_header_flag = 0 - if (!seq_params->still_picture && seq_params->single_picture_header_flag) { - cm->error.error_code = AVM_CODEC_UNSUP_BITSTREAM; - return 0; - } -#endif // !CONFIG_MODIFY_SH - #if CONFIG_CWG_F270_OPS if (seq_params->single_picture_header_flag) { seq_params->decoder_model_info_present_flag = 0; @@ -410,13 +397,6 @@ seq_params->display_model_info_present_flag = 0; seq_params->operating_points_cnt_minus_1 = 0; seq_params->operating_point_idc[0] = 0; -#if !CONFIG_MODIFY_SH - if (!read_bitstream_level(&seq_params->seq_level_idx[0], rb)) { - cm->error.error_code = AVM_CODEC_UNSUP_BITSTREAM; - return 0; - } - seq_params->tier[0] = 0; -#endif // !CONFIG_MODIFY_SH seq_params->op_params[0].decoder_model_param_present_flag = 0; seq_params->op_params[0].display_model_param_present_flag = 0; } else { @@ -439,18 +419,6 @@ for (int i = 0; i < seq_params->operating_points_cnt_minus_1 + 1; i++) { seq_params->operating_point_idc[i] = avm_rb_read_literal(rb, OP_POINTS_IDC_BITS); -#if !CONFIG_MODIFY_SH - if (!read_bitstream_level(&seq_params->seq_level_idx[i], rb)) { - cm->error.error_code = AVM_CODEC_UNSUP_BITSTREAM; - return 0; - } - // This is the seq_level_idx[i] > 7 check in the spec. seq_level_idx 7 - // is equivalent to level 3.3. - if (seq_params->seq_level_idx[i] >= SEQ_LEVEL_4_0) - seq_params->tier[i] = avm_rb_read_bit(rb); - else - seq_params->tier[i] = 0; -#endif // !CONFIG_MODIFY_SH if (seq_params->decoder_model_info_present_flag) { seq_params->op_params[i].decoder_model_param_present_flag = avm_rb_read_bit(rb);
diff --git a/av2/encoder/bitstream.c b/av2/encoder/bitstream.c index d97d377..e8f26a9 100644 --- a/av2/encoder/bitstream.c +++ b/av2/encoder/bitstream.c
@@ -7378,7 +7378,6 @@ #endif // CONFIG_CWG_E242_SEQ_HDR_ID write_profile(seq_params->profile, &wb); -#if CONFIG_MODIFY_SH avm_wb_write_bit(&wb, seq_params->single_picture_header_flag); if (!seq_params->single_picture_header_flag) { avm_wb_write_literal(&wb, seq_params->seq_lcr_id, 3); @@ -7395,7 +7394,6 @@ !seq_params->single_picture_header_flag) avm_wb_write_bit(&wb, seq_params->tier[0]); #endif // CONFIG_CWG_F270_OPS -#endif // CONFIG_MODIFY_SH avm_wb_write_literal(&wb, seq_params->num_bits_width - 1, 4); avm_wb_write_literal(&wb, seq_params->num_bits_height - 1, 4); @@ -7414,24 +7412,12 @@ write_color_config(seq_params, &wb); #endif // CONFIG_CWG_F270_CI_OBU -#if !CONFIG_MODIFY_SH - // Still picture or not - avm_wb_write_bit(&wb, seq_params->still_picture); - assert(IMPLIES(!seq_params->still_picture, - !seq_params->single_picture_header_flag)); - // whether to use reduced still picture header - avm_wb_write_bit(&wb, seq_params->single_picture_header_flag); -#endif // !CONFIG_MODIFY_SH - if (seq_params->single_picture_header_flag) { #if !CONFIG_CWG_F270_CI_OBU assert(seq_params->timing_info_present == 0); #endif // !CONFIG_CWG_F270_CI_OBU assert(seq_params->decoder_model_info_present_flag == 0); assert(seq_params->display_model_info_present_flag == 0); -#if !CONFIG_MODIFY_SH - write_bitstream_level(seq_params->seq_level_idx[0], &wb); -#endif // !CONFIG_MODIFY_SH } else { #if CONFIG_CWG_F270_OPS avm_wb_write_bit(&wb, seq_params->seq_max_display_model_info_present_flag); @@ -7473,11 +7459,6 @@ for (i = 0; i < seq_params->operating_points_cnt_minus_1 + 1; i++) { avm_wb_write_literal(&wb, seq_params->operating_point_idc[i], OP_POINTS_IDC_BITS); -#if !CONFIG_MODIFY_SH - write_bitstream_level(seq_params->seq_level_idx[i], &wb); - if (seq_params->seq_level_idx[i] >= SEQ_LEVEL_4_0) - avm_wb_write_bit(&wb, seq_params->tier[i]); -#endif // !CONFIG_MODIFY_SH if (seq_params->decoder_model_info_present_flag) { avm_wb_write_bit( &wb, seq_params->op_params[i].decoder_model_param_present_flag);
diff --git a/build/cmake/avm_config_defaults.cmake b/build/cmake/avm_config_defaults.cmake index 5568fae..9c52044 100644 --- a/build/cmake/avm_config_defaults.cmake +++ b/build/cmake/avm_config_defaults.cmake
@@ -171,9 +171,6 @@ set_avm_config_var(CONFIG_CWG_E242_SEQ_HDR_ID 1 "Signal sequence header id.") -set_avm_config_var(CONFIG_MODIFY_SH 1 - "Modification to the sequence header elements.") - set_avm_config_var(CONFIG_REORDER_SEQ_FLAGS 1 "Group sequence header flags.") set_avm_config_var(CONFIG_IMPROVED_REORDER_SEQ_FLAGS 1 "Improvement of Group sequence header flags.")
diff --git a/common/av2_config.c b/common/av2_config.c index 443d7c4..6782101 100644 --- a/common/av2_config.c +++ b/common/av2_config.c
@@ -366,7 +366,6 @@ AV2C_READ_BITS_OR_RETURN_ERROR(seq_profile, 3); config->seq_profile = seq_profile; -#if CONFIG_MODIFY_SH AV2C_READ_BIT_OR_RETURN_ERROR(single_picture_header_flag); if (!single_picture_header_flag) { AV2C_READ_BITS_OR_RETURN_ERROR(seq_lcr_id, 3); @@ -379,7 +378,6 @@ AV2C_READ_BIT_OR_RETURN_ERROR(single_tier_0); config->seq_tier_0 = 0; } -#endif // CONFIG_MODIFY_SH AV2C_READ_BITS_OR_RETURN_ERROR(frame_width_bits_minus_1, 4); AV2C_READ_BITS_OR_RETURN_ERROR(frame_height_bits_minus_1, 4); @@ -417,17 +415,8 @@ } #endif // CONFIG_CWG_F270_CI_OBU -#if !CONFIG_MODIFY_SH - AV2C_READ_BIT_OR_RETURN_ERROR(still_picture); - AV2C_READ_BIT_OR_RETURN_ERROR(single_picture_header_flag); -#endif // !CONFIG_MODIFY_SH if (single_picture_header_flag) { config->initial_presentation_delay_present = 0; -#if !CONFIG_MODIFY_SH - AV2C_READ_BITS_OR_RETURN_ERROR(seq_level_idx, 5); - config->seq_level_idx_0 = seq_level_idx; - config->seq_tier_0 = 0; -#endif // !CONFIG_MODIFY_SH } else { #if CONFIG_CWG_F270_OPS AV2C_READ_BIT_OR_RETURN_ERROR(max_display_model_info_present_flag); @@ -487,15 +476,6 @@ for (int op_index = 0; op_index < num_operating_points; ++op_index) { AV2C_READ_BITS_OR_RETURN_ERROR(operating_point_idc, 12); -#if !CONFIG_MODIFY_SH - AV2C_READ_BITS_OR_RETURN_ERROR(seq_level_idx, 5); - - int seq_tier = 0; - if (seq_level_idx > 7) { - AV2C_READ_BIT_OR_RETURN_ERROR(seq_tier_this_op); - seq_tier = seq_tier_this_op; - } -#endif // !CONFIG_MODIFY_SH if (has_decoder_model) { AV2C_READ_BIT_OR_RETURN_ERROR(decoder_model_present_for_op); if (decoder_model_present_for_op) { @@ -519,10 +499,6 @@ if (op_index == 0) { // Av2Config needs only the values from the first operating point. -#if !CONFIG_MODIFY_SH - config->seq_level_idx_0 = seq_level_idx; - config->seq_tier_0 = seq_tier; -#endif // !CONFIG_MODIFY_SH config->initial_presentation_delay_present = 0; config->initial_presentation_delay_minus_one = 0; }