| /* |
| * Copyright (c) 2021, Alliance for Open Media. All rights reserved |
| * |
| * This source code is subject to the terms of the BSD 3-Clause Clear License |
| * and the Alliance for Open Media Patent License 1.0. If the BSD 3-Clause Clear |
| * License was not distributed with this source code in the LICENSE file, you |
| * can obtain it at aomedia.org/license/software-license/bsd-3-c-c/. If the |
| * Alliance for Open Media Patent License 1.0 was not distributed with this |
| * source code in the PATENTS file, you can obtain it at |
| * aomedia.org/license/patent-license/. |
| */ |
| |
| #include <assert.h> |
| #include <limits.h> |
| #include <stdio.h> |
| |
| #include "aom/aom_encoder.h" |
| #include "aom_dsp/aom_dsp_common.h" |
| #include "aom_dsp/binary_codes_writer.h" |
| #include "aom_dsp/bitwriter_buffer.h" |
| #include "aom_mem/aom_mem.h" |
| #include "aom_ports/bitops.h" |
| #include "aom_ports/mem_ops.h" |
| #include "aom_ports/system_state.h" |
| #include "av1/common/av1_common_int.h" |
| #include "av1/common/blockd.h" |
| #include "av1/common/enums.h" |
| #if CONFIG_BITSTREAM_DEBUG |
| #include "aom_util/debug_util.h" |
| #endif // CONFIG_BITSTREAM_DEBUG |
| |
| #include "common/md5_utils.h" |
| #include "common/rawenc.h" |
| |
| #include "av1/common/blockd.h" |
| #include "av1/common/cdef.h" |
| #if CONFIG_CCSO |
| #include "av1/common/ccso.h" |
| #endif |
| #include "av1/common/cfl.h" |
| #include "av1/common/entropy.h" |
| #include "av1/common/entropymode.h" |
| #include "av1/common/entropymv.h" |
| #include "av1/common/mvref_common.h" |
| #include "av1/common/pred_common.h" |
| #include "av1/common/reconinter.h" |
| #include "av1/common/reconintra.h" |
| #include "av1/common/seg_common.h" |
| #include "av1/common/tile_common.h" |
| |
| #include "av1/encoder/bitstream.h" |
| #include "av1/encoder/cost.h" |
| #include "av1/encoder/encodemv.h" |
| #include "av1/encoder/encodetxb.h" |
| #include "av1/encoder/mcomp.h" |
| #include "av1/encoder/palette.h" |
| #include "av1/encoder/pickrst.h" |
| #include "av1/encoder/segmentation.h" |
| #include "av1/encoder/tokenize.h" |
| |
| // Silence compiler warning for unused static functions |
| static void image2yuvconfig_upshift(aom_image_t *hbd_img, |
| const aom_image_t *img, |
| YV12_BUFFER_CONFIG *yv12) AOM_UNUSED; |
| #include "av1/av1_iface_common.h" |
| |
| #define ENC_MISMATCH_DEBUG 0 |
| |
| static INLINE void write_uniform(aom_writer *w, int n, int v) { |
| const int l = get_unsigned_bits(n); |
| const int m = (1 << l) - n; |
| if (l == 0) return; |
| if (v < m) { |
| aom_write_literal(w, v, l - 1); |
| } else { |
| aom_write_literal(w, m + ((v - m) >> 1), l - 1); |
| aom_write_literal(w, (v - m) & 1, 1); |
| } |
| } |
| |
| static AOM_INLINE void loop_restoration_write_sb_coeffs( |
| const AV1_COMMON *const cm, MACROBLOCKD *xd, const RestorationUnitInfo *rui, |
| aom_writer *const w, int plane, FRAME_COUNTS *counts); |
| |
| #if CONFIG_IBC_SR_EXT |
| static AOM_INLINE void write_intrabc_info( |
| #if CONFIG_IBC_BV_IMPROVEMENT && CONFIG_IBC_MAX_DRL |
| int max_bvp_drl_bits, |
| #endif // CONFIG_IBC_BV_IMPROVEMENT && CONFIG_IBC_MAX_DRL |
| MACROBLOCKD *xd, const MB_MODE_INFO_EXT_FRAME *mbmi_ext_frame, |
| aom_writer *w); |
| #endif // CONFIG_IBC_SR_EXT |
| |
| #if !CONFIG_AIMC |
| static AOM_INLINE void write_intra_y_mode_kf(FRAME_CONTEXT *frame_ctx, |
| const MB_MODE_INFO *mi, |
| const MB_MODE_INFO *neighbors0, |
| const MB_MODE_INFO *neighbors1, |
| PREDICTION_MODE mode, |
| aom_writer *w) { |
| assert(!is_intrabc_block(mi, SHARED_PART)); |
| (void)mi; |
| aom_write_symbol(w, mode, get_y_mode_cdf(frame_ctx, neighbors0, neighbors1), |
| INTRA_MODES); |
| } |
| #endif // !CONFIG_AIMC |
| static AOM_INLINE void write_inter_mode(aom_writer *w, PREDICTION_MODE mode, |
| FRAME_CONTEXT *ec_ctx, |
| const int16_t mode_ctx |
| #if CONFIG_EXTENDED_WARP_PREDICTION |
| , |
| const AV1_COMMON *const cm, |
| const MACROBLOCKD *xd, |
| const MB_MODE_INFO *mbmi, |
| BLOCK_SIZE bsize |
| #endif // CONFIG_EXTENDED_WARP_PREDICTION |
| |
| ) { |
| const int16_t ismode_ctx = inter_single_mode_ctx(mode_ctx); |
| |
| #if CONFIG_EXTENDED_WARP_PREDICTION |
| if (is_warpmv_mode_allowed(cm, mbmi, bsize)) { |
| const int16_t iswarpmvmode_ctx = inter_warpmv_mode_ctx(cm, xd, mbmi); |
| aom_write_symbol(w, mode == WARPMV, |
| ec_ctx->inter_warp_mode_cdf[iswarpmvmode_ctx], 2); |
| if (mode == WARPMV) return; |
| } else { |
| assert(mode != WARPMV); |
| } |
| #endif // CONFIG_EXTENDED_WARP_PREDICTION |
| |
| aom_write_symbol(w, mode - SINGLE_INTER_MODE_START, |
| ec_ctx->inter_single_mode_cdf[ismode_ctx], |
| INTER_SINGLE_MODES); |
| } |
| |
| static void write_drl_idx(int max_drl_bits, const int16_t mode_ctx, |
| FRAME_CONTEXT *ec_ctx, const MB_MODE_INFO *mbmi, |
| const MB_MODE_INFO_EXT_FRAME *mbmi_ext_frame, |
| aom_writer *w) { |
| #if !CONFIG_SKIP_MODE_ENHANCEMENT |
| assert(!mbmi->skip_mode); |
| #endif // !CONFIG_SKIP_MODE_ENHANCEMENT |
| #if CONFIG_EXTENDED_WARP_PREDICTION |
| assert(IMPLIES(mbmi->mode == WARPMV, 0)); |
| #endif // CONFIG_EXTENDED_WARP_PREDICTION |
| // Write the DRL index as a sequence of bits encoding a decision tree: |
| // 0 -> 0 10 -> 1 110 -> 2 111 -> 3 |
| // Also use the number of reference MVs for a frame type to reduce the |
| // number of bits written if there are less than 4 valid DRL indices. |
| #if CONFIG_SEP_COMP_DRL |
| if (has_second_drl(mbmi)) { |
| if (mbmi->mode == NEAR_NEWMV) |
| max_drl_bits = AOMMIN(max_drl_bits, SEP_COMP_DRL_SIZE); |
| else |
| assert(mbmi->mode == NEAR_NEARMV); |
| } |
| |
| #if CONFIG_IMPROVED_SAME_REF_COMPOUND |
| if (!mbmi->skip_mode && mbmi->ref_frame[0] == mbmi->ref_frame[1] && |
| has_second_drl(mbmi) && mbmi->mode == NEAR_NEARMV) |
| assert(mbmi->ref_mv_idx[0] < mbmi->ref_mv_idx[1]); |
| #endif // CONFIG_IMPROVED_SAME_REF_COMPOUND |
| #if CONFIG_SKIP_MODE_ENHANCEMENT |
| if (mbmi->skip_mode) |
| assert(mbmi->ref_mv_idx[0] < |
| mbmi_ext_frame->skip_mvp_candidate_list.ref_mv_count); |
| else |
| #endif // CONFIG_SKIP_MODE_ENHANCEMENT |
| assert(mbmi->ref_mv_idx[0] < mbmi_ext_frame->ref_mv_count[0]); |
| if (has_second_drl(mbmi)) |
| assert(mbmi->ref_mv_idx[1] < mbmi_ext_frame->ref_mv_count[1]); |
| assert(mbmi->ref_mv_idx[0] < max_drl_bits + 1); |
| if (has_second_drl(mbmi)) assert(mbmi->ref_mv_idx[1] < max_drl_bits + 1); |
| for (int ref = 0; ref < 1 + has_second_drl(mbmi); ref++) { |
| for (int idx = 0; idx < max_drl_bits; ++idx) { |
| #if CONFIG_IMPROVED_SAME_REF_COMPOUND |
| if (ref && !mbmi->skip_mode && mbmi->ref_frame[0] == mbmi->ref_frame[1] && |
| mbmi->mode == NEAR_NEARMV && idx <= mbmi->ref_mv_idx[0]) |
| continue; |
| #endif // CONFIG_IMPROVED_SAME_REF_COMPOUND |
| aom_cdf_prob *drl_cdf = |
| #if CONFIG_SKIP_MODE_ENHANCEMENT |
| mbmi->skip_mode ? ec_ctx->skip_drl_cdf[AOMMIN(idx, 2)] |
| : av1_get_drl_cdf(ec_ctx, mbmi_ext_frame->weight[ref], |
| mode_ctx, idx); |
| #else |
| av1_get_drl_cdf(ec_ctx, mbmi_ext_frame->weight[ref], mode_ctx, idx); |
| #endif // CONFIG_SKIP_MODE_ENHANCEMENT |
| aom_write_symbol(w, mbmi->ref_mv_idx[ref] != idx, drl_cdf, 2); |
| if (mbmi->ref_mv_idx[ref] == idx) break; |
| } |
| } |
| #else |
| #if CONFIG_SKIP_MODE_ENHANCEMENT |
| if (mbmi->skip_mode) |
| assert(mbmi->ref_mv_idx < |
| mbmi_ext_frame->skip_mvp_candidate_list.ref_mv_count); |
| else |
| #endif // CONFIG_SKIP_MODE_ENHANCEMENT |
| assert(mbmi->ref_mv_idx < mbmi_ext_frame->ref_mv_count); |
| assert(mbmi->ref_mv_idx < max_drl_bits + 1); |
| for (int idx = 0; idx < max_drl_bits; ++idx) { |
| aom_cdf_prob *drl_cdf = |
| #if CONFIG_SKIP_MODE_ENHANCEMENT |
| mbmi->skip_mode |
| ? ec_ctx->skip_drl_cdf[AOMMIN(idx, 2)] |
| : av1_get_drl_cdf(ec_ctx, mbmi_ext_frame->weight, mode_ctx, idx); |
| #else |
| av1_get_drl_cdf(ec_ctx, mbmi_ext_frame->weight, mode_ctx, idx); |
| #endif // CONFIG_SKIP_MODE_ENHANCEMENT |
| aom_write_symbol(w, mbmi->ref_mv_idx != idx, drl_cdf, 2); |
| if (mbmi->ref_mv_idx == idx) break; |
| } |
| #endif // CONFIG_SEP_COMP_DRL |
| } |
| |
| #if CONFIG_EXTENDED_WARP_PREDICTION |
| static void write_warp_ref_idx(FRAME_CONTEXT *ec_ctx, const MB_MODE_INFO *mbmi, |
| aom_writer *w) { |
| assert(mbmi->warp_ref_idx < mbmi->max_num_warp_candidates); |
| assert(mbmi->max_num_warp_candidates <= MAX_WARP_REF_CANDIDATES); |
| |
| if (mbmi->max_num_warp_candidates <= 1) { |
| return; |
| } |
| int max_idx_bits = mbmi->max_num_warp_candidates - 1; |
| for (int bit_idx = 0; bit_idx < max_idx_bits; ++bit_idx) { |
| aom_cdf_prob *warp_ref_idx_cdf = av1_get_warp_ref_idx_cdf(ec_ctx, bit_idx); |
| aom_write_symbol(w, mbmi->warp_ref_idx != bit_idx, warp_ref_idx_cdf, 2); |
| |
| if (mbmi->warp_ref_idx == bit_idx) break; |
| } |
| } |
| |
| static void write_warpmv_with_mvd_flag(FRAME_CONTEXT *ec_ctx, |
| const MB_MODE_INFO *mbmi, |
| aom_writer *w) { |
| aom_write_symbol(w, mbmi->warpmv_with_mvd_flag, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| ec_ctx->warpmv_with_mvd_flag_cdf, |
| #else |
| ec_ctx |
| ->warpmv_with_mvd_flag_cdf[mbmi->sb_type[PLANE_TYPE_Y]], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| 2); |
| } |
| #endif // CONFIG_EXTENDED_WARP_PREDICTION |
| |
| // Write scale mode flag for joint mvd coding mode |
| static AOM_INLINE void write_jmvd_scale_mode(MACROBLOCKD *xd, aom_writer *w, |
| const MB_MODE_INFO *const mbmi) { |
| if (!is_joint_mvd_coding_mode(mbmi->mode)) return; |
| const int is_joint_amvd_mode = is_joint_amvd_coding_mode(mbmi->mode); |
| aom_cdf_prob *jmvd_scale_mode_cdf = |
| is_joint_amvd_mode ? xd->tile_ctx->jmvd_amvd_scale_mode_cdf |
| : xd->tile_ctx->jmvd_scale_mode_cdf; |
| const int jmvd_scale_cnt = is_joint_amvd_mode ? JOINT_AMVD_SCALE_FACTOR_CNT |
| : JOINT_NEWMV_SCALE_FACTOR_CNT; |
| |
| aom_write_symbol(w, mbmi->jmvd_scale_mode, jmvd_scale_mode_cdf, |
| jmvd_scale_cnt); |
| } |
| |
| // Write the index for the weighting factor of compound weighted prediction |
| static AOM_INLINE void write_cwp_idx(MACROBLOCKD *xd, aom_writer *w, |
| const AV1_COMMON *const cm, |
| const MB_MODE_INFO *const mbmi) { |
| const int8_t final_idx = get_cwp_coding_idx(mbmi->cwp_idx, 1, cm, mbmi); |
| |
| int bit_cnt = 0; |
| const int ctx = 0; |
| for (int idx = 0; idx < MAX_CWP_NUM - 1; ++idx) { |
| aom_write_symbol(w, final_idx != idx, |
| xd->tile_ctx->cwp_idx_cdf[ctx][bit_cnt], 2); |
| if (final_idx == idx) break; |
| ++bit_cnt; |
| } |
| } |
| |
| static AOM_INLINE void write_inter_compound_mode(MACROBLOCKD *xd, aom_writer *w, |
| PREDICTION_MODE mode, |
| #if CONFIG_OPTFLOW_REFINEMENT |
| const AV1_COMMON *cm, |
| const MB_MODE_INFO *const mbmi, |
| #endif // CONFIG_OPTFLOW_REFINEMENT |
| const int16_t mode_ctx) { |
| assert(is_inter_compound_mode(mode)); |
| #if CONFIG_OPTFLOW_REFINEMENT |
| int comp_mode_idx = opfl_get_comp_idx(mode); |
| aom_write_symbol(w, comp_mode_idx, |
| xd->tile_ctx->inter_compound_mode_cdf[mode_ctx], |
| INTER_COMPOUND_REF_TYPES); |
| if (cm->features.opfl_refine_type == REFINE_SWITCHABLE && |
| opfl_allowed_for_cur_refs(cm, mbmi)) { |
| const int use_optical_flow = mode >= NEAR_NEARMV_OPTFLOW; |
| #if CONFIG_AFFINE_REFINEMENT |
| const int allow_translational = is_translational_refinement_allowed( |
| cm, comp_idx_to_opfl_mode[comp_mode_idx]); |
| const int allow_affine = is_affine_refinement_allowed( |
| cm, xd, comp_idx_to_opfl_mode[comp_mode_idx]); |
| if (use_optical_flow) { |
| assert(IMPLIES(allow_translational, |
| mbmi->comp_refine_type > COMP_REFINE_NONE)); |
| assert(IMPLIES(allow_affine, |
| mbmi->comp_refine_type >= COMP_AFFINE_REFINE_START)); |
| } |
| if (allow_affine || allow_translational) |
| #endif // CONFIG_AFFINE_REFINEMENT |
| aom_write_symbol(w, use_optical_flow, |
| xd->tile_ctx->use_optflow_cdf[mode_ctx], 2); |
| } |
| #else |
| aom_write_symbol(w, INTER_COMPOUND_OFFSET(mode), |
| xd->tile_ctx->inter_compound_mode_cdf[mode_ctx], |
| INTER_COMPOUND_MODES); |
| #endif // CONFIG_OPTFLOW_REFINEMENT |
| } |
| |
| #if CONFIG_NEW_TX_PARTITION |
| static void write_tx_partition(MACROBLOCKD *xd, const MB_MODE_INFO *mbmi, |
| TX_SIZE max_tx_size, int blk_row, int blk_col, |
| aom_writer *w) { |
| int plane_type = (xd->tree_type == CHROMA_PART); |
| const int max_blocks_high = max_block_high(xd, mbmi->sb_type[plane_type], 0); |
| const int max_blocks_wide = max_block_wide(xd, mbmi->sb_type[plane_type], 0); |
| const BLOCK_SIZE bsize = mbmi->sb_type[plane_type]; |
| const int is_inter = is_inter_block(mbmi, xd->tree_type); |
| #if CONFIG_IMPROVEIDTX_CTXS |
| const int is_fsc = (xd->mi[0]->fsc_mode[xd->tree_type == CHROMA_PART] && |
| plane_type == PLANE_TYPE_Y); |
| #endif // CONFIG_IMPROVEIDTX_CTXS |
| const int txb_size_index = |
| is_inter ? av1_get_txb_size_index(bsize, blk_row, blk_col) : 0; |
| if (blk_row >= max_blocks_high || blk_col >= max_blocks_wide) return; |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| if (is_inter || (!is_inter && block_signals_txsize(bsize))) { |
| const TX_PARTITION_TYPE partition = mbmi->tx_partition_type[txb_size_index]; |
| #if !CONFIG_TX_PARTITION_CTX |
| const int is_rect = is_rect_tx(max_tx_size); |
| #endif // !CONFIG_TX_PARTITION_CTX |
| const int allow_horz = allow_tx_horz_split(max_tx_size); |
| const int allow_vert = allow_tx_vert_split(max_tx_size); |
| #if CONFIG_TX_PARTITION_CTX |
| #if CONFIG_TX_PARTITION_TYPE_EXT |
| const int bsize_group = size_to_tx_part_group_lookup[bsize]; |
| const int txsize_group = size_to_tx_type_group_lookup[bsize]; |
| int do_partition = 0; |
| if (allow_horz || allow_vert) { |
| do_partition = (partition != TX_PARTITION_NONE); |
| aom_cdf_prob *do_partition_cdf = |
| #if CONFIG_IMPROVEIDTX_CTXS |
| ec_ctx->txfm_do_partition_cdf[is_fsc][is_inter][bsize_group]; |
| #else |
| ec_ctx->txfm_do_partition_cdf[is_inter][bsize_group]; |
| #endif // CONFIG_IMPROVEIDTX_CTXS |
| aom_write_symbol(w, do_partition, do_partition_cdf, 2); |
| } |
| |
| if (do_partition) { |
| if (allow_horz && allow_vert) { |
| assert(txsize_group > 0); |
| aom_cdf_prob *partition_type_cdf = |
| #if CONFIG_IMPROVEIDTX_CTXS |
| ec_ctx->txfm_4way_partition_type_cdf[is_fsc][is_inter] |
| [txsize_group - 1]; |
| #else |
| ec_ctx->txfm_4way_partition_type_cdf[is_inter][txsize_group - 1]; |
| #endif // CONFIG_IMPROVEIDTX_CTXS |
| aom_write_symbol(w, partition - 1, partition_type_cdf, |
| TX_PARTITION_TYPE_NUM); |
| } else if (allow_horz || allow_vert) { |
| int has_first_split = 0; |
| if (partition == TX_PARTITION_VERT_M || |
| partition == TX_PARTITION_HORZ_M) |
| has_first_split = 1; |
| |
| if (txsize_group) { |
| aom_cdf_prob *partition_type_cdf = |
| #if CONFIG_IMPROVEIDTX_CTXS |
| ec_ctx->txfm_4way_partition_type_cdf[is_fsc][is_inter] |
| [txsize_group - 1]; |
| #else |
| ec_ctx->txfm_4way_partition_type_cdf[is_inter][txsize_group - 1]; |
| #endif // CONFIG_IMPROVEIDTX_CTXS |
| aom_write_symbol(w, has_first_split, partition_type_cdf, |
| TX_PARTITION_TYPE_NUM); |
| } |
| } |
| } |
| #else |
| const int bsize_group = size_to_tx_part_group_lookup[bsize]; |
| int do_partition = 0; |
| if (allow_horz || allow_vert) { |
| do_partition = (partition != TX_PARTITION_NONE); |
| aom_cdf_prob *do_partition_cdf = |
| #if CONFIG_IMPROVEIDTX_CTXS |
| ec_ctx->txfm_do_partition_cdf[is_fsc][is_inter][bsize_group]; |
| #else |
| ec_ctx->txfm_do_partition_cdf[is_inter][bsize_group]; |
| #endif // CONFIG_IMPROVEIDTX_CTXS |
| aom_write_symbol(w, do_partition, do_partition_cdf, 2); |
| } |
| |
| if (do_partition) { |
| if (allow_horz && allow_vert) { |
| assert(bsize_group > 0); |
| aom_cdf_prob *partition_type_cdf = |
| #if CONFIG_IMPROVEIDTX_CTXS |
| ec_ctx->txfm_4way_partition_type_cdf[is_fsc][is_inter] |
| [bsize_group - 1]; |
| #else |
| ec_ctx->txfm_4way_partition_type_cdf[is_inter][bsize_group - 1]; |
| #endif // CONFIG_IMPROVEIDTX_CTXS |
| aom_write_symbol(w, partition - 1, partition_type_cdf, 3); |
| } |
| } |
| #endif // CONFIG_TX_PARTITION_TYPE_EXT |
| #else |
| if (allow_horz && allow_vert) { |
| const int split4_ctx = |
| is_inter ? txfm_partition_split4_inter_context( |
| xd->above_txfm_context + blk_col, |
| xd->left_txfm_context + blk_row, bsize, max_tx_size) |
| : get_tx_size_context(xd); |
| aom_cdf_prob *split4_cdf = |
| is_inter ? ec_ctx->inter_4way_txfm_partition_cdf[is_rect][split4_ctx] |
| : ec_ctx->intra_4way_txfm_partition_cdf[is_rect][split4_ctx]; |
| const TX_PARTITION_TYPE split4_partition = |
| get_split4_partition(partition); |
| aom_write_symbol(w, split4_partition, split4_cdf, 4); |
| } else if (allow_horz || allow_vert) { |
| const int has_first_split = partition != TX_PARTITION_NONE; |
| aom_cdf_prob *split2_cdf = is_inter |
| ? ec_ctx->inter_2way_txfm_partition_cdf |
| : ec_ctx->intra_2way_txfm_partition_cdf; |
| aom_write_symbol(w, has_first_split, split2_cdf, 2); |
| } else { |
| assert(!allow_horz && !allow_vert); |
| assert(partition == PARTITION_NONE); |
| } |
| #endif // CONFIG_TX_PARTITION_CTX |
| } |
| #if !CONFIG_TX_PARTITION_CTX |
| if (is_inter) { |
| const TX_SIZE tx_size = mbmi->inter_tx_size[txb_size_index]; |
| txfm_partition_update(xd->above_txfm_context + blk_col, |
| xd->left_txfm_context + blk_row, tx_size, |
| max_tx_size); |
| } |
| #endif // !CONFIG_TX_PARTITION_CTX |
| } |
| #else |
| static AOM_INLINE void write_tx_size_vartx(MACROBLOCKD *xd, |
| const MB_MODE_INFO *mbmi, |
| TX_SIZE tx_size, int depth, |
| int blk_row, int blk_col, |
| aom_writer *w) { |
| FRAME_CONTEXT *const ec_ctx = xd->tile_ctx; |
| int plane_type = (xd->tree_type == CHROMA_PART); |
| const int max_blocks_high = max_block_high(xd, mbmi->sb_type[plane_type], 0); |
| const int max_blocks_wide = max_block_wide(xd, mbmi->sb_type[plane_type], 0); |
| |
| if (blk_row >= max_blocks_high || blk_col >= max_blocks_wide) return; |
| |
| if (depth == MAX_VARTX_DEPTH) { |
| txfm_partition_update(xd->above_txfm_context + blk_col, |
| xd->left_txfm_context + blk_row, tx_size, tx_size); |
| return; |
| } |
| const int ctx = txfm_partition_context(xd->above_txfm_context + blk_col, |
| xd->left_txfm_context + blk_row, |
| mbmi->sb_type[plane_type], tx_size); |
| const int txb_size_index = |
| av1_get_txb_size_index(mbmi->sb_type[plane_type], blk_row, blk_col); |
| const int write_txfm_partition = |
| tx_size == mbmi->inter_tx_size[txb_size_index]; |
| if (write_txfm_partition) { |
| aom_write_symbol(w, 0, ec_ctx->txfm_partition_cdf[ctx], 2); |
| |
| txfm_partition_update(xd->above_txfm_context + blk_col, |
| xd->left_txfm_context + blk_row, tx_size, tx_size); |
| // TODO(yuec): set correct txfm partition update for qttx |
| } else { |
| const TX_SIZE sub_txs = sub_tx_size_map[tx_size]; |
| const int bsw = tx_size_wide_unit[sub_txs]; |
| const int bsh = tx_size_high_unit[sub_txs]; |
| |
| aom_write_symbol(w, 1, ec_ctx->txfm_partition_cdf[ctx], 2); |
| |
| if (sub_txs == TX_4X4) { |
| txfm_partition_update(xd->above_txfm_context + blk_col, |
| xd->left_txfm_context + blk_row, sub_txs, tx_size); |
| return; |
| } |
| |
| assert(bsw > 0 && bsh > 0); |
| for (int row = 0; row < tx_size_high_unit[tx_size]; row += bsh) |
| for (int col = 0; col < tx_size_wide_unit[tx_size]; col += bsw) { |
| int offsetr = blk_row + row; |
| int offsetc = blk_col + col; |
| write_tx_size_vartx(xd, mbmi, sub_txs, depth + 1, offsetr, offsetc, w); |
| } |
| } |
| } |
| |
| static AOM_INLINE void write_selected_tx_size(const MACROBLOCKD *xd, |
| aom_writer *w) { |
| const MB_MODE_INFO *const mbmi = xd->mi[0]; |
| const BLOCK_SIZE bsize = mbmi->sb_type[xd->tree_type == CHROMA_PART]; |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| if (block_signals_txsize(bsize)) { |
| const TX_SIZE tx_size = mbmi->tx_size; |
| const int tx_size_ctx = get_tx_size_context(xd); |
| const int depth = tx_size_to_depth(tx_size, bsize); |
| const int max_depths = bsize_to_max_depth(bsize); |
| const int32_t tx_size_cat = bsize_to_tx_size_cat(bsize); |
| |
| assert(depth >= 0 && depth <= max_depths); |
| assert(!is_inter_block(mbmi, xd->tree_type)); |
| assert(IMPLIES(is_rect_tx(tx_size), is_rect_tx_allowed(xd, mbmi))); |
| aom_write_symbol(w, depth, ec_ctx->tx_size_cdf[tx_size_cat][tx_size_ctx], |
| max_depths + 1); |
| } |
| } |
| #endif // CONFIG_NEW_TX_PARTITION |
| |
| static int write_skip(const AV1_COMMON *cm, const MACROBLOCKD *xd, |
| int segment_id, const MB_MODE_INFO *mi, aom_writer *w) { |
| if (segfeature_active(&cm->seg, segment_id, SEG_LVL_SKIP)) { |
| return 1; |
| } else { |
| const int skip_txfm = mi->skip_txfm[xd->tree_type == CHROMA_PART]; |
| const int ctx = av1_get_skip_txfm_context(xd); |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| aom_write_symbol(w, skip_txfm, ec_ctx->skip_txfm_cdfs[ctx], 2); |
| return skip_txfm; |
| } |
| } |
| |
| static int write_skip_mode(const AV1_COMMON *cm, const MACROBLOCKD *xd, |
| int segment_id, const MB_MODE_INFO *mi, |
| aom_writer *w) { |
| if (!cm->current_frame.skip_mode_info.skip_mode_flag) return 0; |
| if (segfeature_active(&cm->seg, segment_id, SEG_LVL_SKIP)) { |
| return 0; |
| } |
| const int skip_mode = mi->skip_mode; |
| if (!is_comp_ref_allowed(mi->sb_type[xd->tree_type == CHROMA_PART])) { |
| assert(!skip_mode); |
| return 0; |
| } |
| if (segfeature_active(&cm->seg, segment_id, SEG_LVL_GLOBALMV)) { |
| // These features imply single-reference mode, while skip mode implies |
| // compound reference. Hence, the two are mutually exclusive. |
| // In other words, skip_mode is implicitly 0 here. |
| assert(!skip_mode); |
| return 0; |
| } |
| const int ctx = av1_get_skip_mode_context(xd); |
| aom_write_symbol(w, skip_mode, xd->tile_ctx->skip_mode_cdfs[ctx], 2); |
| return skip_mode; |
| } |
| |
| static AOM_INLINE void write_is_inter(const AV1_COMMON *cm, |
| const MACROBLOCKD *xd, int segment_id, |
| aom_writer *w, const int is_inter |
| #if CONFIG_CONTEXT_DERIVATION && !CONFIG_SKIP_TXFM_OPT |
| , |
| const int skip_txfm |
| #endif // CONFIG_CONTEXT_DERIVATION && !CONFIG_SKIP_TXFM_OPT |
| ) { |
| if (segfeature_active(&cm->seg, segment_id, SEG_LVL_GLOBALMV)) { |
| assert(is_inter); |
| return; |
| } |
| const int ctx = av1_get_intra_inter_context(xd); |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| #if CONFIG_CONTEXT_DERIVATION && !CONFIG_SKIP_TXFM_OPT |
| aom_write_symbol(w, is_inter, ec_ctx->intra_inter_cdf[skip_txfm][ctx], 2); |
| #else |
| aom_write_symbol(w, is_inter, ec_ctx->intra_inter_cdf[ctx], 2); |
| #endif // CONFIG_CONTEXT_DERIVATION && !CONFIG_SKIP_TXFM_OPT |
| } |
| |
| #if CONFIG_WEDGE_MOD_EXT |
| static void write_wedge_mode(aom_writer *w, FRAME_CONTEXT *ec_ctx, |
| const BLOCK_SIZE bsize, const int8_t wedge_index) { |
| #if CONFIG_D149_CTX_MODELING_OPT |
| (void)bsize; |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| const int wedge_angle = wedge_index_2_angle[wedge_index]; |
| const int wedge_dist = wedge_index_2_dist[wedge_index]; |
| const int wedge_angle_dir = (wedge_angle >= H_WEDGE_ANGLES); |
| aom_write_symbol(w, wedge_angle_dir, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| ec_ctx->wedge_angle_dir_cdf, |
| #else |
| ec_ctx->wedge_angle_dir_cdf[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| 2); |
| |
| if (wedge_angle_dir == 0) { |
| aom_write_symbol(w, wedge_angle, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| ec_ctx->wedge_angle_0_cdf, |
| #else |
| ec_ctx->wedge_angle_0_cdf[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| H_WEDGE_ANGLES); |
| } else { |
| assert(wedge_angle >= H_WEDGE_ANGLES); |
| aom_write_symbol(w, (wedge_angle - H_WEDGE_ANGLES), |
| #if CONFIG_D149_CTX_MODELING_OPT |
| ec_ctx->wedge_angle_1_cdf, |
| #else |
| ec_ctx->wedge_angle_1_cdf[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| H_WEDGE_ANGLES); |
| } |
| |
| if ((wedge_angle >= H_WEDGE_ANGLES) || |
| (wedge_angle == WEDGE_90 || wedge_angle == WEDGE_180)) { |
| assert(wedge_dist != 0); |
| aom_write_symbol(w, wedge_dist - 1, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| ec_ctx->wedge_dist_cdf2, |
| #else |
| ec_ctx->wedge_dist_cdf2[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| NUM_WEDGE_DIST - 1); |
| } else { |
| aom_write_symbol(w, wedge_dist, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| ec_ctx->wedge_dist_cdf, |
| #else |
| ec_ctx->wedge_dist_cdf[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| NUM_WEDGE_DIST); |
| } |
| } |
| #endif // CONFIG_WEDGE_MOD_EXT |
| |
| #if CONFIG_EXTENDED_WARP_PREDICTION |
| static void write_warp_delta_param(const MACROBLOCKD *xd, int index, int value, |
| aom_writer *w) { |
| assert(2 <= index && index <= 5); |
| int index_type = (index == 2 || index == 5) ? 0 : 1; |
| int coded_value = (value / WARP_DELTA_STEP) + WARP_DELTA_CODED_MAX; |
| assert(0 <= coded_value && coded_value < WARP_DELTA_NUM_SYMBOLS); |
| // Check that the value will round-trip properly |
| assert((coded_value - WARP_DELTA_CODED_MAX) * WARP_DELTA_STEP == value); |
| |
| aom_write_symbol(w, coded_value, |
| xd->tile_ctx->warp_delta_param_cdf[index_type], |
| WARP_DELTA_NUM_SYMBOLS); |
| } |
| |
| static void write_warp_delta(const AV1_COMMON *cm, const MACROBLOCKD *xd, |
| const MB_MODE_INFO *mbmi, |
| const MB_MODE_INFO_EXT_FRAME *mbmi_ext_frame, |
| aom_writer *w) { |
| assert(mbmi->warp_ref_idx < mbmi->max_num_warp_candidates); |
| if (!allow_warp_parameter_signaling(cm, mbmi)) { |
| return; |
| } |
| |
| const WarpedMotionParams *params = &mbmi->wm_params[0]; |
| WarpedMotionParams base_params; |
| av1_get_warp_base_params(cm, mbmi, &base_params, NULL, |
| #if CONFIG_COMPOUND_WARP_CAUSAL |
| mbmi_ext_frame->warp_param_stack[0] |
| #else |
| mbmi_ext_frame->warp_param_stack |
| #endif // CONFIG_COMPOUND_WARP_CAUSAL |
| ); |
| |
| // The RDO stage should not give us a model which is not warpable. |
| // Such models can still be signalled, but are effectively useless |
| // as we'll just fall back to translational motion |
| assert(!params->invalid); |
| |
| // TODO(rachelbarker): Allow signaling warp type? |
| write_warp_delta_param(xd, 2, params->wmmat[2] - base_params.wmmat[2], w); |
| write_warp_delta_param(xd, 3, params->wmmat[3] - base_params.wmmat[3], w); |
| } |
| |
| static AOM_INLINE void write_motion_mode( |
| const AV1_COMMON *cm, MACROBLOCKD *xd, const MB_MODE_INFO *mbmi, |
| const MB_MODE_INFO_EXT_FRAME *mbmi_ext_frame, aom_writer *w) { |
| const BLOCK_SIZE bsize = mbmi->sb_type[PLANE_TYPE_Y]; |
| const int allowed_motion_modes = |
| #if CONFIG_SEP_COMP_DRL |
| motion_mode_allowed(cm, xd, mbmi_ext_frame->ref_mv_stack[0], mbmi); |
| #else |
| motion_mode_allowed(cm, xd, mbmi_ext_frame->ref_mv_stack, mbmi); |
| #endif // CONFIG_SEP_COMP_DRL |
| assert((allowed_motion_modes & (1 << mbmi->motion_mode)) != 0); |
| assert((cm->features.enabled_motion_modes & (1 << mbmi->motion_mode)) != 0); |
| |
| MOTION_MODE motion_mode = mbmi->motion_mode; |
| |
| // Note(rachelbarker): Both of the conditions in brackets here are used in |
| // various places to mean "is this block interintra?". This assertion is a |
| // quick check to ensure these conditions can't get out of sync. |
| #if !CONFIG_INTERINTRA_IMPROVEMENT |
| assert((mbmi->ref_frame[1] == INTRA_FRAME) == (motion_mode == INTERINTRA)); |
| #endif // !CONFIG_INTERINTRA_IMPROVEMENT |
| |
| if (mbmi->mode == WARPMV) { |
| assert(mbmi->motion_mode == WARP_DELTA || |
| mbmi->motion_mode == WARPED_CAUSAL); |
| // Signal if the motion mode is WARP_CAUSAL or WARP_DELTA |
| if (allowed_motion_modes & (1 << WARPED_CAUSAL)) { |
| aom_write_symbol(w, motion_mode == WARPED_CAUSAL, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| xd->tile_ctx->warped_causal_warpmv_cdf, |
| #else |
| xd->tile_ctx->warped_causal_warpmv_cdf[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| 2); |
| } |
| return; |
| } |
| |
| if (allowed_motion_modes & (1 << INTERINTRA)) { |
| const int bsize_group = size_group_lookup[bsize]; |
| aom_write_symbol(w, motion_mode == INTERINTRA, |
| xd->tile_ctx->interintra_cdf[bsize_group], 2); |
| if (motion_mode == INTERINTRA) { |
| aom_write_symbol(w, mbmi->interintra_mode, |
| xd->tile_ctx->interintra_mode_cdf[bsize_group], |
| INTERINTRA_MODES); |
| if (av1_is_wedge_used(bsize)) { |
| aom_write_symbol(w, mbmi->use_wedge_interintra, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| xd->tile_ctx->wedge_interintra_cdf, |
| #else |
| xd->tile_ctx->wedge_interintra_cdf[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| 2); |
| if (mbmi->use_wedge_interintra) { |
| #if CONFIG_WEDGE_MOD_EXT |
| write_wedge_mode(w, xd->tile_ctx, bsize, |
| mbmi->interintra_wedge_index); |
| #else |
| aom_write_symbol(w, mbmi->interintra_wedge_index, |
| xd->tile_ctx->wedge_idx_cdf[bsize], MAX_WEDGE_TYPES); |
| #endif // CONFIG_WEDGE_MOD_EXT |
| } |
| } |
| return; |
| } |
| } |
| |
| if (allowed_motion_modes & (1 << OBMC_CAUSAL)) { |
| aom_write_symbol(w, motion_mode == OBMC_CAUSAL, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| xd->tile_ctx->obmc_cdf, |
| #else |
| xd->tile_ctx->obmc_cdf[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| 2); |
| |
| if (motion_mode == OBMC_CAUSAL) { |
| return; |
| } |
| } |
| |
| if (allowed_motion_modes & (1 << WARP_EXTEND)) { |
| const int ctx1 = av1_get_warp_extend_ctx1(xd, mbmi); |
| const int ctx2 = av1_get_warp_extend_ctx2(xd, mbmi); |
| aom_write_symbol(w, motion_mode == WARP_EXTEND, |
| xd->tile_ctx->warp_extend_cdf[ctx1][ctx2], 2); |
| if (motion_mode == WARP_EXTEND) { |
| return; |
| } |
| } |
| |
| if (allowed_motion_modes & (1 << WARPED_CAUSAL)) { |
| aom_write_symbol(w, motion_mode == WARPED_CAUSAL, |
| #if CONFIG_D149_CTX_MODELING_OPT && !NO_D149_FOR_WARPED_CAUSAL |
| xd->tile_ctx->warped_causal_cdf, |
| #else |
| xd->tile_ctx->warped_causal_cdf[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT && !NO_D149_FOR_WARPED_CAUSAL |
| 2); |
| |
| if (motion_mode == WARPED_CAUSAL) { |
| return; |
| } |
| } |
| |
| if (allowed_motion_modes & (1 << WARP_DELTA)) { |
| aom_write_symbol(w, motion_mode == WARP_DELTA, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| xd->tile_ctx->warp_delta_cdf, |
| #else |
| xd->tile_ctx->warp_delta_cdf[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| 2); |
| } |
| } |
| #else |
| static AOM_INLINE void write_motion_mode(const AV1_COMMON *cm, MACROBLOCKD *xd, |
| const MB_MODE_INFO *mbmi, |
| aom_writer *w) { |
| MOTION_MODE last_motion_mode_allowed = motion_mode_allowed(cm, xd, mbmi); |
| assert(mbmi->motion_mode <= last_motion_mode_allowed); |
| switch (last_motion_mode_allowed) { |
| case SIMPLE_TRANSLATION: break; |
| case OBMC_CAUSAL: |
| #if !CONFIG_D149_CTX_MODELING_OPT |
| const int bsize = mbmi->sb_type[PLANE_TYPE_Y]; |
| #endif // !CONFIG_D149_CTX_MODELING_OPT |
| aom_write_symbol(w, mbmi->motion_mode == OBMC_CAUSAL, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| xd->tile_ctx->obmc_cdf, |
| #else |
| xd->tile_ctx->obmc_cdf[bsize], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| 2); |
| break; |
| default: |
| aom_write_symbol( |
| w, mbmi->motion_mode, |
| xd->tile_ctx->motion_mode_cdf[mbmi->sb_type[PLANE_TYPE_Y]], |
| MOTION_MODES); |
| } |
| } |
| #endif // CONFIG_EXTENDED_WARP_PREDICTION |
| |
| static AOM_INLINE void write_delta_qindex(const MACROBLOCKD *xd, |
| int delta_qindex, aom_writer *w) { |
| int sign = delta_qindex < 0; |
| int abs = sign ? -delta_qindex : delta_qindex; |
| int rem_bits, thr; |
| int smallval = abs < DELTA_Q_SMALL ? 1 : 0; |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| |
| aom_write_symbol(w, AOMMIN(abs, DELTA_Q_SMALL), ec_ctx->delta_q_cdf, |
| DELTA_Q_PROBS + 1); |
| |
| if (!smallval) { |
| rem_bits = get_msb(abs - 1); |
| thr = (1 << rem_bits) + 1; |
| aom_write_literal(w, rem_bits - 1, 3); |
| aom_write_literal(w, abs - thr, rem_bits); |
| } |
| if (abs > 0) { |
| aom_write_bit(w, sign); |
| } |
| } |
| |
| static AOM_INLINE void write_delta_lflevel(const AV1_COMMON *cm, |
| const MACROBLOCKD *xd, int lf_id, |
| int delta_lflevel, aom_writer *w) { |
| int sign = delta_lflevel < 0; |
| int abs = sign ? -delta_lflevel : delta_lflevel; |
| int rem_bits, thr; |
| int smallval = abs < DELTA_LF_SMALL ? 1 : 0; |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| |
| if (cm->delta_q_info.delta_lf_multi) { |
| assert(lf_id >= 0 && lf_id < (av1_num_planes(cm) > 1 ? FRAME_LF_COUNT |
| : FRAME_LF_COUNT - 2)); |
| aom_write_symbol(w, AOMMIN(abs, DELTA_LF_SMALL), |
| ec_ctx->delta_lf_multi_cdf[lf_id], DELTA_LF_PROBS + 1); |
| } else { |
| aom_write_symbol(w, AOMMIN(abs, DELTA_LF_SMALL), ec_ctx->delta_lf_cdf, |
| DELTA_LF_PROBS + 1); |
| } |
| |
| if (!smallval) { |
| rem_bits = get_msb(abs - 1); |
| thr = (1 << rem_bits) + 1; |
| aom_write_literal(w, rem_bits - 1, 3); |
| aom_write_literal(w, abs - thr, rem_bits); |
| } |
| if (abs > 0) { |
| aom_write_bit(w, sign); |
| } |
| } |
| |
| #if CONFIG_PALETTE_IMPROVEMENTS |
| static AOM_INLINE void pack_map_tokens(const MACROBLOCKD *xd, aom_writer *w, |
| const TokenExtra **tp, int n, int cols, |
| int rows, int plane |
| #if CONFIG_PALETTE_LINE_COPY |
| , |
| const bool direction_allowed |
| #endif // CONFIG_PALETTE_LINE_COPY |
| |
| ) { |
| const TokenExtra *p = *tp; |
| #if CONFIG_PALETTE_LINE_COPY |
| const int direction = (direction_allowed) ? p->direction : 0; |
| if (direction_allowed) { |
| aom_write_symbol(w, p->direction, xd->tile_ctx->palette_direction_cdf, 2); |
| } |
| #else |
| const int direction = 0; |
| #endif // CONFIG_PALETTE_LINE_COPY |
| const int ax1_limit = direction ? rows : cols; |
| const int ax2_limit = direction ? cols : rows; |
| |
| // for (int y = 0; y < rows; y++) { |
| for (int ax2 = 0; ax2 < ax2_limit; ax2++) { |
| assert(p->identity_row_ctx >= 0 && |
| p->identity_row_ctx < PALETTE_ROW_FLAG_CONTEXTS); |
| int identity_row_flag = p->identity_row_flag; |
| const int ctx = p->identity_row_ctx; |
| // Derive the cdf corresponding to identity_row using the context |
| // (i.e.,identify_row_ctx) stored during the encoding. |
| aom_cdf_prob *identity_row_cdf = |
| plane ? xd->tile_ctx->identity_row_cdf_uv[ctx] |
| : xd->tile_ctx->identity_row_cdf_y[ctx]; |
| |
| #if CONFIG_PALETTE_LINE_COPY |
| aom_write_symbol(w, identity_row_flag, identity_row_cdf, 3); |
| #else |
| aom_write_symbol(w, identity_row_flag, identity_row_cdf, 2); |
| #endif // CONFIG_PALETTE_LINE_COPY |
| // for (int x = 0; x < cols; x++) { |
| for (int ax1 = 0; ax1 < ax1_limit; ax1++) { |
| // if (y == 0 && x == 0) { |
| if (ax2 == 0 && ax1 == 0) { |
| write_uniform(w, n, p->token); |
| } else { |
| #if CONFIG_PALETTE_LINE_COPY |
| if (!(identity_row_flag == 2) && |
| (!(identity_row_flag == 1) || ax1 == 0)) { |
| #else |
| if (!identity_row_flag || ax1 == 0) { |
| #endif // CONFIG_PALETTE_LINE_COPY |
| assert(p->color_map_palette_size_idx >= 0 && |
| p->color_map_ctx_idx >= 0); |
| aom_cdf_prob *color_map_pb_cdf = |
| plane ? xd->tile_ctx->palette_uv_color_index_cdf |
| [p->color_map_palette_size_idx][p->color_map_ctx_idx] |
| : xd->tile_ctx->palette_y_color_index_cdf |
| [p->color_map_palette_size_idx][p->color_map_ctx_idx]; |
| aom_write_symbol(w, p->token, color_map_pb_cdf, n); |
| } |
| } |
| #if CONFIG_PALETTE_LINE_COPY |
| p++; |
| #else |
| if (!identity_row_flag || ax1 == 0) p++; |
| #endif |
| } |
| } |
| *tp = p; |
| } |
| #else |
| static AOM_INLINE void pack_map_tokens(const MACROBLOCKD *xd, aom_writer *w, |
| const TokenExtra **tp, int n, int num, |
| int plane) { |
| const TokenExtra *p = *tp; |
| write_uniform(w, n, p->token); // The first color index. |
| ++p; |
| --num; |
| for (int i = 0; i < num; ++i) { |
| assert(p->color_map_palette_size_idx >= 0 && p->color_map_ctx_idx >= 0); |
| aom_cdf_prob *color_map_pb_cdf = |
| plane ? xd->tile_ctx |
| ->palette_uv_color_index_cdf[p->color_map_palette_size_idx] |
| [p->color_map_ctx_idx] |
| : xd->tile_ctx |
| ->palette_y_color_index_cdf[p->color_map_palette_size_idx] |
| [p->color_map_ctx_idx]; |
| aom_write_symbol(w, p->token, color_map_pb_cdf, n); |
| ++p; |
| } |
| *tp = p; |
| } |
| #endif // CONFIG_PALETTE_IMPROVEMENTS |
| |
| static AOM_INLINE void av1_write_coeffs_txb_facade( |
| aom_writer *w, AV1_COMMON *cm, MACROBLOCK *const x, MACROBLOCKD *xd, |
| MB_MODE_INFO *mbmi, int plane, int block, int blk_row, int blk_col, |
| TX_SIZE tx_size) { |
| // code significance and TXB |
| const int code_rest = |
| av1_write_sig_txtype(cm, x, w, blk_row, blk_col, plane, block, tx_size); |
| const TX_TYPE tx_type = |
| av1_get_tx_type(xd, get_plane_type(plane), blk_row, blk_col, tx_size, |
| cm->features.reduced_tx_set_used); |
| const int is_inter = is_inter_block(mbmi, xd->tree_type); |
| if (code_rest) { |
| if ((mbmi->fsc_mode[xd->tree_type == CHROMA_PART] && |
| get_primary_tx_type(tx_type) == IDTX && plane == PLANE_TYPE_Y) || |
| use_inter_fsc(cm, plane, tx_type, is_inter)) { |
| av1_write_coeffs_txb_skip(cm, x, w, blk_row, blk_col, plane, block, |
| tx_size); |
| } else { |
| av1_write_coeffs_txb(cm, x, w, blk_row, blk_col, plane, block, tx_size); |
| } |
| } |
| } |
| |
| static AOM_INLINE void pack_txb_tokens( |
| aom_writer *w, AV1_COMMON *cm, MACROBLOCK *const x, const TokenExtra **tp, |
| const TokenExtra *const tok_end, MACROBLOCKD *xd, MB_MODE_INFO *mbmi, |
| int plane, BLOCK_SIZE plane_bsize, aom_bit_depth_t bit_depth, int block, |
| int blk_row, int blk_col, TX_SIZE tx_size, TOKEN_STATS *token_stats) { |
| const int max_blocks_high = max_block_high(xd, plane_bsize, plane); |
| const int max_blocks_wide = max_block_wide(xd, plane_bsize, plane); |
| |
| if (blk_row >= max_blocks_high || blk_col >= max_blocks_wide) return; |
| |
| const struct macroblockd_plane *const pd = &xd->plane[plane]; |
| #if CONFIG_EXT_RECUR_PARTITIONS |
| #if CONFIG_TX_PARTITION_TYPE_EXT |
| const int index = av1_get_txb_size_index(plane_bsize, blk_row, blk_col); |
| const BLOCK_SIZE bsize_base = get_bsize_base(xd, mbmi, plane); |
| const TX_SIZE plane_tx_size = |
| plane ? av1_get_max_uv_txsize(bsize_base, pd->subsampling_x, |
| pd->subsampling_y) |
| : mbmi->inter_tx_size[index]; |
| #else |
| const BLOCK_SIZE bsize_base = get_bsize_base(xd, mbmi, plane); |
| const TX_SIZE plane_tx_size = |
| plane ? av1_get_max_uv_txsize(bsize_base, pd->subsampling_x, |
| pd->subsampling_y) |
| : mbmi->inter_tx_size[av1_get_txb_size_index(plane_bsize, blk_row, |
| blk_col)]; |
| #endif // CONFIG_TX_PARTITION_TYPE_EXT |
| #else |
| const TX_SIZE plane_tx_size = |
| plane ? av1_get_max_uv_txsize(mbmi->sb_type[plane > 0], pd->subsampling_x, |
| pd->subsampling_y) |
| : mbmi->inter_tx_size[av1_get_txb_size_index(plane_bsize, blk_row, |
| blk_col)]; |
| #endif // CONFIG_EXT_RECUR_PARTITIONS |
| |
| if (tx_size == plane_tx_size || plane) { |
| av1_write_coeffs_txb_facade(w, cm, x, xd, mbmi, plane, block, blk_row, |
| blk_col, tx_size); |
| #if CONFIG_RD_DEBUG |
| TOKEN_STATS tmp_token_stats; |
| init_token_stats(&tmp_token_stats); |
| token_stats->txb_coeff_cost_map[blk_row][blk_col] = tmp_token_stats.cost; |
| token_stats->cost += tmp_token_stats.cost; |
| #endif |
| } else { |
| #if CONFIG_NEW_TX_PARTITION |
| (void)tp; |
| (void)tok_end; |
| (void)token_stats; |
| (void)bit_depth; |
| TX_SIZE sub_txs[MAX_TX_PARTITIONS] = { 0 }; |
| #if CONFIG_TX_PARTITION_TYPE_EXT |
| TXB_POS_INFO txb_pos; |
| get_tx_partition_sizes(mbmi->tx_partition_type[index], tx_size, &txb_pos, |
| sub_txs); |
| for (int txb_idx = 0; txb_idx < txb_pos.n_partitions; ++txb_idx) { |
| const TX_SIZE sub_tx = sub_txs[txb_idx]; |
| const int bsw = tx_size_wide_unit[sub_tx]; |
| const int bsh = tx_size_high_unit[sub_tx]; |
| const int sub_step = bsw * bsh; |
| const int offsetr = blk_row + txb_pos.row_offset[txb_idx]; |
| const int offsetc = blk_col + txb_pos.col_offset[txb_idx]; |
| if (offsetr >= max_blocks_high || offsetc >= max_blocks_wide) continue; |
| av1_write_coeffs_txb_facade(w, cm, x, xd, mbmi, plane, block, offsetr, |
| offsetc, sub_tx); |
| #if CONFIG_RD_DEBUG |
| TOKEN_STATS tmp_token_stats; |
| init_token_stats(&tmp_token_stats); |
| token_stats->txb_coeff_cost_map[offsetr][offsetc] = tmp_token_stats.cost; |
| token_stats->cost += tmp_token_stats.cost; |
| #endif |
| block += sub_step; |
| } |
| #else |
| const int index = av1_get_txb_size_index(plane_bsize, blk_row, blk_col); |
| get_tx_partition_sizes(mbmi->tx_partition_type[index], tx_size, sub_txs); |
| int cur_partition = 0; |
| int bsw = 0, bsh = 0; |
| for (int r = 0; r < tx_size_high_unit[tx_size]; r += bsh) { |
| for (int c = 0; c < tx_size_wide_unit[tx_size]; c += bsw) { |
| const TX_SIZE sub_tx = sub_txs[cur_partition]; |
| bsw = tx_size_wide_unit[sub_tx]; |
| bsh = tx_size_high_unit[sub_tx]; |
| const int sub_step = bsw * bsh; |
| const int offsetr = blk_row + r; |
| const int offsetc = blk_col + c; |
| if (offsetr >= max_blocks_high || offsetc >= max_blocks_wide) continue; |
| av1_write_coeffs_txb_facade(w, cm, x, xd, mbmi, plane, block, offsetr, |
| offsetc, sub_tx); |
| #if CONFIG_RD_DEBUG |
| TOKEN_STATS tmp_token_stats; |
| init_token_stats(&tmp_token_stats); |
| token_stats->txb_coeff_cost_map[offsetr][offsetc] = |
| tmp_token_stats.cost; |
| token_stats->cost += tmp_token_stats.cost; |
| #endif |
| block += sub_step; |
| cur_partition++; |
| } |
| } |
| #endif // CONFIG_TX_PARTITION_TYPE_EXT |
| #else |
| const TX_SIZE sub_txs = sub_tx_size_map[tx_size]; |
| const int bsw = tx_size_wide_unit[sub_txs]; |
| const int bsh = tx_size_high_unit[sub_txs]; |
| const int step = bsh * bsw; |
| |
| assert(bsw > 0 && bsh > 0); |
| |
| for (int r = 0; r < tx_size_high_unit[tx_size]; r += bsh) { |
| for (int c = 0; c < tx_size_wide_unit[tx_size]; c += bsw) { |
| const int offsetr = blk_row + r; |
| const int offsetc = blk_col + c; |
| if (offsetr >= max_blocks_high || offsetc >= max_blocks_wide) continue; |
| pack_txb_tokens(w, cm, x, tp, tok_end, xd, mbmi, plane, plane_bsize, |
| bit_depth, block, offsetr, offsetc, sub_txs, |
| token_stats); |
| block += step; |
| } |
| } |
| #endif // CONFIG_NEW_TX_PARTITION |
| } |
| } |
| |
| static INLINE void set_spatial_segment_id( |
| const CommonModeInfoParams *const mi_params, uint8_t *segment_ids, |
| BLOCK_SIZE bsize, int mi_row, int mi_col, int segment_id) { |
| const int mi_offset = mi_row * mi_params->mi_cols + mi_col; |
| const int bw = mi_size_wide[bsize]; |
| const int bh = mi_size_high[bsize]; |
| const int xmis = AOMMIN(mi_params->mi_cols - mi_col, bw); |
| const int ymis = AOMMIN(mi_params->mi_rows - mi_row, bh); |
| |
| for (int y = 0; y < ymis; ++y) { |
| for (int x = 0; x < xmis; ++x) { |
| segment_ids[mi_offset + y * mi_params->mi_cols + x] = segment_id; |
| } |
| } |
| } |
| |
| int av1_neg_interleave(int x, int ref, int max) { |
| assert(x < max); |
| const int diff = x - ref; |
| if (!ref) return x; |
| if (ref >= (max - 1)) return -x + max - 1; |
| if (2 * ref < max) { |
| if (abs(diff) <= ref) { |
| if (diff > 0) |
| return (diff << 1) - 1; |
| else |
| return ((-diff) << 1); |
| } |
| return x; |
| } else { |
| if (abs(diff) < (max - ref)) { |
| if (diff > 0) |
| return (diff << 1) - 1; |
| else |
| return ((-diff) << 1); |
| } |
| return (max - x) - 1; |
| } |
| } |
| |
| static AOM_INLINE void write_segment_id(AV1_COMP *cpi, |
| const MB_MODE_INFO *const mbmi, |
| aom_writer *w, |
| const struct segmentation *seg, |
| struct segmentation_probs *segp, |
| int skip_txfm) { |
| if (!seg->enabled || !seg->update_map) return; |
| |
| AV1_COMMON *const cm = &cpi->common; |
| MACROBLOCKD *const xd = &cpi->td.mb.e_mbd; |
| int cdf_num; |
| const int pred = av1_get_spatial_seg_pred(cm, xd, &cdf_num); |
| const int mi_row = xd->mi_row; |
| const int mi_col = xd->mi_col; |
| |
| if (skip_txfm) { |
| // Still need to transmit tx size for intra blocks even if skip_txfm is |
| // true. Changing segment_id may make the tx size become invalid, e.g |
| // changing from lossless to lossy. |
| assert(is_inter_block(mbmi, xd->tree_type) || |
| !cpi->enc_seg.has_lossless_segment); |
| set_spatial_segment_id(&cm->mi_params, cm->cur_frame->seg_map, |
| mbmi->sb_type[xd->tree_type == CHROMA_PART], mi_row, |
| mi_col, pred); |
| set_spatial_segment_id(&cm->mi_params, cpi->enc_seg.map, |
| mbmi->sb_type[xd->tree_type == CHROMA_PART], mi_row, |
| mi_col, pred); |
| /* mbmi is read only but we need to update segment_id */ |
| ((MB_MODE_INFO *)mbmi)->segment_id = pred; |
| return; |
| } |
| |
| const int coded_id = |
| av1_neg_interleave(mbmi->segment_id, pred, seg->last_active_segid + 1); |
| aom_cdf_prob *pred_cdf = segp->spatial_pred_seg_cdf[cdf_num]; |
| aom_write_symbol(w, coded_id, pred_cdf, MAX_SEGMENTS); |
| set_spatial_segment_id(&cm->mi_params, cm->cur_frame->seg_map, |
| mbmi->sb_type[xd->tree_type == CHROMA_PART], mi_row, |
| mi_col, mbmi->segment_id); |
| } |
| |
| static AOM_INLINE void write_single_ref( |
| const MACROBLOCKD *xd, const RefFramesInfo *const ref_frames_info, |
| aom_writer *w) { |
| const MB_MODE_INFO *const mbmi = xd->mi[0]; |
| MV_REFERENCE_FRAME ref = mbmi->ref_frame[0]; |
| const int n_refs = ref_frames_info->num_total_refs; |
| assert(ref < n_refs); |
| for (int i = 0; i < n_refs - 1; i++) { |
| const int bit = ref == i; |
| aom_write_symbol(w, bit, av1_get_pred_cdf_single_ref(xd, i, n_refs), 2); |
| if (bit) return; |
| } |
| assert(ref == (n_refs - 1)); |
| } |
| |
| static AOM_INLINE void write_compound_ref( |
| const MACROBLOCKD *xd, const RefFramesInfo *const ref_frames_info, |
| aom_writer *w) { |
| const MB_MODE_INFO *const mbmi = xd->mi[0]; |
| MV_REFERENCE_FRAME ref0 = mbmi->ref_frame[0]; |
| MV_REFERENCE_FRAME ref1 = mbmi->ref_frame[1]; |
| const int n_refs = ref_frames_info->num_total_refs; |
| #if CONFIG_ALLOW_SAME_REF_COMPOUND |
| #if CONFIG_IMPROVED_SAME_REF_COMPOUND |
| int may_have_same_ref_comp = ref_frames_info->num_same_ref_compound > 0; |
| #endif // CONFIG_IMPROVED_SAME_REF_COMPOUND |
| if (ref_frames_info->num_same_ref_compound > 0) { |
| assert(n_refs >= 1); |
| assert(ref0 <= ref1); |
| } else { |
| #endif // CONFIG_ALLOW_SAME_REF_COMPOUND |
| assert(n_refs >= 2); |
| assert(ref0 < ref1); |
| #if CONFIG_ALLOW_SAME_REF_COMPOUND |
| } |
| #endif // CONFIG_ALLOW_SAME_REF_COMPOUND |
| int n_bits = 0; |
| |
| #if CONFIG_IMPROVED_SAME_REF_COMPOUND |
| for (int i = 0; |
| (i < n_refs + n_bits - 2 || may_have_same_ref_comp) && n_bits < 2; i++) { |
| const int bit = |
| ((n_bits == 0) && (ref0 == i)) || ((n_bits == 1) && (ref1 == i)); |
| #elif CONFIG_ALLOW_SAME_REF_COMPOUND |
| for (int i = 0; i < n_refs - 1 && n_bits < 2; i++) { |
| const int bit = |
| ((n_bits == 0) && (ref0 == i)) || ((n_bits == 1) && (ref1 == i)); |
| #else |
| for (int i = 0; i < n_refs + n_bits - 2 && n_bits < 2; i++) { |
| const int bit = ref0 == i || ref1 == i; |
| #endif // CONFIG_IMPROVED_SAME_REF_COMPOUND |
| // bit_type: -1 for ref0, 0 for opposite sided ref1, 1 for same sided ref1 |
| const int bit_type = |
| n_bits == 0 ? -1 |
| : av1_get_compound_ref_bit_type(ref_frames_info, ref0, i); |
| // Implicitly signal a 1 in either case: |
| // 1) ref0 = RANKED_REF0_TO_PRUNE - 1 |
| // 2) no reference is signaled yet, the next ref is not allowed for same |
| // ref compound, and there are only two references left (this case |
| // should only be met when same ref compound is on, where the |
| // following bit may be 0 or 1). |
| int implicit_ref_bit = n_bits == 0 && i >= RANKED_REF0_TO_PRUNE - 1; |
| #if CONFIG_IMPROVED_SAME_REF_COMPOUND |
| implicit_ref_bit |= n_bits == 0 && i >= n_refs - 2 && |
| i + 1 >= ref_frames_info->num_same_ref_compound; |
| assert(IMPLIES(n_bits == 0 && i >= n_refs - 2, |
| i < ref_frames_info->num_same_ref_compound)); |
| #endif // CONFIG_IMPROVED_SAME_REF_COMPOUND |
| if (!implicit_ref_bit) { |
| aom_write_symbol( |
| w, bit, |
| av1_get_pred_cdf_compound_ref(xd, i, n_bits, bit_type, n_refs), 2); |
| } |
| n_bits += bit; |
| #if CONFIG_IMPROVED_SAME_REF_COMPOUND |
| if (i < ref_frames_info->num_same_ref_compound && may_have_same_ref_comp) { |
| may_have_same_ref_comp = |
| !bit && i + 1 < ref_frames_info->num_same_ref_compound; |
| i -= bit; |
| } else { |
| may_have_same_ref_comp = 0; |
| } |
| #elif CONFIG_ALLOW_SAME_REF_COMPOUND |
| if (i < ref_frames_info->num_same_ref_compound) i -= bit; |
| #endif // CONFIG_IMPROVED_SAME_REF_COMPOUND |
| } |
| assert(IMPLIES(n_bits < 2, ref1 == n_refs - 1)); |
| #if CONFIG_IMPROVED_SAME_REF_COMPOUND |
| if (ref_frames_info->num_same_ref_compound == 0) |
| #endif // CONFIG_ALLOW_SAME_REF_COMPOUND |
| assert(IMPLIES(n_bits < 1, ref0 == n_refs - 2)); |
| } |
| |
| // This function encodes the reference frame |
| static AOM_INLINE void write_ref_frames(const AV1_COMMON *cm, |
| const MACROBLOCKD *xd, aom_writer *w) { |
| const MB_MODE_INFO *const mbmi = xd->mi[0]; |
| const int is_compound = has_second_ref(mbmi); |
| const int segment_id = mbmi->segment_id; |
| |
| // If segment level coding of this signal is disabled... |
| // or the segment allows multiple reference frame options |
| if (segfeature_active(&cm->seg, segment_id, SEG_LVL_SKIP) || |
| segfeature_active(&cm->seg, segment_id, SEG_LVL_GLOBALMV)) { |
| assert(mbmi->ref_frame[0] == get_closest_pastcur_ref_index(cm)); |
| assert(!is_compound); |
| } else { |
| // does the feature use compound prediction or not |
| // (if not specified at the frame/segment level) |
| if (cm->current_frame.reference_mode == REFERENCE_MODE_SELECT) { |
| if (is_comp_ref_allowed(mbmi->sb_type[PLANE_TYPE_Y])) |
| aom_write_symbol(w, is_compound, av1_get_reference_mode_cdf(cm, xd), 2); |
| } else { |
| assert((!is_compound) == |
| (cm->current_frame.reference_mode == SINGLE_REFERENCE)); |
| } |
| |
| if (is_compound) { |
| write_compound_ref(xd, &cm->ref_frames_info, w); |
| } else { |
| write_single_ref(xd, &cm->ref_frames_info, w); |
| } |
| } |
| } |
| |
| static AOM_INLINE void write_filter_intra_mode_info( |
| const AV1_COMMON *cm, const MACROBLOCKD *xd, const MB_MODE_INFO *const mbmi, |
| aom_writer *w) { |
| if (av1_filter_intra_allowed(cm, mbmi |
| #if CONFIG_LOSSLESS_DPCM |
| , |
| xd |
| #endif |
| ) && |
| xd->tree_type != CHROMA_PART) { |
| aom_write_symbol(w, mbmi->filter_intra_mode_info.use_filter_intra, |
| #if CONFIG_D149_CTX_MODELING_OPT |
| xd->tile_ctx->filter_intra_cdfs, |
| #else |
| xd->tile_ctx |
| ->filter_intra_cdfs[mbmi->sb_type[PLANE_TYPE_Y]], |
| #endif // CONFIG_D149_CTX_MODELING_OPT |
| 2); |
| if (mbmi->filter_intra_mode_info.use_filter_intra) { |
| const FILTER_INTRA_MODE mode = |
| mbmi->filter_intra_mode_info.filter_intra_mode; |
| aom_write_symbol(w, mode, xd->tile_ctx->filter_intra_mode_cdf, |
| FILTER_INTRA_MODES); |
| } |
| } |
| } |
| |
| #if !CONFIG_AIMC |
| static AOM_INLINE void write_angle_delta(aom_writer *w, int angle_delta, |
| aom_cdf_prob *cdf) { |
| aom_write_symbol(w, angle_delta + MAX_ANGLE_DELTA, cdf, |
| 2 * MAX_ANGLE_DELTA + 1); |
| } |
| #endif // !CONFIG_AIMC |
| |
| static AOM_INLINE void write_mb_interp_filter(AV1_COMMON *const cm, |
| const MACROBLOCKD *xd, |
| aom_writer *w) { |
| const MB_MODE_INFO *const mbmi = xd->mi[0]; |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| |
| if (!av1_is_interp_needed(cm, xd)) { |
| #if CONFIG_DEBUG |
| #if CONFIG_OPTFLOW_REFINEMENT |
| // Sharp filter is always used whenever optical flow refinement is applied. |
| int mb_interp_filter = (opfl_allowed_for_cur_block(cm, mbmi) |
| |
| #if CONFIG_REFINEMV |
| || mbmi->refinemv_flag |
| #endif // CONFIG_REFINEMV |
| #if CONFIG_TIP_REF_PRED_MERGING |
| || is_tip_ref_frame(mbmi->ref_frame[0]) |
| #endif |
| ) |
| ? MULTITAP_SHARP |
| : cm->features.interp_filter; |
| #else |
| int mb_interp_filter = cm->features.interp_filter; |
| #endif // CONFIG_OPTFLOW_REFINEMENT |
| assert(mbmi->interp_fltr == av1_unswitchable_filter(mb_interp_filter)); |
| (void)mb_interp_filter; |
| #endif // CONFIG_DEBUG |
| return; |
| } |
| if (cm->features.interp_filter == SWITCHABLE) { |
| #if CONFIG_OPTFLOW_REFINEMENT |
| if (opfl_allowed_for_cur_block(cm, mbmi) |
| #if CONFIG_REFINEMV |
| || mbmi->refinemv_flag |
| #endif // CONFIG_REFINEMV |
| #if CONFIG_TIP_REF_PRED_MERGING |
| || is_tip_ref_frame(mbmi->ref_frame[0]) |
| #endif |
| ) { |
| assert(mbmi->interp_fltr == MULTITAP_SHARP); |
| return; |
| } |
| #endif // CONFIG_OPTFLOW_REFINEMENT |
| const int ctx = av1_get_pred_context_switchable_interp(xd, 0); |
| const InterpFilter filter = mbmi->interp_fltr; |
| aom_write_symbol(w, filter, ec_ctx->switchable_interp_cdf[ctx], |
| SWITCHABLE_FILTERS); |
| ++cm->cur_frame->interp_filter_selected[filter]; |
| } |
| } |
| |
| // Transmit color values with delta encoding. Write the first value as |
| // literal, and the deltas between each value and the previous one. "min_val" is |
| // the smallest possible value of the deltas. |
| static AOM_INLINE void delta_encode_palette_colors(const int *colors, int num, |
| int bit_depth, int min_val, |
| aom_writer *w) { |
| if (num <= 0) return; |
| assert(colors[0] < (1 << bit_depth)); |
| aom_write_literal(w, colors[0], bit_depth); |
| if (num == 1) return; |
| int max_delta = 0; |
| int deltas[PALETTE_MAX_SIZE]; |
| memset(deltas, 0, sizeof(deltas)); |
| for (int i = 1; i < num; ++i) { |
| assert(colors[i] < (1 << bit_depth)); |
| const int delta = colors[i] - colors[i - 1]; |
| deltas[i - 1] = delta; |
| assert(delta >= min_val); |
| if (delta > max_delta) max_delta = delta; |
| } |
| const int min_bits = bit_depth - 3; |
| int bits = AOMMAX(av1_ceil_log2(max_delta + 1 - min_val), min_bits); |
| assert(bits <= bit_depth); |
| int range = (1 << bit_depth) - colors[0] - min_val; |
| aom_write_literal(w, bits - min_bits, 2); |
| for (int i = 0; i < num - 1; ++i) { |
| aom_write_literal(w, deltas[i] - min_val, bits); |
| range -= deltas[i]; |
| bits = AOMMIN(bits, av1_ceil_log2(range)); |
| } |
| } |
| |
| // Transmit luma palette color values. First signal if each color in the color |
| // cache is used. Those colors that are not in the cache are transmitted with |
| // delta encoding. |
| static AOM_INLINE void write_palette_colors_y( |
| const MACROBLOCKD *const xd, const PALETTE_MODE_INFO *const pmi, |
| int bit_depth, aom_writer *w) { |
| const int n = pmi->palette_size[0]; |
| uint16_t color_cache[2 * PALETTE_MAX_SIZE]; |
| const int n_cache = av1_get_palette_cache(xd, 0, color_cache); |
| int out_cache_colors[PALETTE_MAX_SIZE]; |
| uint8_t cache_color_found[2 * PALETTE_MAX_SIZE]; |
| const int n_out_cache = |
| av1_index_color_cache(color_cache, n_cache, pmi->palette_colors, n, |
| cache_color_found, out_cache_colors); |
| int n_in_cache = 0; |
| for (int i = 0; i < n_cache && n_in_cache < n; ++i) { |
| const int found = cache_color_found[i]; |
| aom_write_bit(w, found); |
| n_in_cache += found; |
| } |
| assert(n_in_cache + n_out_cache == n); |
| delta_encode_palette_colors(out_cache_colors, n_out_cache, bit_depth, 1, w); |
| } |
| |
| // Write chroma palette color values. U channel is handled similarly to the luma |
| // channel. For v channel, either use delta encoding or transmit raw values |
| // directly, whichever costs less. |
| static AOM_INLINE void write_palette_colors_uv( |
| const MACROBLOCKD *const xd, const PALETTE_MODE_INFO *const pmi, |
| int bit_depth, aom_writer *w) { |
| const int n = pmi->palette_size[1]; |
| const uint16_t *colors_u = pmi->palette_colors + PALETTE_MAX_SIZE; |
| const uint16_t *colors_v = pmi->palette_colors + 2 * PALETTE_MAX_SIZE; |
| // U channel colors. |
| uint16_t color_cache[2 * PALETTE_MAX_SIZE]; |
| const int n_cache = av1_get_palette_cache(xd, 1, color_cache); |
| int out_cache_colors[PALETTE_MAX_SIZE]; |
| uint8_t cache_color_found[2 * PALETTE_MAX_SIZE]; |
| const int n_out_cache = av1_index_color_cache( |
| color_cache, n_cache, colors_u, n, cache_color_found, out_cache_colors); |
| int n_in_cache = 0; |
| for (int i = 0; i < n_cache && n_in_cache < n; ++i) { |
| const int found = cache_color_found[i]; |
| aom_write_bit(w, found); |
| n_in_cache += found; |
| } |
| delta_encode_palette_colors(out_cache_colors, n_out_cache, bit_depth, 0, w); |
| |
| // V channel colors. Don't use color cache as the colors are not sorted. |
| const int max_val = 1 << bit_depth; |
| int zero_count = 0, min_bits_v = 0; |
| int bits_v = |
| av1_get_palette_delta_bits_v(pmi, bit_depth, &zero_count, &min_bits_v); |
| const int rate_using_delta = |
| 2 + bit_depth + (bits_v + 1) * (n - 1) - zero_count; |
| const int rate_using_raw = bit_depth * n; |
| if (rate_using_delta < rate_using_raw) { // delta encoding |
| assert(colors_v[0] < (1 << bit_depth)); |
| aom_write_bit(w, 1); |
| aom_write_literal(w, bits_v - min_bits_v, 2); |
| aom_write_literal(w, colors_v[0], bit_depth); |
| for (int i = 1; i < n; ++i) { |
| assert(colors_v[i] < (1 << bit_depth)); |
| if (colors_v[i] == colors_v[i - 1]) { // No need to signal sign bit. |
| aom_write_literal(w, 0, bits_v); |
| continue; |
| } |
| const int delta = abs((int)colors_v[i] - colors_v[i - 1]); |
| const int sign_bit = colors_v[i] < colors_v[i - 1]; |
| if (delta <= max_val - delta) { |
| aom_write_literal(w, delta, bits_v); |
| aom_write_bit(w, sign_bit); |
| } else { |
| aom_write_literal(w, max_val - delta, bits_v); |
| aom_write_bit(w, !sign_bit); |
| } |
| } |
| } else { // Transmit raw values. |
| aom_write_bit(w, 0); |
| for (int i = 0; i < n; ++i) { |
| assert(colors_v[i] < (1 << bit_depth)); |
| aom_write_literal(w, colors_v[i], bit_depth); |
| } |
| } |
| } |
| |
| static AOM_INLINE void write_palette_mode_info(const AV1_COMMON *cm, |
| const MACROBLOCKD *xd, |
| const MB_MODE_INFO *const mbmi, |
| aom_writer *w) { |
| const int num_planes = av1_num_planes(cm); |
| const BLOCK_SIZE bsize = mbmi->sb_type[xd->tree_type == CHROMA_PART]; |
| assert(av1_allow_palette(cm->features.allow_screen_content_tools, bsize)); |
| const PALETTE_MODE_INFO *const pmi = &mbmi->palette_mode_info; |
| const int bsize_ctx = av1_get_palette_bsize_ctx(bsize); |
| if (mbmi->mode == DC_PRED && xd->tree_type != CHROMA_PART) { |
| const int n = pmi->palette_size[0]; |
| const int palette_y_mode_ctx = av1_get_palette_mode_ctx(xd); |
| aom_write_symbol( |
| w, n > 0, |
| xd->tile_ctx->palette_y_mode_cdf[bsize_ctx][palette_y_mode_ctx], 2); |
| if (n > 0) { |
| aom_write_symbol(w, n - PALETTE_MIN_SIZE, |
| xd->tile_ctx->palette_y_size_cdf[bsize_ctx], |
| PALETTE_SIZES); |
| write_palette_colors_y(xd, pmi, cm->seq_params.bit_depth, w); |
| } |
| } |
| |
| const int uv_dc_pred = num_planes > 1 && xd->tree_type != LUMA_PART && |
| mbmi->uv_mode == UV_DC_PRED && xd->is_chroma_ref; |
| if (uv_dc_pred) { |
| const int n = pmi->palette_size[1]; |
| const int palette_uv_mode_ctx = (pmi->palette_size[0] > 0); |
| aom_write_symbol(w, n > 0, |
| xd->tile_ctx->palette_uv_mode_cdf[palette_uv_mode_ctx], 2); |
| if (n > 0) { |
| aom_write_symbol(w, n - PALETTE_MIN_SIZE, |
| xd->tile_ctx->palette_uv_size_cdf[bsize_ctx], |
| PALETTE_SIZES); |
| write_palette_colors_uv(xd, pmi, cm->seq_params.bit_depth, w); |
| } |
| } |
| } |
| |
| void av1_write_tx_type(const AV1_COMMON *const cm, const MACROBLOCKD *xd, |
| TX_TYPE tx_type, TX_SIZE tx_size, aom_writer *w, |
| const int plane, const int eob, const int dc_skip) { |
| if (plane != PLANE_TYPE_Y || dc_skip) return; |
| MB_MODE_INFO *mbmi = xd->mi[0]; |
| PREDICTION_MODE intra_dir; |
| if (mbmi->filter_intra_mode_info.use_filter_intra) |
| intra_dir = |
| fimode_to_intradir[mbmi->filter_intra_mode_info.filter_intra_mode]; |
| else |
| intra_dir = get_intra_mode(mbmi, AOM_PLANE_Y); |
| const FeatureFlags *const features = &cm->features; |
| const int is_inter = is_inter_block(mbmi, xd->tree_type); |
| if (get_ext_tx_types(tx_size, is_inter, features->reduced_tx_set_used) > 1 && |
| ((!cm->seg.enabled && cm->quant_params.base_qindex > 0) || |
| (cm->seg.enabled && xd->qindex[mbmi->segment_id] > 0)) && |
| !mbmi->skip_txfm[xd->tree_type == CHROMA_PART] && |
| !segfeature_active(&cm->seg, mbmi->segment_id, SEG_LVL_SKIP)) { |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| const TX_SIZE square_tx_size = txsize_sqr_map[tx_size]; |
| const TxSetType tx_set_type = av1_get_ext_tx_set_type( |
| tx_size, is_inter, features->reduced_tx_set_used); |
| const int eset = |
| get_ext_tx_set(tx_size, is_inter, features->reduced_tx_set_used); |
| // eset == 0 should correspond to a set with only DCT_DCT and there |
| // is no need to send the tx_type |
| assert(eset > 0); |
| const int size_info = av1_size_class[tx_size]; |
| if (!is_inter) { |
| const int mode_info = av1_md_class[intra_dir]; |
| (void)mode_info; |
| assert(tx_set_type == EXT_NEW_TX_SET |
| ? av1_mdtx_used_flag[av1_size_class[tx_size]][mode_info] |
| [get_primary_tx_type(tx_type)] |
| : av1_ext_tx_used[tx_set_type][get_primary_tx_type(tx_type)]); |
| } |
| if (is_inter) { |
| const int eob_tx_ctx = get_lp2tx_ctx(tx_size, get_txb_bwl(tx_size), eob); |
| #if CONFIG_INTER_IST |
| aom_write_symbol( |
| w, av1_ext_tx_ind[tx_set_type][get_primary_tx_type(tx_type)], |
| ec_ctx->inter_ext_tx_cdf[eset][eob_tx_ctx][square_tx_size], |
| av1_num_ext_tx_set[tx_set_type]); |
| #else |
| aom_write_symbol( |
| w, av1_ext_tx_ind[tx_set_type][tx_type], |
| ec_ctx->inter_ext_tx_cdf[eset][eob_tx_ctx][square_tx_size], |
| av1_num_ext_tx_set[tx_set_type]); |
| #endif // CONFIG_INTER_IST |
| } else { |
| if (mbmi->fsc_mode[xd->tree_type == CHROMA_PART]) { |
| return; |
| } |
| aom_write_symbol( |
| w, |
| av1_tx_type_to_idx(get_primary_tx_type(tx_type), tx_set_type, |
| intra_dir, size_info), |
| #if CONFIG_INTRA_TX_IST_PARSE |
| ec_ctx->intra_ext_tx_cdf[eset + features->reduced_tx_set_used] |
| [square_tx_size], |
| #else |
| ec_ctx->intra_ext_tx_cdf[eset + features->reduced_tx_set_used] |
| [square_tx_size][intra_dir], |
| #endif // CONFIG_INTRA_TX_IST_PARSE |
| features->reduced_tx_set_used |
| ? av1_num_reduced_tx_set |
| : av1_num_ext_tx_set_intra[tx_set_type]); |
| } |
| } |
| } |
| |
| void av1_write_cctx_type(const AV1_COMMON *const cm, const MACROBLOCKD *xd, |
| CctxType cctx_type, TX_SIZE tx_size, aom_writer *w) { |
| MB_MODE_INFO *mbmi = xd->mi[0]; |
| assert(xd->is_chroma_ref); |
| if (((!cm->seg.enabled && cm->quant_params.base_qindex > 0) || |
| (cm->seg.enabled && xd->qindex[mbmi->segment_id] > 0)) && |
| !mbmi->skip_txfm[xd->tree_type == CHROMA_PART] && |
| !segfeature_active(&cm->seg, mbmi->segment_id, SEG_LVL_SKIP)) { |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| const TX_SIZE square_tx_size = txsize_sqr_map[tx_size]; |
| int above_cctx, left_cctx; |
| #if CONFIG_EXT_RECUR_PARTITIONS |
| get_above_and_left_cctx_type(cm, xd, &above_cctx, &left_cctx); |
| #else |
| get_above_and_left_cctx_type(cm, xd, tx_size, &above_cctx, &left_cctx); |
| #endif // CONFIG_EXT_RECUR_PARTITIONS |
| const int cctx_ctx = get_cctx_context(xd, &above_cctx, &left_cctx); |
| aom_write_symbol(w, cctx_type, |
| ec_ctx->cctx_type_cdf[square_tx_size][cctx_ctx], |
| CCTX_TYPES); |
| } |
| } |
| |
| // This function writes a 'secondary tx set' onto the bitstream |
| static void write_sec_tx_set(FRAME_CONTEXT *ec_ctx, aom_writer *w, |
| MB_MODE_INFO *mbmi, TX_TYPE tx_type) { |
| TX_TYPE stx_set_flag = get_secondary_tx_set(tx_type); |
| assert(stx_set_flag <= IST_SET_SIZE - 1); |
| if (get_primary_tx_type(tx_type) == ADST_ADST) stx_set_flag -= IST_DIR_SIZE; |
| assert(stx_set_flag < IST_DIR_SIZE); |
| uint8_t intra_mode = get_intra_mode(mbmi, PLANE_TYPE_Y); |
| #if CONFIG_INTRA_TX_IST_PARSE |
| aom_write_symbol(w, most_probable_stx_mapping[intra_mode][stx_set_flag], |
| ec_ctx->most_probable_stx_set_cdf, IST_DIR_SIZE); |
| #else |
| uint8_t stx_set_ctx = stx_transpose_mapping[intra_mode]; |
| assert(stx_set_ctx < IST_DIR_SIZE); |
| aom_write_symbol(w, stx_set_flag, ec_ctx->stx_set_cdf[stx_set_ctx], |
| IST_DIR_SIZE); |
| #endif // CONFIG_INTRA_TX_IST_PARSE |
| } |
| |
| void av1_write_sec_tx_type(const AV1_COMMON *const cm, const MACROBLOCKD *xd, |
| TX_TYPE tx_type, TX_SIZE tx_size, uint16_t eob, |
| aom_writer *w) { |
| MB_MODE_INFO *mbmi = xd->mi[0]; |
| const FeatureFlags *const features = &cm->features; |
| const int is_inter = is_inter_block(mbmi, xd->tree_type); |
| if (get_ext_tx_types(tx_size, is_inter, features->reduced_tx_set_used) > 1 && |
| ((!cm->seg.enabled && cm->quant_params.base_qindex > 0) || |
| (cm->seg.enabled && xd->qindex[mbmi->segment_id] > 0)) && |
| !mbmi->skip_txfm[xd->tree_type == CHROMA_PART] && |
| !segfeature_active(&cm->seg, mbmi->segment_id, SEG_LVL_SKIP)) { |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| const TX_SIZE square_tx_size = txsize_sqr_map[tx_size]; |
| #if !CONFIG_INTER_IST |
| if (!is_inter) { |
| #endif // CONFIG_INTER_IST |
| const TX_TYPE stx_flag = get_secondary_tx_type(tx_type); |
| assert(stx_flag <= STX_TYPES - 1); |
| if (block_signals_sec_tx_type(xd, tx_size, tx_type, eob)) { |
| #if CONFIG_INTER_IST |
| aom_write_symbol(w, stx_flag, ec_ctx->stx_cdf[is_inter][square_tx_size], |
| STX_TYPES); |
| #else |
| aom_write_symbol(w, stx_flag, ec_ctx->stx_cdf[square_tx_size], STX_TYPES); |
| #endif // CONFIG_INTER_IST |
| #if CONFIG_IST_SET_FLAG |
| #if CONFIG_INTER_IST |
| if (stx_flag > 0 && !is_inter) |
| write_sec_tx_set(ec_ctx, w, mbmi, tx_type); |
| #else |
| if (stx_flag > 0) write_sec_tx_set(ec_ctx, w, mbmi, tx_type); |
| #endif // CONFIG_INTER_IST |
| #endif // CONFIG_IST_SET_FLAG |
| } |
| #if !CONFIG_INTER_IST |
| } |
| #endif // CONFIG_INTER_IST |
| #if CONFIG_INTER_IST |
| } else if (!xd->lossless[mbmi->segment_id]) { |
| #else |
| } else if (!is_inter && !xd->lossless[mbmi->segment_id]) { |
| #endif // CONFIG_INTER_IST |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| const TX_SIZE square_tx_size = txsize_sqr_map[tx_size]; |
| TX_TYPE stx_flag = get_secondary_tx_type(tx_type); |
| assert(stx_flag <= STX_TYPES - 1); |
| if (block_signals_sec_tx_type(xd, tx_size, tx_type, eob)) { |
| #if CONFIG_INTER_IST |
| aom_write_symbol(w, stx_flag, ec_ctx->stx_cdf[is_inter][square_tx_size], |
| STX_TYPES); |
| #else |
| aom_write_symbol(w, stx_flag, ec_ctx->stx_cdf[square_tx_size], STX_TYPES); |
| #endif // CONFIG_INTER_IST |
| #if CONFIG_IST_SET_FLAG |
| #if CONFIG_INTER_IST |
| if (stx_flag > 0 && !is_inter) write_sec_tx_set(ec_ctx, w, mbmi, tx_type); |
| #else |
| if (stx_flag > 0) write_sec_tx_set(ec_ctx, w, mbmi, tx_type); |
| #endif // CONFIG_INTER_IST |
| #endif // CONFIG_IST_SET_FLAG |
| } |
| } |
| } |
| |
| #if !CONFIG_AIMC |
| static AOM_INLINE void write_intra_y_mode_nonkf(FRAME_CONTEXT *frame_ctx, |
| BLOCK_SIZE bsize, |
| PREDICTION_MODE mode, |
| aom_writer *w) { |
| aom_write_symbol(w, mode, frame_ctx->y_mode_cdf[size_group_lookup[bsize]], |
| INTRA_MODES); |
| } |
| #endif // !CONFIG_AIMC |
| static AOM_INLINE void write_mrl_index(FRAME_CONTEXT *ec_ctx, |
| #if CONFIG_IMPROVED_INTRA_DIR_PRED |
| const MB_MODE_INFO *neighbor0, |
| const MB_MODE_INFO *neighbor1, |
| #endif // CONFIG_IMPROVED_INTRA_DIR_PRED |
| uint8_t mrl_index, aom_writer *w) { |
| #if CONFIG_IMPROVED_INTRA_DIR_PRED |
| int ctx = get_mrl_index_ctx(neighbor0, neighbor1); |
| aom_cdf_prob *mrl_cdf = ec_ctx->mrl_index_cdf[ctx]; |
| aom_write_symbol(w, mrl_index, mrl_cdf, MRL_LINE_NUMBER); |
| #else |
| aom_write_symbol(w, mrl_index, ec_ctx->mrl_index_cdf, MRL_LINE_NUMBER); |
| #endif // CONFIG_IMPROVED_INTRA_DIR_PRED |
| } |
| |
| #if CONFIG_LOSSLESS_DPCM |
| static AOM_INLINE void write_dpcm_index(FRAME_CONTEXT *ec_ctx, |
| uint8_t dpcm_mode, aom_writer *w) { |
| aom_write_symbol(w, dpcm_mode, ec_ctx->dpcm_cdf, 2); |
| } |
| |
| static AOM_INLINE void write_dpcm_vert_horz_mode(FRAME_CONTEXT *ec_ctx, |
| uint8_t dpcm_vert_horz_mode, |
| aom_writer *w) { |
| aom_write_symbol(w, dpcm_vert_horz_mode, ec_ctx->dpcm_vert_horz_cdf, 2); |
| } |
| |
| static AOM_INLINE void write_dpcm_uv_index(FRAME_CONTEXT *ec_ctx, |
| uint8_t dpcm_uv_mode, |
| aom_writer *w) { |
| aom_write_symbol(w, dpcm_uv_mode, ec_ctx->dpcm_uv_cdf, 2); |
| } |
| |
| static AOM_INLINE void write_dpcm_uv_vert_horz_mode( |
| FRAME_CONTEXT *ec_ctx, uint8_t dpcm_uv_vert_horz_mode, aom_writer *w) { |
| aom_write_symbol(w, dpcm_uv_vert_horz_mode, ec_ctx->dpcm_uv_vert_horz_cdf, 2); |
| } |
| #endif // CONFIG_LOSSLESS_DPCM |
| |
| static AOM_INLINE void write_fsc_mode(uint8_t fsc_mode, aom_writer *w, |
| aom_cdf_prob *fsc_cdf) { |
| aom_write_symbol(w, fsc_mode, fsc_cdf, FSC_MODES); |
| } |
| |
| #if CONFIG_IMPROVED_CFL |
| static AOM_INLINE void write_cfl_index(FRAME_CONTEXT *ec_ctx, uint8_t cfl_index, |
| aom_writer *w) { |
| #if CONFIG_ENABLE_MHCCP |
| aom_write_symbol(w, cfl_index, ec_ctx->cfl_index_cdf, CFL_TYPE_COUNT - 1); |
| #else |
| aom_write_symbol(w, cfl_index, ec_ctx->cfl_index_cdf, CFL_TYPE_COUNT); |
| #endif // CONFIG_ENABLE_MHCCP |
| } |
| #endif |
| |
| #if CONFIG_ENABLE_MHCCP |
| // write MHCCP filter direction |
| static AOM_INLINE void write_mh_dir(aom_cdf_prob *mh_dir_cdf, uint8_t mh_dir, |
| aom_writer *w) { |
| aom_write_symbol(w, mh_dir, mh_dir_cdf, MHCCP_MODE_NUM); |
| } |
| #endif // CONFIG_ENABLE_MHCCP |
| |
| #if !CONFIG_AIMC |
| static AOM_INLINE void write_intra_uv_mode(FRAME_CONTEXT *frame_ctx, |
| UV_PREDICTION_MODE uv_mode, |
| PREDICTION_MODE y_mode, |
| CFL_ALLOWED_TYPE cfl_allowed, |
| aom_writer *w) { |
| aom_write_symbol(w, uv_mode, frame_ctx->uv_mode_cdf[cfl_allowed][y_mode], |
| UV_INTRA_MODES - !cfl_allowed); |
| } |
| #endif // !CONFIG_AIMC |
| static AOM_INLINE void write_cfl_alphas(FRAME_CONTEXT *const ec_ctx, |
| uint8_t idx, int8_t joint_sign, |
| aom_writer *w) { |
| aom_write_symbol(w, joint_sign, ec_ctx->cfl_sign_cdf, CFL_JOINT_SIGNS); |
| // Magnitudes are only signaled for nonzero codes. |
| if (CFL_SIGN_U(joint_sign) != CFL_SIGN_ZERO) { |
| aom_cdf_prob *cdf_u = ec_ctx->cfl_alpha_cdf[CFL_CONTEXT_U(joint_sign)]; |
| aom_write_symbol(w, CFL_IDX_U(idx), cdf_u, CFL_ALPHABET_SIZE); |
| } |
| if (CFL_SIGN_V(joint_sign) != CFL_SIGN_ZERO) { |
| aom_cdf_prob *cdf_v = ec_ctx->cfl_alpha_cdf[CFL_CONTEXT_V(joint_sign)]; |
| aom_write_symbol(w, CFL_IDX_V(idx), cdf_v, CFL_ALPHABET_SIZE); |
| } |
| } |
| |
| static AOM_INLINE void write_cdef(AV1_COMMON *cm, MACROBLOCKD *const xd, |
| aom_writer *w, int skip) { |
| if (cm->features.coded_lossless || is_global_intrabc_allowed(cm)) return; |
| #if CONFIG_FIX_CDEF_SYNTAX |
| if (!cm->cdef_info.cdef_frame_enable) return; |
| #endif // CONFIG_FIX_CDEF_SYNTAX |
| // At the start of a superblock, mark that we haven't yet written CDEF |
| // strengths for any of the CDEF units contained in this superblock. |
| const int sb_mask = (cm->mib_size - 1); |
| const int mi_row_in_sb = (xd->mi_row & sb_mask); |
| const int mi_col_in_sb = (xd->mi_col & sb_mask); |
| if (mi_row_in_sb == 0 && mi_col_in_sb == 0) { |
| av1_zero(xd->cdef_transmitted); |
| } |
| |
| // CDEF unit size is 64x64 irrespective of the superblock size. |
| const int cdef_size = 1 << (6 - MI_SIZE_LOG2); |
| |
| // Find index of this CDEF unit in this superblock. |
| const int index = av1_get_cdef_transmitted_index(xd->mi_row, xd->mi_col); |
| |
| // Write CDEF strength to the first non-skip coding block in this CDEF unit. |
| if (!xd->cdef_transmitted[index] && !skip) { |
| // CDEF strength for this CDEF unit needs to be stored in the MB_MODE_INFO |
| // of the 1st block in this CDEF unit. |
| const int first_block_mask = ~(cdef_size - 1); |
| const CommonModeInfoParams *const mi_params = &cm->mi_params; |
| const int grid_idx = |
| get_mi_grid_idx(mi_params, xd->mi_row & first_block_mask, |
| xd->mi_col & first_block_mask); |
| const MB_MODE_INFO *const mbmi = mi_params->mi_grid_base[grid_idx]; |
| aom_write_literal(w, mbmi->cdef_strength, cm->cdef_info.cdef_bits); |
| xd->cdef_transmitted[index] = true; |
| } |
| } |
| |
| #if CONFIG_CCSO |
| static AOM_INLINE void write_ccso(AV1_COMMON *cm, MACROBLOCKD *const xd, |
| aom_writer *w) { |
| if (cm->features.coded_lossless) return; |
| if (is_global_intrabc_allowed(cm)) return; |
| const CommonModeInfoParams *const mi_params = &cm->mi_params; |
| const int mi_row = xd->mi_row; |
| const int mi_col = xd->mi_col; |
| const int blk_size_y = |
| (1 << (CCSO_BLK_SIZE + xd->plane[1].subsampling_y - MI_SIZE_LOG2)) - 1; |
| const int blk_size_x = |
| (1 << (CCSO_BLK_SIZE + xd->plane[1].subsampling_x - MI_SIZE_LOG2)) - 1; |
| const MB_MODE_INFO *mbmi = |
| mi_params->mi_grid_base[(mi_row & ~blk_size_y) * mi_params->mi_stride + |
| (mi_col & ~blk_size_x)]; |
| |
| #if CONFIG_CCSO_EXT |
| if (!(mi_row & blk_size_y) && !(mi_col & blk_size_x) && |
| cm->ccso_info.ccso_enable[0]) { |
| aom_write_symbol(w, mbmi->ccso_blk_y == 0 ? 0 : 1, |
| xd->tile_ctx->ccso_cdf[0], 2); |
| xd->ccso_blk_y = mbmi->ccso_blk_y; |
| } |
| #endif |
| |
| if (!(mi_row & blk_size_y) && !(mi_col & blk_size_x) && |
| #if CONFIG_CCSO_EXT |
| cm->ccso_info.ccso_enable[1]) { |
| aom_write_symbol(w, mbmi->ccso_blk_u == 0 ? 0 : 1, |
| xd->tile_ctx->ccso_cdf[1], 2); |
| #else |
| cm->ccso_info.ccso_enable[0]) { |
| aom_write_bit(w, mbmi->ccso_blk_u == 0 ? 0 : 1); |
| #endif |
| xd->ccso_blk_u = mbmi->ccso_blk_u; |
| } |
| |
| if (!(mi_row & blk_size_y) && !(mi_col & blk_size_x) && |
| #if CONFIG_CCSO_EXT |
| cm->ccso_info.ccso_enable[2]) { |
| aom_write_symbol(w, mbmi->ccso_blk_v == 0 ? 0 : 1, |
| xd->tile_ctx->ccso_cdf[2], 2); |
| #else |
| cm->ccso_info.ccso_enable[1]) { |
| aom_write_bit(w, mbmi->ccso_blk_v == 0 ? 0 : 1); |
| #endif |
| xd->ccso_blk_v = mbmi->ccso_blk_v; |
| } |
| } |
| #endif |
| |
| static AOM_INLINE void write_inter_segment_id( |
| AV1_COMP *cpi, aom_writer *w, const struct segmentation *const seg, |
| struct segmentation_probs *const segp, int skip, int preskip) { |
| MACROBLOCKD *const xd = &cpi->td.mb.e_mbd; |
| MB_MODE_INFO *const mbmi = xd->mi[0]; |
| AV1_COMMON *const cm = &cpi->common; |
| const int mi_row = xd->mi_row; |
| const int mi_col = xd->mi_col; |
| |
| if (seg->update_map) { |
| if (preskip) { |
| if (!seg->segid_preskip) return; |
| } else { |
| if (seg->segid_preskip) return; |
| if (skip) { |
| write_segment_id(cpi, mbmi, w, seg, segp, 1); |
| if (seg->temporal_update) mbmi->seg_id_predicted = 0; |
| return; |
| } |
| } |
| if (seg->temporal_update) { |
| const int pred_flag = mbmi->seg_id_predicted; |
| aom_cdf_prob *pred_cdf = av1_get_pred_cdf_seg_id(segp, xd); |
| aom_write_symbol(w, pred_flag, pred_cdf, 2); |
| if (!pred_flag) { |
| write_segment_id(cpi, mbmi, w, seg, segp, 0); |
| } |
| if (pred_flag) { |
| set_spatial_segment_id(&cm->mi_params, cm->cur_frame->seg_map, |
| mbmi->sb_type[PLANE_TYPE_Y], mi_row, mi_col, |
| mbmi->segment_id); |
| } |
| } else { |
| write_segment_id(cpi, mbmi, w, seg, segp, 0); |
| } |
| } |
| } |
| |
| // If delta q is present, writes delta_q index. |
| // Also writes delta_q loop filter levels, if present. |
| static AOM_INLINE void write_delta_q_params(AV1_COMP *cpi, int skip, |
| aom_writer *w) { |
| AV1_COMMON *const cm = &cpi->common; |
| const DeltaQInfo *const delta_q_info = &cm->delta_q_info; |
| |
| if (delta_q_info->delta_q_present_flag) { |
| MACROBLOCK *const x = &cpi->td.mb; |
| MACROBLOCKD *const xd = &x->e_mbd; |
| const MB_MODE_INFO *const mbmi = xd->mi[0]; |
| const BLOCK_SIZE bsize = mbmi->sb_type[xd->tree_type == CHROMA_PART]; |
| const int super_block_upper_left = |
| ((xd->mi_row & (cm->mib_size - 1)) == 0) && |
| ((xd->mi_col & (cm->mib_size - 1)) == 0); |
| |
| if ((bsize != cm->sb_size || skip == 0) && super_block_upper_left) { |
| assert(mbmi->current_qindex > 0); |
| const int reduced_delta_qindex = |
| (mbmi->current_qindex - xd->current_base_qindex) / |
| delta_q_info->delta_q_res; |
| write_delta_qindex(xd, reduced_delta_qindex, w); |
| xd->current_base_qindex = mbmi->current_qindex; |
| if (delta_q_info->delta_lf_present_flag) { |
| if (delta_q_info->delta_lf_multi) { |
| const int frame_lf_count = |
| av1_num_planes(cm) > 1 ? FRAME_LF_COUNT : FRAME_LF_COUNT - 2; |
| for (int lf_id = 0; lf_id < frame_lf_count; ++lf_id) { |
| int reduced_delta_lflevel = |
| (mbmi->delta_lf[lf_id] - xd->delta_lf[lf_id]) / |
| delta_q_info->delta_lf_res; |
| write_delta_lflevel(cm, xd, lf_id, reduced_delta_lflevel, w); |
| xd->delta_lf[lf_id] = mbmi->delta_lf[lf_id]; |
| } |
| } else { |
| int reduced_delta_lflevel = |
| (mbmi->delta_lf_from_base - xd->delta_lf_from_base) / |
| delta_q_info->delta_lf_res; |
| write_delta_lflevel(cm, xd, -1, reduced_delta_lflevel, w); |
| xd->delta_lf_from_base = mbmi->delta_lf_from_base; |
| } |
| } |
| } |
| } |
| } |
| |
| #if CONFIG_AIMC |
| // write mode set index and mode index in set for y component |
| static AOM_INLINE void write_intra_luma_mode(MACROBLOCKD *const xd, |
| aom_writer *w) { |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| MB_MODE_INFO *const mbmi = xd->mi[0]; |
| const int mode_idx = mbmi->y_mode_idx; |
| assert(mode_idx >= 0 && mode_idx < LUMA_MODE_COUNT); |
| assert(mbmi->joint_y_mode_delta_angle >= 0 && |
| mbmi->joint_y_mode_delta_angle < LUMA_MODE_COUNT); |
| if (mbmi->joint_y_mode_delta_angle < NON_DIRECTIONAL_MODES_COUNT) |
| assert(mbmi->joint_y_mode_delta_angle == mbmi->y_mode_idx); |
| const int context = get_y_mode_idx_ctx(xd); |
| int mode_set_index = mode_idx < FIRST_MODE_COUNT ? 0 : 1; |
| mode_set_index += ((mode_idx - FIRST_MODE_COUNT) / SECOND_MODE_COUNT); |
| aom_write_symbol(w, mode_set_index, ec_ctx->y_mode_set_cdf, INTRA_MODE_SETS); |
| if (mode_set_index == 0) { |
| aom_write_symbol(w, mode_idx, ec_ctx->y_mode_idx_cdf_0[context], |
| FIRST_MODE_COUNT); |
| } else { |
| aom_write_symbol( |
| w, |
| mode_idx - FIRST_MODE_COUNT - (mode_set_index - 1) * SECOND_MODE_COUNT, |
| ec_ctx->y_mode_idx_cdf_1[context], SECOND_MODE_COUNT); |
| } |
| if (mbmi->joint_y_mode_delta_angle < NON_DIRECTIONAL_MODES_COUNT) |
| assert(mbmi->joint_y_mode_delta_angle == mbmi->y_mode_idx); |
| } |
| |
| #if CONFIG_UV_CFL |
| static AOM_INLINE void write_intra_uv_mode(MACROBLOCKD *const xd, |
| CFL_ALLOWED_TYPE cfl_allowed, |
| aom_writer *w) { |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| MB_MODE_INFO *const mbmi = xd->mi[0]; |
| if (cfl_allowed) { |
| const int cfl_ctx = get_cfl_ctx(xd); |
| aom_write_symbol(w, mbmi->uv_mode == UV_CFL_PRED, ec_ctx->cfl_cdf[cfl_ctx], |
| 2); |
| if (mbmi->uv_mode == UV_CFL_PRED) return; |
| } |
| |
| const int uv_mode_idx = mbmi->uv_mode_idx; |
| assert(uv_mode_idx >= 0 && uv_mode_idx < UV_INTRA_MODES); |
| const int context = av1_is_directional_mode(mbmi->mode) ? 1 : 0; |
| aom_write_symbol(w, uv_mode_idx, ec_ctx->uv_mode_cdf[context], |
| UV_INTRA_MODES - 1); |
| } |
| #else |
| // write mode mode index for uv component |
| static AOM_INLINE void write_intra_uv_mode(MACROBLOCKD *const xd, |
| CFL_ALLOWED_TYPE cfl_allowed, |
| aom_writer *w) { |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| MB_MODE_INFO *const mbmi = xd->mi[0]; |
| const int uv_mode_idx = mbmi->uv_mode_idx; |
| assert(uv_mode_idx >= 0 && uv_mode_idx < UV_INTRA_MODES); |
| const int context = av1_is_directional_mode(mbmi->mode) ? 1 : 0; |
| aom_write_symbol(w, uv_mode_idx, ec_ctx->uv_mode_cdf[cfl_allowed][context], |
| UV_INTRA_MODES - !cfl_allowed); |
| } |
| #endif // CONFIG_UV_CFL |
| #endif // CONFIG_AIMC |
| |
| static AOM_INLINE void write_intra_prediction_modes(AV1_COMP *cpi, |
| int is_keyframe, |
| aom_writer *w) { |
| const AV1_COMMON *const cm = &cpi->common; |
| MACROBLOCK *const x = &cpi->td.mb; |
| MACROBLOCKD *const xd = &x->e_mbd; |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| const MB_MODE_INFO *const mbmi = xd->mi[0]; |
| const PREDICTION_MODE mode = mbmi->mode; |
| const BLOCK_SIZE bsize = mbmi->sb_type[xd->tree_type == CHROMA_PART]; |
| #if !CONFIG_AIMC |
| const int use_angle_delta = av1_use_angle_delta(bsize); |
| #endif // !CONFIG_AIMC |
| |
| // Y mode. |
| if (xd->tree_type != CHROMA_PART) { |
| #if CONFIG_LOSSLESS_DPCM |
| if (xd->lossless[mbmi->segment_id]) { |
| write_dpcm_index(ec_ctx, mbmi->use_dpcm_y, w); |
| } |
| #endif // CONFIG_LOSSLESS_DPCM |
| #if CONFIG_AIMC |
| #if CONFIG_LOSSLESS_DPCM |
| if (xd->lossless[mbmi->segment_id]) { |
| if (mbmi->use_dpcm_y == 0) { |
| write_intra_luma_mode(xd, w); |
| } else { |
| write_dpcm_vert_horz_mode(ec_ctx, mbmi->dpcm_mode_y, w); |
| } |
| } else { |
| write_intra_luma_mode(xd, w); |
| } |
| #else // CONFIG_LOSSLESS_DPCM |
| write_intra_luma_mode(xd, w); |
| #endif // CONFIG_LOSSLESS_DPCM |
| if (allow_fsc_intra(cm, |
| #if !CONFIG_LOSSLESS_DPCM |
| xd, |
| #endif // CONFIG_LOSSLESS_DPCM |
| bsize, mbmi) && |
| xd->tree_type != CHROMA_PART) { |
| aom_cdf_prob *fsc_cdf = get_fsc_mode_cdf(xd, bsize, is_keyframe); |
| write_fsc_mode(mbmi->fsc_mode[xd->tree_type == CHROMA_PART], w, fsc_cdf); |
| } |
| #else |
| if (is_keyframe) { |
| write_intra_y_mode_kf(ec_ctx, mbmi, xd->neighbors[0], xd->neighbors[1], |
| mode, w); |
| } else { |
| write_intra_y_mode_nonkf(ec_ctx, bsize, mode, w); |
| } |
| |
| if (allow_fsc_intra(cm, |
| #if !CONFIG_LOSSLESS_DPCM |
| xd, |
| #endif // CONFIG_LOSSLESS_DPCM |
| bsize, mbmi) && |
| xd->tree_type != CHROMA_PART) { |
| aom_cdf_prob *fsc_cdf = get_fsc_mode_cdf(xd, bsize, is_keyframe); |
| write_fsc_mode(mbmi->fsc_mode[xd->tree_type == CHROMA_PART], w, fsc_cdf); |
| } |
| // Y angle delta. |
| if (use_angle_delta && av1_is_directional_mode(mode)) { |
| write_angle_delta(w, mbmi->angle_delta[PLANE_TYPE_Y], |
| ec_ctx->angle_delta_cdf[PLANE_TYPE_Y][mode - V_PRED]); |
| } |
| #endif // CONFIG_AIMC |
| // Encoding reference line index |
| #if CONFIG_LOSSLESS_DPCM |
| if (cm->seq_params.enable_mrls && av1_is_directional_mode(mode)) { |
| if (xd->lossless[mbmi->segment_id]) { |
| if (mbmi->use_dpcm_y == 0) { |
| write_mrl_index(ec_ctx, |
| #if CONFIG_IMPROVED_INTRA_DIR_PRED |
| xd->neighbors[0], xd->neighbors[1], |
| #endif // CONFIG_IMPROVED_INTRA_DIR_PRED |
| mbmi->mrl_index, w); |
| } |
| } else { |
| write_mrl_index(ec_ctx, |
| #if CONFIG_IMPROVED_INTRA_DIR_PRED |
| xd->neighbors[0], xd->neighbors[1], |
| #endif // CONFIG_IMPROVED_INTRA_DIR_PRED |
| mbmi->mrl_index, w); |
| } |
| } |
| #else // CONFIG_LOSSLESS_DPCM |
| if (cm->seq_params.enable_mrls && av1_is_directional_mode(mode)) { |
| write_mrl_index(ec_ctx, |
| #if CONFIG_IMPROVED_INTRA_DIR_PRED |
| xd->neighbors[0], xd->neighbors[1], |
| #endif // CONFIG_IMPROVED_INTRA_DIR_PRED |
| mbmi->mrl_index, w); |
| } |
| #endif // CONFIG_LOSSLESS_DPCM |
| } |
| |
| // UV mode and UV angle delta. |
| if (!cm->seq_params.monochrome && xd->is_chroma_ref && |
| xd->tree_type != LUMA_PART) { |
| const UV_PREDICTION_MODE uv_mode = mbmi->uv_mode; |
| #if CONFIG_AIMC |
| #if CONFIG_LOSSLESS_DPCM |
| if (xd->lossless[mbmi->segment_id]) { |
| write_dpcm_uv_index(ec_ctx, mbmi->use_dpcm_uv, w); |
| if (mbmi->use_dpcm_uv == 0) { |
| write_intra_uv_mode(xd, is_cfl_allowed(xd), w); |
| } else { |
| write_dpcm_uv_vert_horz_mode(ec_ctx, mbmi->dpcm_mode_uv, w); |
| } |
| } else { |
| write_intra_uv_mode(xd, is_cfl_allowed(xd), w); |
| } |
| #else // CONFIG_LOSSLESS_DPCM |
| write_intra_uv_mode(xd, is_cfl_allowed(xd), w); |
| #endif // CONFIG_LOSSLESS_DPCM |
| #else |
| write_intra_uv_mode(ec_ctx, uv_mode, mode, is_cfl_allowed(xd), w); |
| if (use_angle_delta && av1_is_directional_mode(get_uv_mode(uv_mode))) { |
| if (cm->seq_params.enable_sdp) { |
| write_angle_delta( |
| w, mbmi->angle_delta[PLANE_TYPE_UV], |
| ec_ctx->angle_delta_cdf[PLANE_TYPE_UV][uv_mode - V_PRED]); |
| } else { |
| write_angle_delta( |
| w, mbmi->angle_delta[PLANE_TYPE_UV], |
| ec_ctx->angle_delta_cdf[PLANE_TYPE_Y][uv_mode - V_PRED]); |
| } |
| } |
| #endif // CONFIG_AIMC |
| if (uv_mode == UV_CFL_PRED) { |
| #if CONFIG_IMPROVED_CFL |
| write_cfl_index(ec_ctx, mbmi->cfl_idx, w); |
| #if CONFIG_ENABLE_MHCCP |
| if (mbmi->cfl_idx == CFL_MULTI_PARAM_V) { |
| const uint8_t mh_size_group = fsc_bsize_groups[bsize]; |
| aom_cdf_prob *mh_dir_cdf = ec_ctx->filter_dir_cdf[mh_size_group]; |
| write_mh_dir(mh_dir_cdf, mbmi->mh_dir, w); |
| } |
| #endif // CONFIG_ENABLE_MHCCP |
| if (mbmi->cfl_idx == 0) |
| #endif |
| write_cfl_alphas(ec_ctx, mbmi->cfl_alpha_idx, mbmi->cfl_alpha_signs, w); |
| } |
| } |
| |
| // Palette. |
| if (av1_allow_palette(cm->features.allow_screen_content_tools, bsize)) { |
| write_palette_mode_info(cm, xd, mbmi, w); |
| } |
| |
| // Filter intra. |
| write_filter_intra_mode_info(cm, xd, mbmi, w); |
| } |
| |
| static INLINE int16_t mode_context_analyzer( |
| const int16_t mode_context, const MV_REFERENCE_FRAME *const rf) { |
| if (!is_inter_ref_frame(rf[1])) return mode_context; |
| |
| #if CONFIG_C076_INTER_MOD_CTX |
| return mode_context & NEWMV_CTX_MASK; |
| #else |
| const int16_t newmv_ctx = mode_context & NEWMV_CTX_MASK; |
| const int16_t refmv_ctx = (mode_context >> REFMV_OFFSET) & REFMV_CTX_MASK; |
| |
| const int16_t comp_ctx = compound_mode_ctx_map[refmv_ctx >> 1][AOMMIN( |
| newmv_ctx, COMP_NEWMV_CTXS - 1)]; |
| return comp_ctx; |
| #endif // CONFIG_C076_INTER_MOD_CTX |
| } |
| |
| static INLINE int_mv get_ref_mv_from_stack( |
| int ref_idx, const MV_REFERENCE_FRAME *ref_frame, int ref_mv_idx, |
| const MB_MODE_INFO_EXT_FRAME *mbmi_ext_frame |
| #if CONFIG_SEP_COMP_DRL |
| , |
| const MB_MODE_INFO *mbmi |
| #endif // CONFIG_SEP_COMP_DRL |
| ) { |
| const int8_t ref_frame_type = av1_ref_frame_type(ref_frame); |
| #if CONFIG_SEP_COMP_DRL |
| const CANDIDATE_MV *curr_ref_mv_stack = |
| has_second_drl(mbmi) ? mbmi_ext_frame->ref_mv_stack[ref_idx] |
| : mbmi_ext_frame->ref_mv_stack[0]; |
| #else |
| const CANDIDATE_MV *curr_ref_mv_stack = mbmi_ext_frame->ref_mv_stack; |
| #endif // CONFIG_SEP_COMP_DRL |
| |
| if (is_inter_ref_frame(ref_frame[1])) { |
| assert(ref_idx == 0 || ref_idx == 1); |
| #if CONFIG_SEP_COMP_DRL |
| return ref_idx && !has_second_drl(mbmi) |
| ? curr_ref_mv_stack[ref_mv_idx].comp_mv |
| #else |
| return ref_idx ? curr_ref_mv_stack[ref_mv_idx].comp_mv |
| #endif // CONFIG_SEP_COMP_DRL |
| : curr_ref_mv_stack[ref_mv_idx].this_mv; |
| } |
| |
| assert(ref_idx == 0); |
| #if CONFIG_SEP_COMP_DRL |
| if (ref_mv_idx < mbmi_ext_frame->ref_mv_count[0]) { |
| #else |
| if (ref_mv_idx < mbmi_ext_frame->ref_mv_count) { |
| #endif // CONFIG_SEP_COMP_DRL |
| return curr_ref_mv_stack[ref_mv_idx].this_mv; |
| } else if (is_tip_ref_frame(ref_frame_type)) { |
| int_mv zero_mv; |
| zero_mv.as_int = 0; |
| return zero_mv; |
| } else { |
| return mbmi_ext_frame->global_mvs[ref_frame_type]; |
| } |
| } |
| |
| static INLINE int_mv get_ref_mv(const MACROBLOCK *x, int ref_idx) { |
| const MACROBLOCKD *xd = &x->e_mbd; |
| const MB_MODE_INFO *mbmi = xd->mi[0]; |
| #if CONFIG_SEP_COMP_DRL |
| const int ref_mv_idx = get_ref_mv_idx(mbmi, ref_idx); |
| #else |
| const int ref_mv_idx = mbmi->ref_mv_idx; |
| #endif // CONFIG_SEP_COMP_DRL |
| assert(IMPLIES(have_nearmv_newmv_in_inter_mode(mbmi->mode), |
| has_second_ref(mbmi))); |
| return get_ref_mv_from_stack(ref_idx, mbmi->ref_frame, ref_mv_idx, |
| #if CONFIG_SEP_COMP_DRL |
| x->mbmi_ext_frame, mbmi); |
| #else |
| x->mbmi_ext_frame); |
| #endif // CONFIG_SEP_COMP_DRL |
| } |
| |
| #if CONFIG_REFINEMV |
| // This function write the refinemv_flag ( if require) to the bitstream |
| static void write_refinemv_flag(const AV1_COMMON *const cm, |
| MACROBLOCKD *const xd, aom_writer *w, |
| BLOCK_SIZE bsize) { |
| const MB_MODE_INFO *const mbmi = xd->mi[0]; |
| int signal_refinemv = switchable_refinemv_flag(cm, mbmi); |
| |
| if (signal_refinemv) { |
| const int refinemv_ctx = av1_get_refinemv_context(cm, xd, bsize); |
| assert(mbmi->refinemv_flag < REFINEMV_NUM_MODES); |
| aom_write_symbol(w, mbmi->refinemv_flag, |
| xd->tile_ctx->refinemv_flag_cdf[refinemv_ctx], |
| REFINEMV_NUM_MODES); |
| |
| } else { |
| assert(mbmi->refinemv_flag == get_default_refinemv_flag(cm, mbmi)); |
| } |
| } |
| #endif // CONFIG_REFINEMV |
| |
| static void write_pb_mv_precision(const AV1_COMMON *const cm, |
| MACROBLOCKD *const xd, aom_writer *w) { |
| const MB_MODE_INFO *const mbmi = xd->mi[0]; |
| assert(mbmi->pb_mv_precision <= mbmi->max_mv_precision); |
| assert(mbmi->max_mv_precision == xd->sbi->sb_mv_precision); |
| |
| assert(av1_get_mbmi_max_mv_precision(cm, xd->sbi, mbmi) == |
| mbmi->max_mv_precision); |
| |
| #if !CONFIG_C071_SUBBLK_WARPMV |
| assert(check_mv_precision(cm, mbmi)); |
| #endif // !CONFIG_C071_SUBBLK_WARPMV |
| |
| const int down_ctx = av1_get_pb_mv_precision_down_context(cm, xd); |
| |
| assert(mbmi->most_probable_pb_mv_precision <= mbmi->max_mv_precision); |
| assert(mbmi->most_probable_pb_mv_precision == |
| cm->features.most_probable_fr_mv_precision); |
| |
| // One binary symbol is used to signal if the precision is same as the most |
| // probable precision. |
| // mpp_flag == 1 indicates that the precision is same as the most probable |
| // precision in current implementaion, the most probable precision is same as |
| // the maximum precision value of the block. |
| const int mpp_flag_context = av1_get_mpp_flag_context(cm, xd); |
| const int mpp_flag = |
| (mbmi->pb_mv_precision == mbmi->most_probable_pb_mv_precision); |
| aom_write_symbol(w, mpp_flag, |
| xd->tile_ctx->pb_mv_mpp_flag_cdf[mpp_flag_context], 2); |
| |
| if (!mpp_flag) { |
| const PRECISION_SET *precision_def = |
| &av1_mv_precision_sets[mbmi->mb_precision_set]; |
| |
| // instead of directly signaling the precision value, we signal index ( i.e. |
| // down) of the precision |
| int down = av1_get_pb_mv_precision_index(mbmi); |
| int nsymbs = precision_def->num_precisions - 1; |
| assert(down >= 0 && down <= nsymbs); |
| aom_write_symbol( |
| w, down, |
| xd->tile_ctx->pb_mv_precision_cdf[down_ctx][mbmi->max_mv_precision - |
| MV_PRECISION_HALF_PEL], |
| nsymbs); |
| } |
| } |
| |
| static AOM_INLINE void pack_inter_mode_mvs(AV1_COMP *cpi, aom_writer *w) { |
| AV1_COMMON *const cm = &cpi->common; |
| MACROBLOCK *const x = &cpi->td.mb; |
| MACROBLOCKD *const xd = &x->e_mbd; |
| FRAME_CONTEXT *ec_ctx = xd->tile_ctx; |
| const struct segmentation *const seg = &cm->seg; |
| struct segmentation_probs *const segp = &ec_ctx->seg; |
| #if CONFIG_COMPOUND_WARP_CAUSAL |
| MB_MODE_INFO *mbmi = xd->mi[0]; |
| #else |
| const MB_MODE_INFO *const mbmi = xd->mi[0]; |
| #endif // CONFIG_COMPOUND_WARP_CAUSAL |
| const MB_MODE_INFO_EXT_FRAME *const mbmi_ext_frame = x->mbmi_ext_frame; |
| const PREDICTION_MODE mode = mbmi->mode; |
| const int segment_id = mbmi->segment_id; |
| const BLOCK_SIZE bsize = mbmi->sb_type[PLANE_TYPE_Y]; |
| const MvSubpelPrecision pb_mv_precision = mbmi->pb_mv_precision; |
| |
| #if CONFIG_IBC_SR_EXT |
| const int is_intrabc = is_intrabc_block(mbmi, xd->tree_type); |
| const int is_inter = is_inter_block(mbmi, xd->tree_type) && !is_intrabc; |
| #else |
| const int is_inter = is_inter_block(mbmi, xd->tree_type); |
| #endif // CONFIG_IBC_SR_EXT |
| const int is_compound = has_second_ref(mbmi); |
| int ref; |
| |
| write_inter_segment_id(cpi, w, seg, segp, 0, 1); |
| write_skip_mode(cm, xd, segment_id, mbmi, w); |
| |
| #if CONFIG_SKIP_TXFM_OPT |
| if (!mbmi->skip_mode) { |
| write_is_inter(cm, xd, mbmi->segment_id, w, is_inter); |
| |
| #if CONFIG_IBC_SR_EXT |
| if (!is_inter && av1_allow_intrabc(cm, xd) && |
| xd->tree_type != CHROMA_PART) { |
| const int use_intrabc = is_intrabc_block(mbmi, xd->tree_type); |
| if (xd->tree_type == CHROMA_PART) assert(use_intrabc == 0); |
| #if CONFIG_NEW_CONTEXT_MODELING |
| const int intrabc_ctx = get_intrabc_ctx(xd); |
| aom_write_symbol(w, use_intrabc, ec_ctx->intrabc_cdf[intrabc_ctx], 2); |
| #else |
| aom_write_symbol(w, use_intrabc, ec_ctx->intrabc_cdf, 2); |
| #endif // CONFIG_NEW_CONTEXT_MODELING |
| } |
| #endif // CONFIG_IBC_SR_EXT |
| } |
| |
| int skip = 0; |
| if (is_inter |
| #if CONFIG_IBC_SR_EXT |
| || (!is_inter && is_intrabc_block(mbmi, xd->tree_type)) |
| #endif // CONFIG_IBC_SR_EXT |
| ) { |
| #if CONFIG_SKIP_MODE_ENHANCEMENT |
| skip = write_skip(cm, xd, segment_id, mbmi, w); |
| #else |
| assert(IMPLIES(mbmi->skip_mode, |
| mbmi->skip_txfm[xd->tree_type == CHROMA_PART])); |
| skip = mbmi->skip_mode ? 1 : write_skip(cm, xd, segment_id, mbmi, w); |
| #endif // !CONFIG_SKIP_MODE_ENHANCEMENT |
| } |
| #else |
| #if CONFIG_SKIP_MODE_ENHANCEMENT |
| const int skip = write_skip(cm, xd, segment_id, mbmi, w); |
| #else |
| assert( |
| IMPLIES(mbmi->skip_mode, mbmi->skip_txfm[xd->tree_type == CHROMA_PART])); |
| const int skip = |
| mbmi->skip_mode ? 1 : write_skip(cm, xd, segment_id, mbmi, w); |
| #endif // !CONFIG_SKIP_MODE_ENHANCEMENT |
| #endif // CONFIG_SKIP_TXFM_OPT |
| write_inter_segment_id(cpi, w, seg, segp, skip, 0); |
| |
| write_cdef(cm, xd, w, skip); |
| |
| #if CONFIG_CCSO |
| if (cm->seq_params.enable_ccso) write_ccso(cm, xd, w); |
| #endif |
| |
| write_delta_q_params(cpi, skip, w); |
| |
| #if CONFIG_REFINEMV |
| assert(IMPLIES(mbmi->refinemv_flag, |
| mbmi->skip_mode ? is_refinemv_allowed_skip_mode(cm, mbmi) |
| : is_refinemv_allowed(cm, mbmi, bsize))); |
| if (mbmi->refinemv_flag && switchable_refinemv_flag(cm, mbmi)) { |
| assert(mbmi->interinter_comp.type == COMPOUND_AVERAGE); |
| assert(mbmi->comp_group_idx == 0); |
| #if CONFIG_BAWP_CHROMA |
| assert(mbmi->bawp_flag[0] == 0); |
| #else |
| assert(mbmi->bawp_flag == 0); |
| #endif // CONFIG_BAWP_CHROMA |
| } |
| assert(IMPLIES(mbmi->refinemv_flag, mbmi->cwp_idx == CWP_EQUAL)); |
| #endif // CONFIG_REFINEMV |
| #if CONFIG_EXTENDED_WARP_PREDICTION |
| // Just for debugging purpose |
| if (mbmi->mode == WARPMV) { |
| assert(mbmi->skip_mode == 0); |
| assert(mbmi->motion_mode == WARP_DELTA || |
| mbmi->motion_mode == WARPED_CAUSAL); |
| #if CONFIG_SEP_COMP_DRL |
| assert(get_ref_mv_idx(mbmi, 0) == 0); |
| assert(get_ref_mv_idx(mbmi, 1) == 0); |
| #else |
| assert(mbmi->ref_mv_idx == 0); |
| #endif // CONFIG_SEP_COMP_DRL |
| assert(!is_tip_ref_frame(mbmi->ref_frame[0])); |
| assert(is_inter); |
| assert(!have_drl_index(mode)); |
| assert(mbmi->pb_mv_precision == mbmi->max_mv_precision); |
| #if CONFIG_BAWP |
| #if CONFIG_BAWP_CHROMA |
| assert(mbmi->bawp_flag[0] == 0); |
| #else |
| assert(mbmi->bawp_flag == 0); |
| #endif // CONFIG_BAWP_CHROMA |
| #endif |
| } |
| #endif // CONFIG_EXTENDED_WARP_PREDICTION |
| |
| #if !CONFIG_SKIP_TXFM_OPT |
| if (!mbmi->skip_mode) |
| write_is_inter(cm, xd, mbmi->segment_id, w, is_inter |
| #if CONFIG_CONTEXT_DERIVATION |
| , |
| skip |
| #endif // CONFIG_CONTEXT_DERIVATION |
| ); |
| #endif // !CONFIG_SKIP_TXFM_OPT |
| |
| #if CONFIG_IBC_SR_EXT |
| if (!is_inter && av1_allow_intrabc(cm, xd) && xd->tree_type != CHROMA_PART) { |
| write_intrabc_info( |
| #if CONFIG_IBC_BV_IMPROVEMENT && CONFIG_IBC_MAX_DRL |
| cm->features.max_bvp_drl_bits, |
| #endif // CONFIG_IBC_BV_IMPROVEMENT && CONFIG_IBC_MAX_DRL |
| xd, mbmi_ext_frame, w); |
| if (is_intrabc_block(mbmi, xd->tree_type)) return; |
| } |
| #endif // CONFIG_IBC_SR_EXT |
| |
| #if CONFIG_SKIP_MODE_ENHANCEMENT |
| if (mbmi->skip_mode) { |
| av1_collect_neighbors_ref_counts(xd); |
| write_drl_idx(cm->features.max_drl_bits, mbmi_ext_frame->mode_context, |
| ec_ctx, mbmi, mbmi_ext_frame, w); |
| return; |
| } |
| #else |
| if (mbmi->skip_mode) return; |
| #endif // CONFIG_SKIP_MODE_ENHANCEMENT |
| if (!is_inter) { |
| write_intra_prediction_modes(cpi, 0, w); |
| } else { |
| int16_t mode_ctx; |
| |
| av1_collect_neighbors_ref_counts(xd); |
| |
| if (cm->features.tip_frame_mode && |
| #if CONFIG_EXT_RECUR_PARTITIONS |
| is_tip_allowed_bsize(mbmi)) { |
| #else // CONFIG_EXT_RECUR_PARTITIONS |
| is_tip_allowed_bsize(bsize)) { |
| #endif // CONFIG_EXT_RECUR_PARTITIONS |
| const int tip_ctx = get_tip_ctx(xd); |
| aom_write_symbol(w, is_tip_ref_frame(mbmi->ref_frame[0]), |
| ec_ctx->tip_cdf[tip_ctx], 2); |
| } |
| |
| if (!is_tip_ref_frame(mbmi->ref_frame[0])) write_ref_frames(cm, xd, w); |
| |
| mode_ctx = |
| mode_context_analyzer(mbmi_ext_frame->mode_context, mbmi->ref_frame); |
| |
| const int jmvd_base_ref_list = get_joint_mvd_base_ref_list(cm, mbmi); |
| |
| // If segment skip is not enabled code the mode. |
| if (!segfeature_active(seg, segment_id, SEG_LVL_SKIP)) { |
| if (is_inter_compound_mode(mode)) |
| write_inter_compound_mode(xd, w, mode, |
| #if CONFIG_OPTFLOW_REFINEMENT |
| cm, mbmi, |
| #endif // CONFIG_OPTFLOW_REFINEMENT |
| mode_ctx); |
| else if (is_inter_singleref_mode(mode)) |
| write_inter_mode(w, mode, ec_ctx, mode_ctx |
| #if CONFIG_EXTENDED_WARP_PREDICTION |
| , |
| cm, xd, mbmi, bsize |
| #endif // CONFIG_EXTENDED_WARP_PREDICTION |
| ); |
| |
| #if CONFIG_EXTENDED_WARP_PREDICTION |
| #if CONFIG_BAWP |
| #if CONFIG_BAWP_CHROMA |
| if (cm->features.enable_bawp && |
| av1_allow_bawp(mbmi, xd->mi_row, xd->mi_col)) { |
| #if CONFIG_EXPLICIT_BAWP |
| aom_write_symbol(w, mbmi->bawp_flag[0] > 0, xd->tile_ctx->bawp_cdf[0], |
| 2); |
| if (mbmi->bawp_flag[0] > 0 && av1_allow_explicit_bawp(mbmi)) { |
| const int ctx_index = |
| (mbmi->mode == NEARMV) ? 0 : (mbmi->mode == AMVDNEWMV ? 1 : 2); |
| aom_write_symbol(w, mbmi->bawp_flag[0] > 1, |
| xd->tile_ctx->explicit_bawp_cdf[ctx_index], 2); |
| if (mbmi->bawp_flag[0] > 1) { |
| aom_write_symbol(w, mbmi->bawp_flag[0] - 2, |
| xd->tile_ctx->explicit_bawp_scale_cdf, |
| EXPLICIT_BAWP_SCALE_CNT); |
| } |
| } |
| #else |
| aom_write_symbol(w, mbmi->bawp_flag[0] == 1, xd->tile_ctx->bawp_cdf[0], |
| 2); |
| #endif // CONFIG_EXPLICIT_BAWP |
| } |
| |
| if (mbmi->bawp_flag[0]) { |
| aom_write_symbol(w, mbmi->bawp_flag[1] == 1, xd->tile_ctx->bawp_cdf[1], |
| 2); |
| } |
| #else |
| if (cm->features.enable_bawp && |
| av1_allow_bawp(mbmi, xd->mi_row, xd->mi_col)) { |
| #if CONFIG_EXPLICIT_BAWP |
| aom_write_symbol(w, mbmi->bawp_flag > 0, xd->tile_ctx->bawp_cdf, 2); |
| if (mbmi->bawp_flag > 0 && av1_allow_explicit_bawp(mbmi)) { |
| const int ctx_index = |
| (mbmi->mode == NEARMV) ? 0 : (mbmi->mode == AMVDNEWMV ? 1 : 2); |
| aom_write_symbol(w, mbmi->bawp_flag > 1, |
| xd->tile_ctx->explicit_bawp_cdf[ctx_index], 2); |
| if (mbmi->bawp_flag > 1 |