Merge "Merge branch 'master' into nextgenv2" into nextgenv2
diff --git a/test/vp10_fht4x4_test.cc b/test/vp10_fht4x4_test.cc
index 7fc6e00..63d9ec7 100644
--- a/test/vp10_fht4x4_test.cc
+++ b/test/vp10_fht4x4_test.cc
@@ -229,16 +229,16 @@
SSE4_1, VP10HighbdTrans4x4HT,
::testing::Values(
#if !CONFIG_EXT_TX
- make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
- VPX_BITS_10, 16),
+ // make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
+ // VPX_BITS_10, 16),
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 1,
VPX_BITS_10, 16),
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 2,
VPX_BITS_10, 16),
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 3,
VPX_BITS_10, 16),
- make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
- VPX_BITS_12, 16),
+ // make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
+ // VPX_BITS_12, 16),
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 1,
VPX_BITS_12, 16),
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 2,
@@ -246,8 +246,8 @@
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 3,
VPX_BITS_12, 16)));
#else
- make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
- VPX_BITS_10, 16),
+ // make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
+ // VPX_BITS_10, 16),
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 1,
VPX_BITS_10, 16),
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 2,
@@ -276,8 +276,8 @@
VPX_BITS_10, 16),
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 15,
VPX_BITS_10, 16),
- make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
- VPX_BITS_12, 16),
+ // make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
+ // VPX_BITS_12, 16),
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 1,
VPX_BITS_12, 16),
make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 2,
diff --git a/vp10/common/vp10_fwd_txfm2d_cfg.h b/vp10/common/vp10_fwd_txfm2d_cfg.h
index 1b01322..e8c82fd 100644
--- a/vp10/common/vp10_fwd_txfm2d_cfg.h
+++ b/vp10/common/vp10_fwd_txfm2d_cfg.h
@@ -32,11 +32,11 @@
TXFM_TYPE_DCT4}; // .txfm_type_row
// ---------------- config fwd_dct_dct_8 ----------------
-static const int8_t fwd_shift_dct_dct_8[3] = {3, -1, -1};
-static const int8_t fwd_stage_range_col_dct_dct_8[6] = {16, 17, 18, 19, 19, 19};
-static const int8_t fwd_stage_range_row_dct_dct_8[6] = {18, 19, 20, 20, 20, 20};
+static const int8_t fwd_shift_dct_dct_8[3] = {2, -1, 0};
+static const int8_t fwd_stage_range_col_dct_dct_8[6] = {15, 16, 17, 18, 18, 18};
+static const int8_t fwd_stage_range_row_dct_dct_8[6] = {17, 18, 19, 19, 19, 19};
static const int8_t fwd_cos_bit_col_dct_dct_8[6] = {13, 13, 13, 13, 13, 13};
-static const int8_t fwd_cos_bit_row_dct_dct_8[6] = {13, 13, 12, 12, 12, 12};
+static const int8_t fwd_cos_bit_row_dct_dct_8[6] = {13, 13, 13, 13, 13, 13};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_8 = {
8, // .txfm_size
@@ -59,7 +59,7 @@
20, 20, 20, 20};
static const int8_t fwd_cos_bit_col_dct_dct_16[8] = {13, 13, 13, 13,
13, 13, 13, 13};
-static const int8_t fwd_cos_bit_row_dct_dct_16[8] = {13, 13, 13, 12,
+static const int8_t fwd_cos_bit_row_dct_dct_16[8] = {12, 12, 12, 12,
12, 12, 12, 12};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_16 = {
@@ -81,9 +81,9 @@
20, 20, 20, 20, 20};
static const int8_t fwd_stage_range_row_dct_dct_32[10] = {16, 17, 18, 19, 20,
20, 20, 20, 20, 20};
-static const int8_t fwd_cos_bit_col_dct_dct_32[10] = {13, 13, 13, 13, 13,
+static const int8_t fwd_cos_bit_col_dct_dct_32[10] = {12, 12, 12, 12, 12,
12, 12, 12, 12, 12};
-static const int8_t fwd_cos_bit_row_dct_dct_32[10] = {13, 13, 13, 13, 12,
+static const int8_t fwd_cos_bit_row_dct_dct_32[10] = {12, 12, 12, 12, 12,
12, 12, 12, 12, 12};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_32 = {
@@ -144,14 +144,14 @@
TXFM_TYPE_ADST4}; // .txfm_type_row
// ---------------- config fwd_dct_adst_8 ----------------
-static const int8_t fwd_shift_dct_adst_8[3] = {3, -1, -1};
-static const int8_t fwd_stage_range_col_dct_adst_8[6] = {16, 17, 18,
- 19, 19, 19};
-static const int8_t fwd_stage_range_row_dct_adst_8[8] = {18, 18, 18, 19,
- 19, 20, 20, 20};
+static const int8_t fwd_shift_dct_adst_8[3] = {2, -1, 0};
+static const int8_t fwd_stage_range_col_dct_adst_8[6] = {15, 16, 17,
+ 18, 18, 18};
+static const int8_t fwd_stage_range_row_dct_adst_8[8] = {17, 17, 17, 18,
+ 18, 19, 19, 19};
static const int8_t fwd_cos_bit_col_dct_adst_8[6] = {13, 13, 13, 13, 13, 13};
static const int8_t fwd_cos_bit_row_dct_adst_8[8] = {13, 13, 13, 13,
- 13, 12, 12, 12};
+ 13, 13, 13, 13};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_8 = {
8, // .txfm_size
@@ -174,8 +174,8 @@
19, 19, 20, 20, 20};
static const int8_t fwd_cos_bit_col_dct_adst_16[8] = {13, 13, 13, 13,
13, 13, 13, 13};
-static const int8_t fwd_cos_bit_row_dct_adst_16[10] = {13, 13, 13, 13, 13,
- 13, 13, 12, 12, 12};
+static const int8_t fwd_cos_bit_row_dct_adst_16[10] = {12, 12, 12, 12, 12,
+ 12, 12, 12, 12, 12};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_16 = {
16, // .txfm_size
@@ -196,10 +196,10 @@
20, 20, 20, 20, 20};
static const int8_t fwd_stage_range_row_dct_adst_32[12] = {
16, 16, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20};
-static const int8_t fwd_cos_bit_col_dct_adst_32[10] = {13, 13, 13, 13, 13,
+static const int8_t fwd_cos_bit_col_dct_adst_32[10] = {12, 12, 12, 12, 12,
12, 12, 12, 12, 12};
-static const int8_t fwd_cos_bit_row_dct_adst_32[12] = {13, 13, 13, 13, 13, 13,
- 13, 13, 13, 12, 12, 12};
+static const int8_t fwd_cos_bit_row_dct_adst_32[12] = {12, 12, 12, 12, 12, 12,
+ 12, 12, 12, 12, 12, 12};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_adst_32 = {
32, // .txfm_size
@@ -236,15 +236,15 @@
TXFM_TYPE_ADST4}; // .txfm_type_row
// ---------------- config fwd_adst_adst_8 ----------------
-static const int8_t fwd_shift_adst_adst_8[3] = {3, -1, -1};
-static const int8_t fwd_stage_range_col_adst_adst_8[8] = {16, 16, 17, 18,
+static const int8_t fwd_shift_adst_adst_8[3] = {2, -1, 0};
+static const int8_t fwd_stage_range_col_adst_adst_8[8] = {15, 15, 16, 17,
+ 17, 18, 18, 18};
+static const int8_t fwd_stage_range_row_adst_adst_8[8] = {17, 17, 17, 18,
18, 19, 19, 19};
-static const int8_t fwd_stage_range_row_adst_adst_8[8] = {18, 18, 18, 19,
- 19, 20, 20, 20};
static const int8_t fwd_cos_bit_col_adst_adst_8[8] = {13, 13, 13, 13,
13, 13, 13, 13};
static const int8_t fwd_cos_bit_row_adst_adst_8[8] = {13, 13, 13, 13,
- 13, 12, 12, 12};
+ 13, 13, 13, 13};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_8 = {
8, // .txfm_size
@@ -267,8 +267,8 @@
19, 19, 20, 20, 20};
static const int8_t fwd_cos_bit_col_adst_adst_16[10] = {13, 13, 13, 13, 13,
13, 13, 13, 13, 13};
-static const int8_t fwd_cos_bit_row_adst_adst_16[10] = {13, 13, 13, 13, 13,
- 13, 13, 12, 12, 12};
+static const int8_t fwd_cos_bit_row_adst_adst_16[10] = {12, 12, 12, 12, 12,
+ 12, 12, 12, 12, 12};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_16 = {
16, // .txfm_size
@@ -289,10 +289,10 @@
15, 15, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20};
static const int8_t fwd_stage_range_row_adst_adst_32[12] = {
16, 16, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20};
-static const int8_t fwd_cos_bit_col_adst_adst_32[12] = {13, 13, 13, 13, 13, 13,
- 13, 13, 13, 12, 12, 12};
-static const int8_t fwd_cos_bit_row_adst_adst_32[12] = {13, 13, 13, 13, 13, 13,
- 13, 13, 13, 12, 12, 12};
+static const int8_t fwd_cos_bit_col_adst_adst_32[12] = {12, 12, 12, 12, 12, 12,
+ 12, 12, 12, 12, 12, 12};
+static const int8_t fwd_cos_bit_row_adst_adst_32[12] = {12, 12, 12, 12, 12, 12,
+ 12, 12, 12, 12, 12, 12};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_adst_32 = {
32, // .txfm_size
@@ -329,14 +329,14 @@
TXFM_TYPE_DCT4}; // .txfm_type_row
// ---------------- config fwd_adst_dct_8 ----------------
-static const int8_t fwd_shift_adst_dct_8[3] = {3, -1, -1};
-static const int8_t fwd_stage_range_col_adst_dct_8[8] = {16, 16, 17, 18,
- 18, 19, 19, 19};
-static const int8_t fwd_stage_range_row_adst_dct_8[6] = {18, 19, 20,
- 20, 20, 20};
+static const int8_t fwd_shift_adst_dct_8[3] = {2, -1, 0};
+static const int8_t fwd_stage_range_col_adst_dct_8[8] = {15, 15, 16, 17,
+ 17, 18, 18, 18};
+static const int8_t fwd_stage_range_row_adst_dct_8[6] = {17, 18, 19,
+ 19, 19, 19};
static const int8_t fwd_cos_bit_col_adst_dct_8[8] = {13, 13, 13, 13,
13, 13, 13, 13};
-static const int8_t fwd_cos_bit_row_adst_dct_8[6] = {13, 13, 12, 12, 12, 12};
+static const int8_t fwd_cos_bit_row_adst_dct_8[6] = {13, 13, 13, 13, 13, 13};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_8 = {
8, // .txfm_size
@@ -359,7 +359,7 @@
20, 20, 20, 20};
static const int8_t fwd_cos_bit_col_adst_dct_16[10] = {13, 13, 13, 13, 13,
13, 13, 13, 13, 13};
-static const int8_t fwd_cos_bit_row_adst_dct_16[8] = {13, 13, 13, 12,
+static const int8_t fwd_cos_bit_row_adst_dct_16[8] = {12, 12, 12, 12,
12, 12, 12, 12};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_16 = {
@@ -381,9 +381,9 @@
15, 15, 16, 17, 17, 18, 18, 19, 19, 20, 20, 20};
static const int8_t fwd_stage_range_row_adst_dct_32[10] = {16, 17, 18, 19, 20,
20, 20, 20, 20, 20};
-static const int8_t fwd_cos_bit_col_adst_dct_32[12] = {13, 13, 13, 13, 13, 13,
- 13, 13, 13, 12, 12, 12};
-static const int8_t fwd_cos_bit_row_adst_dct_32[10] = {13, 13, 13, 13, 12,
+static const int8_t fwd_cos_bit_col_adst_dct_32[12] = {12, 12, 12, 12, 12, 12,
+ 12, 12, 12, 12, 12, 12};
+static const int8_t fwd_cos_bit_row_adst_dct_32[10] = {12, 12, 12, 12, 12,
12, 12, 12, 12, 12};
static const TXFM_2D_CFG fwd_txfm_2d_cfg_adst_dct_32 = {
diff --git a/vp10/common/vp10_inv_txfm2d_cfg.h b/vp10/common/vp10_inv_txfm2d_cfg.h
index 983220f..9199068 100644
--- a/vp10/common/vp10_inv_txfm2d_cfg.h
+++ b/vp10/common/vp10_inv_txfm2d_cfg.h
@@ -32,10 +32,10 @@
TXFM_TYPE_DCT4}; // .txfm_type_row
// ---------------- config inv_dct_dct_8 ----------------
-static const int8_t inv_shift_dct_dct_8[2] = {1, -6};
-static const int8_t inv_stage_range_col_dct_dct_8[6] = {20, 20, 20, 20, 19, 19};
+static const int8_t inv_shift_dct_dct_8[2] = {0, -5};
+static const int8_t inv_stage_range_col_dct_dct_8[6] = {19, 19, 19, 19, 18, 18};
static const int8_t inv_stage_range_row_dct_dct_8[6] = {19, 19, 19, 19, 19, 19};
-static const int8_t inv_cos_bit_col_dct_dct_8[6] = {12, 12, 12, 12, 12, 13};
+static const int8_t inv_cos_bit_col_dct_dct_8[6] = {13, 13, 13, 13, 13, 13};
static const int8_t inv_cos_bit_row_dct_dct_8[6] = {13, 13, 13, 13, 13, 13};
static const TXFM_2D_CFG inv_txfm_2d_cfg_dct_dct_8 = {
@@ -106,7 +106,7 @@
static const int8_t inv_stage_range_row_dct_dct_64[12] = {
20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20};
static const int8_t inv_cos_bit_col_dct_dct_64[12] = {13, 13, 13, 13, 13, 13,
- 13, 13, 13, 13, 13, 14};
+ 13, 13, 13, 13, 13, 13};
static const int8_t inv_cos_bit_row_dct_dct_64[12] = {12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12};
@@ -144,12 +144,12 @@
TXFM_TYPE_ADST4}; // .txfm_type_row
// ---------------- config inv_dct_adst_8 ----------------
-static const int8_t inv_shift_dct_adst_8[2] = {1, -6};
-static const int8_t inv_stage_range_col_dct_adst_8[6] = {20, 20, 20,
- 20, 19, 19};
+static const int8_t inv_shift_dct_adst_8[2] = {0, -5};
+static const int8_t inv_stage_range_col_dct_adst_8[6] = {19, 19, 19,
+ 19, 18, 18};
static const int8_t inv_stage_range_row_dct_adst_8[8] = {19, 19, 19, 19,
19, 19, 19, 19};
-static const int8_t inv_cos_bit_col_dct_adst_8[6] = {12, 12, 12, 12, 12, 13};
+static const int8_t inv_cos_bit_col_dct_adst_8[6] = {13, 13, 13, 13, 13, 13};
static const int8_t inv_cos_bit_row_dct_adst_8[8] = {13, 13, 13, 13,
13, 13, 13, 13};
@@ -237,13 +237,13 @@
TXFM_TYPE_ADST4}; // .txfm_type_row
// ---------------- config inv_adst_adst_8 ----------------
-static const int8_t inv_shift_adst_adst_8[2] = {1, -6};
-static const int8_t inv_stage_range_col_adst_adst_8[8] = {20, 20, 20, 20,
- 20, 20, 19, 19};
+static const int8_t inv_shift_adst_adst_8[2] = {0, -5};
+static const int8_t inv_stage_range_col_adst_adst_8[8] = {19, 19, 19, 19,
+ 19, 19, 18, 18};
static const int8_t inv_stage_range_row_adst_adst_8[8] = {19, 19, 19, 19,
19, 19, 19, 19};
-static const int8_t inv_cos_bit_col_adst_adst_8[8] = {12, 12, 12, 12,
- 12, 12, 12, 13};
+static const int8_t inv_cos_bit_col_adst_adst_8[8] = {13, 13, 13, 13,
+ 13, 13, 13, 13};
static const int8_t inv_cos_bit_row_adst_adst_8[8] = {13, 13, 13, 13,
13, 13, 13, 13};
@@ -330,13 +330,13 @@
TXFM_TYPE_DCT4}; // .txfm_type_row
// ---------------- config inv_adst_dct_8 ----------------
-static const int8_t inv_shift_adst_dct_8[2] = {1, -6};
-static const int8_t inv_stage_range_col_adst_dct_8[8] = {20, 20, 20, 20,
- 20, 20, 19, 19};
+static const int8_t inv_shift_adst_dct_8[2] = {0, -5};
+static const int8_t inv_stage_range_col_adst_dct_8[8] = {19, 19, 19, 19,
+ 19, 19, 18, 18};
static const int8_t inv_stage_range_row_adst_dct_8[6] = {19, 19, 19,
19, 19, 19};
-static const int8_t inv_cos_bit_col_adst_dct_8[8] = {12, 12, 12, 12,
- 12, 12, 12, 13};
+static const int8_t inv_cos_bit_col_adst_dct_8[8] = {13, 13, 13, 13,
+ 13, 13, 13, 13};
static const int8_t inv_cos_bit_row_adst_dct_8[6] = {13, 13, 13, 13, 13, 13};
static const TXFM_2D_CFG inv_txfm_2d_cfg_adst_dct_8 = {
diff --git a/vp10/encoder/block.h b/vp10/encoder/block.h
index 2e8af98..095aee5 100644
--- a/vp10/encoder/block.h
+++ b/vp10/encoder/block.h
@@ -104,6 +104,7 @@
int mv_best_ref_index[MAX_REF_FRAMES];
unsigned int max_mv_context[MAX_REF_FRAMES];
unsigned int source_variance;
+ unsigned int recon_variance;
#if CONFIG_OBMC
unsigned int pred_variance;
#endif // CONFIG_OBMC
diff --git a/vp10/encoder/rdopt.c b/vp10/encoder/rdopt.c
index a7a88ed..e7762a5 100644
--- a/vp10/encoder/rdopt.c
+++ b/vp10/encoder/rdopt.c
@@ -1681,12 +1681,6 @@
if (mbmi->tx_size >= TX_32X32)
assert(mbmi->tx_type == DCT_DCT);
#endif
-
- txfm_rd_in_plane(x,
- cpi,
- &r, &d, &s,
- &sse, ref_best_rd, 0, bs, best_tx,
- cpi->sf.use_fast_coef_costing);
}
static void super_block_yrd(VP10_COMP *cpi, MACROBLOCK *x, int *rate,
@@ -7307,6 +7301,20 @@
if (!is_comp_pred)
single_skippable[this_mode][refs[0]] = *skippable;
+#if CONFIG_VP9_HIGHBITDEPTH
+ if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH) {
+ x->recon_variance =
+ vp10_high_get_sby_perpixel_variance(cpi, &xd->plane[0].dst,
+ bsize, xd->bd);
+ } else {
+ x->recon_variance =
+ vp10_get_sby_perpixel_variance(cpi, &xd->plane[0].dst, bsize);
+ }
+#else
+ x->recon_variance =
+ vp10_get_sby_perpixel_variance(cpi, &xd->plane[0].dst, bsize);
+#endif // CONFIG_VP9_HIGHBITDEPTH
+
restore_dst_buf(xd, orig_dst, orig_dst_stride);
return 0; // The rate-distortion cost will be re-calculated by caller.
}
@@ -7367,17 +7375,14 @@
#define LOW_VAR_THRESH 16
#define VLOW_ADJ_MAX 25
#define VHIGH_ADJ_MAX 8
-static void rd_variance_adjustment(VP10_COMP *cpi,
- MACROBLOCK *x,
- BLOCK_SIZE bsize,
+static void rd_variance_adjustment(MACROBLOCK *x,
int64_t *this_rd,
MV_REFERENCE_FRAME ref_frame,
#if CONFIG_OBMC
int is_pred_var_available,
#endif // CONFIG_OBMC
unsigned int source_variance) {
- MACROBLOCKD *const xd = &x->e_mbd;
- unsigned int recon_variance;
+ unsigned int recon_variance = x->recon_variance;
unsigned int absvar_diff = 0;
int64_t var_error = 0;
int64_t var_factor = 0;
@@ -7386,24 +7391,8 @@
return;
#if CONFIG_OBMC
- if (is_pred_var_available) {
+ if (is_pred_var_available)
recon_variance = x->pred_variance;
- } else {
-#endif // CONFIG_OBMC
-#if CONFIG_VP9_HIGHBITDEPTH
- if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH) {
- recon_variance =
- vp10_high_get_sby_perpixel_variance(cpi, &xd->plane[0].dst, bsize, xd->bd);
- } else {
- recon_variance =
- vp10_get_sby_perpixel_variance(cpi, &xd->plane[0].dst, bsize);
- }
-#else
- recon_variance =
- vp10_get_sby_perpixel_variance(cpi, &xd->plane[0].dst, bsize);
-#endif // CONFIG_VP9_HIGHBITDEPTH
-#if CONFIG_OBMC
- }
#endif // CONFIG_OBMC
if ((source_variance + recon_variance) > LOW_VAR_THRESH) {
@@ -8254,6 +8243,20 @@
if (this_mode != DC_PRED && this_mode != TM_PRED)
rate2 += intra_cost_penalty;
distortion2 = distortion_y + distortion_uv;
+ vp10_encode_intra_block_plane(x, bsize, 0);
+#if CONFIG_VP9_HIGHBITDEPTH
+ if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH) {
+ x->recon_variance =
+ vp10_high_get_sby_perpixel_variance(cpi, &xd->plane[0].dst,
+ bsize, xd->bd);
+ } else {
+ x->recon_variance =
+ vp10_get_sby_perpixel_variance(cpi, &xd->plane[0].dst, bsize);
+ }
+#else
+ x->recon_variance =
+ vp10_get_sby_perpixel_variance(cpi, &xd->plane[0].dst, bsize);
+#endif // CONFIG_VP9_HIGHBITDEPTH
} else {
#if CONFIG_REF_MV
int_mv backup_ref_mv[2];
@@ -8567,7 +8570,7 @@
// Apply an adjustment to the rd value based on the similarity of the
// source variance and reconstructed variance.
- rd_variance_adjustment(cpi, x, bsize, &this_rd, ref_frame,
+ rd_variance_adjustment(x, &this_rd, ref_frame,
#if CONFIG_OBMC
is_inter_block(mbmi),
#endif // CONFIG_OBMC
