Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 1 | ## |
| 2 | ## Copyright (c) 2017, Alliance for Open Media. All rights reserved |
| 3 | ## |
| 4 | ## This source code is subject to the terms of the BSD 2 Clause License and |
| 5 | ## the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License |
| 6 | ## was not distributed with this source code in the LICENSE file, you can |
| 7 | ## obtain it at www.aomedia.org/license/software. If the Alliance for Open |
| 8 | ## Media Patent License 1.0 was not distributed with this source code in the |
| 9 | ## PATENTS file, you can obtain it at www.aomedia.org/license/patent. |
| 10 | ## |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 11 | |
| 12 | |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 13 | if ("${AOM_TARGET_CPU}" STREQUAL "arm64") |
| 14 | set(ARCH_ARM 1) |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 15 | set(RTCD_ARCH_ARM "yes") |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 16 | |
| 17 | if (ENABLE_NEON) |
| 18 | set(HAVE_NEON 1) |
| 19 | set(RTCD_HAVE_NEON "yes") |
| 20 | else () |
| 21 | set(HAVE_NEON 0) |
| 22 | set(AOM_RTCD_FLAGS ${AOM_RTCD_FLAGS} --disable-neon) |
| 23 | endif () |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 24 | elseif ("${AOM_TARGET_CPU}" MATCHES "^armv7") |
| 25 | set(ARCH_ARM 1) |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 26 | set(RTCD_ARCH_ARM "yes") |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 27 | |
| 28 | if (ENABLE_NEON) |
| 29 | set(HAVE_NEON 1) |
| 30 | set(RTCD_HAVE_NEON "yes") |
| 31 | else () |
| 32 | set(HAVE_NEON 0) |
| 33 | set(AOM_RTCD_FLAGS ${AOM_RTCD_FLAGS} --disable-neon) |
| 34 | endif () |
| 35 | |
| 36 | if (ENABLE_NEON_ASM) |
| 37 | set(HAVE_NEON_ASM 1) |
| 38 | set(RTCD_HAVE_NEON_ASM "yes") |
| 39 | else () |
| 40 | set(HAVE_NEON_ASM 0) |
| 41 | endif () |
| 42 | set(AOM_RTCD_FLAGS ${AOM_RTCD_FLAGS} --disable-neon_asm) |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 43 | elseif ("${AOM_TARGET_CPU}" MATCHES "^mips") |
| 44 | set(ARCH_MIPS 1) |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 45 | set(RTCD_ARCH_MIPS "yes") |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 46 | |
| 47 | if ("${AOM_TARGET_CPU}" STREQUAL "mips32") |
| 48 | set(HAVE_MIPS32 1) |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 49 | set(RTCD_HAVE_MIPS32 "yes") |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 50 | elseif ("${AOM_TARGET_CPU}" STREQUAL "mips64") |
| 51 | set(HAVE_MIPS64 1) |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 52 | set(RTCD_HAVE_MIPS64 "yes") |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 53 | endif () |
| 54 | |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 55 | # HAVE_DSPR2 is set by mips toolchain files. |
| 56 | if (ENABLE_DSPR2 AND HAVE_DSPR2) |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 57 | set(RTCD_HAVE_DSPR2 "yes") |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 58 | else () |
| 59 | set(HAVE_DSPR2 0) |
| 60 | set(AOM_RTCD_FLAGS ${AOM_RTCD_FLAGS} --disable-dspr2) |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 61 | endif () |
| 62 | |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 63 | # HAVE_MSA is set by mips toolchain files. |
| 64 | if (ENABLE_MSA AND HAVE_MSA) |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 65 | set(RTCD_HAVE_MSA "yes") |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 66 | else () |
| 67 | set(HAVE_MSA 0) |
| 68 | set(AOM_RTCD_FLAGS ${AOM_RTCD_FLAGS} --disable-msa) |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 69 | endif () |
| 70 | elseif ("${AOM_TARGET_CPU}" MATCHES "^x86") |
| 71 | if ("${AOM_TARGET_CPU}" STREQUAL "x86") |
| 72 | set(ARCH_X86 1) |
| 73 | set(RTCD_ARCH_X86 "yes") |
| 74 | elseif ("${AOM_TARGET_CPU}" STREQUAL "x86_64") |
| 75 | set(ARCH_X86_64 1) |
| 76 | set(RTCD_ARCH_X86_64 "yes") |
| 77 | endif () |
| 78 | |
Tom Finegan | e3bae4a | 2017-10-12 09:06:31 -0700 | [diff] [blame] | 79 | set(X86_FLAVORS "MMX;SSE;SSE2;SSE3;SSSE3;SSE4_1;AVX;AVX2") |
| 80 | foreach (flavor ${X86_FLAVORS}) |
| 81 | if (ENABLE_${flavor} AND NOT disable_remaining_flavors) |
| 82 | set(HAVE_${flavor} 1) |
| 83 | set(RTCD_HAVE_${flavor} "yes") |
| 84 | else () |
| 85 | set(disable_remaining_flavors 1) |
| 86 | set(HAVE_${flavor} 0) |
| 87 | string(TOLOWER ${flavor} flavor) |
| 88 | set(AOM_RTCD_FLAGS ${AOM_RTCD_FLAGS} --disable-${flavor}) |
| 89 | endif () |
| 90 | endforeach () |
Tom Finegan | c6e296e | 2017-04-21 11:13:15 -0700 | [diff] [blame] | 91 | endif () |
| 92 | |
| 93 | foreach (config_var ${AOM_CONFIG_VARS}) |
| 94 | if (${${config_var}}) |
| 95 | set(RTCD_${config_var} yes) |
| 96 | endif () |
| 97 | endforeach () |