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Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_ENCODER_RD_H_
13#define AV1_ENCODER_RD_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
15#include <limits.h>
16
Yaowu Xuc27fc142016-08-22 16:08:15 -070017#include "av1/common/blockd.h"
18
19#include "av1/encoder/block.h"
20#include "av1/encoder/context_tree.h"
21#include "av1/encoder/cost.h"
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#define RDDIV_BITS 7
28#define RD_EPB_SHIFT 6
29
Urvang Joshi70006e42017-06-14 16:08:55 -070030#define RDCOST(RM, R, D) \
31 (ROUND_POWER_OF_TWO(((int64_t)R) * (RM), AV1_PROB_COST_SHIFT) + \
Yaowu Xubb617782018-01-18 09:49:29 -080032 (D * (1 << RDDIV_BITS)))
Yaowu Xuc27fc142016-08-22 16:08:15 -070033
Urvang Joshi70006e42017-06-14 16:08:55 -070034#define RDCOST_DBL(RM, R, D) \
Yaowu Xuf883b422016-08-30 14:01:10 -070035 (((((double)(R)) * (RM)) / (double)(1 << AV1_PROB_COST_SHIFT)) + \
Urvang Joshi70006e42017-06-14 16:08:55 -070036 ((double)(D) * (1 << RDDIV_BITS)))
Yaowu Xuc27fc142016-08-22 16:08:15 -070037
38#define QIDX_SKIP_THRESH 115
39
40#define MV_COST_WEIGHT 108
41#define MV_COST_WEIGHT_SUB 120
42
Yaowu Xuc27fc142016-08-22 16:08:15 -070043#define RD_THRESH_MAX_FACT 64
44#define RD_THRESH_INC 1
45
46// This enumerator type needs to be kept aligned with the mode order in
Yaowu Xuf883b422016-08-30 14:01:10 -070047// const MODE_DEFINITION av1_mode_order[MAX_MODES] used in the rd code.
Yaowu Xuc27fc142016-08-22 16:08:15 -070048typedef enum {
49 THR_NEARESTMV,
Yaowu Xuc27fc142016-08-22 16:08:15 -070050 THR_NEARESTL2,
51 THR_NEARESTL3,
52 THR_NEARESTB,
Zoe Liue9b15e22017-07-19 15:53:01 -070053 THR_NEARESTA2,
Yaowu Xuc27fc142016-08-22 16:08:15 -070054 THR_NEARESTA,
55 THR_NEARESTG,
56
57 THR_DC,
58
59 THR_NEWMV,
Yaowu Xuc27fc142016-08-22 16:08:15 -070060 THR_NEWL2,
61 THR_NEWL3,
62 THR_NEWB,
Zoe Liue9b15e22017-07-19 15:53:01 -070063 THR_NEWA2,
Yaowu Xuc27fc142016-08-22 16:08:15 -070064 THR_NEWA,
65 THR_NEWG,
66
67 THR_NEARMV,
Yaowu Xuc27fc142016-08-22 16:08:15 -070068 THR_NEARL2,
69 THR_NEARL3,
70 THR_NEARB,
Zoe Liue9b15e22017-07-19 15:53:01 -070071 THR_NEARA2,
Yaowu Xuc27fc142016-08-22 16:08:15 -070072 THR_NEARA,
73 THR_NEARG,
74
Sarah Parker2b9ec2e2017-10-30 17:34:08 -070075 THR_GLOBALMV,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -080076 THR_GLOBALL2,
77 THR_GLOBALL3,
78 THR_GLOBALB,
79 THR_GLOBALA2,
80 THR_GLOBALA,
81 THR_GLOBALG,
Yaowu Xuc27fc142016-08-22 16:08:15 -070082
Yaowu Xuc27fc142016-08-22 16:08:15 -070083 THR_COMP_NEAREST_NEARESTLA,
Yaowu Xuc27fc142016-08-22 16:08:15 -070084 THR_COMP_NEAREST_NEARESTL2A,
85 THR_COMP_NEAREST_NEARESTL3A,
Yaowu Xuc27fc142016-08-22 16:08:15 -070086 THR_COMP_NEAREST_NEARESTGA,
Yaowu Xuc27fc142016-08-22 16:08:15 -070087 THR_COMP_NEAREST_NEARESTLB,
88 THR_COMP_NEAREST_NEARESTL2B,
89 THR_COMP_NEAREST_NEARESTL3B,
90 THR_COMP_NEAREST_NEARESTGB,
Zoe Liue9b15e22017-07-19 15:53:01 -070091 THR_COMP_NEAREST_NEARESTLA2,
92 THR_COMP_NEAREST_NEARESTL2A2,
93 THR_COMP_NEAREST_NEARESTL3A2,
94 THR_COMP_NEAREST_NEARESTGA2,
Zoe Liuc082bbc2017-05-17 13:31:37 -070095#if CONFIG_EXT_COMP_REFS
96 THR_COMP_NEAREST_NEARESTLL2,
Zoe Liufcf5fa22017-06-26 16:00:38 -070097 THR_COMP_NEAREST_NEARESTLL3,
Zoe Liuc082bbc2017-05-17 13:31:37 -070098 THR_COMP_NEAREST_NEARESTLG,
99 THR_COMP_NEAREST_NEARESTBA,
100#endif // CONFIG_EXT_COMP_REFS
Yaowu Xuc27fc142016-08-22 16:08:15 -0700101
Urvang Joshi96d1c0a2017-10-10 13:15:32 -0700102 THR_PAETH,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700103
Urvang Joshi6be4a542016-11-03 15:24:05 -0700104 THR_SMOOTH,
Urvang Joshie6ca8e82017-03-15 14:57:41 -0700105 THR_SMOOTH_V,
106 THR_SMOOTH_H,
Urvang Joshi6be4a542016-11-03 15:24:05 -0700107
Yaowu Xuc27fc142016-08-22 16:08:15 -0700108 THR_COMP_NEAR_NEARLA,
109 THR_COMP_NEW_NEARESTLA,
110 THR_COMP_NEAREST_NEWLA,
111 THR_COMP_NEW_NEARLA,
112 THR_COMP_NEAR_NEWLA,
113 THR_COMP_NEW_NEWLA,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800114 THR_COMP_GLOBAL_GLOBALLA,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700115
Yaowu Xuc27fc142016-08-22 16:08:15 -0700116 THR_COMP_NEAR_NEARL2A,
117 THR_COMP_NEW_NEARESTL2A,
118 THR_COMP_NEAREST_NEWL2A,
119 THR_COMP_NEW_NEARL2A,
120 THR_COMP_NEAR_NEWL2A,
121 THR_COMP_NEW_NEWL2A,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800122 THR_COMP_GLOBAL_GLOBALL2A,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700123
Yaowu Xuc27fc142016-08-22 16:08:15 -0700124 THR_COMP_NEAR_NEARL3A,
125 THR_COMP_NEW_NEARESTL3A,
126 THR_COMP_NEAREST_NEWL3A,
127 THR_COMP_NEW_NEARL3A,
128 THR_COMP_NEAR_NEWL3A,
129 THR_COMP_NEW_NEWL3A,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800130 THR_COMP_GLOBAL_GLOBALL3A,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700131
Yaowu Xuc27fc142016-08-22 16:08:15 -0700132 THR_COMP_NEAR_NEARGA,
133 THR_COMP_NEW_NEARESTGA,
134 THR_COMP_NEAREST_NEWGA,
135 THR_COMP_NEW_NEARGA,
136 THR_COMP_NEAR_NEWGA,
137 THR_COMP_NEW_NEWGA,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800138 THR_COMP_GLOBAL_GLOBALGA,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700139
Yaowu Xuc27fc142016-08-22 16:08:15 -0700140 THR_COMP_NEAR_NEARLB,
141 THR_COMP_NEW_NEARESTLB,
142 THR_COMP_NEAREST_NEWLB,
143 THR_COMP_NEW_NEARLB,
144 THR_COMP_NEAR_NEWLB,
145 THR_COMP_NEW_NEWLB,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800146 THR_COMP_GLOBAL_GLOBALLB,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700147
Yaowu Xuc27fc142016-08-22 16:08:15 -0700148 THR_COMP_NEAR_NEARL2B,
149 THR_COMP_NEW_NEARESTL2B,
150 THR_COMP_NEAREST_NEWL2B,
151 THR_COMP_NEW_NEARL2B,
152 THR_COMP_NEAR_NEWL2B,
153 THR_COMP_NEW_NEWL2B,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800154 THR_COMP_GLOBAL_GLOBALL2B,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700155
Yaowu Xuc27fc142016-08-22 16:08:15 -0700156 THR_COMP_NEAR_NEARL3B,
157 THR_COMP_NEW_NEARESTL3B,
158 THR_COMP_NEAREST_NEWL3B,
159 THR_COMP_NEW_NEARL3B,
160 THR_COMP_NEAR_NEWL3B,
161 THR_COMP_NEW_NEWL3B,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800162 THR_COMP_GLOBAL_GLOBALL3B,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700163
Yaowu Xuc27fc142016-08-22 16:08:15 -0700164 THR_COMP_NEAR_NEARGB,
165 THR_COMP_NEW_NEARESTGB,
166 THR_COMP_NEAREST_NEWGB,
167 THR_COMP_NEW_NEARGB,
168 THR_COMP_NEAR_NEWGB,
169 THR_COMP_NEW_NEWGB,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800170 THR_COMP_GLOBAL_GLOBALGB,
Zoe Liuc082bbc2017-05-17 13:31:37 -0700171
Zoe Liue9b15e22017-07-19 15:53:01 -0700172 THR_COMP_NEAR_NEARLA2,
173 THR_COMP_NEW_NEARESTLA2,
174 THR_COMP_NEAREST_NEWLA2,
175 THR_COMP_NEW_NEARLA2,
176 THR_COMP_NEAR_NEWLA2,
177 THR_COMP_NEW_NEWLA2,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800178 THR_COMP_GLOBAL_GLOBALLA2,
Zoe Liue9b15e22017-07-19 15:53:01 -0700179
180 THR_COMP_NEAR_NEARL2A2,
181 THR_COMP_NEW_NEARESTL2A2,
182 THR_COMP_NEAREST_NEWL2A2,
183 THR_COMP_NEW_NEARL2A2,
184 THR_COMP_NEAR_NEWL2A2,
185 THR_COMP_NEW_NEWL2A2,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800186 THR_COMP_GLOBAL_GLOBALL2A2,
Zoe Liue9b15e22017-07-19 15:53:01 -0700187
188 THR_COMP_NEAR_NEARL3A2,
189 THR_COMP_NEW_NEARESTL3A2,
190 THR_COMP_NEAREST_NEWL3A2,
191 THR_COMP_NEW_NEARL3A2,
192 THR_COMP_NEAR_NEWL3A2,
193 THR_COMP_NEW_NEWL3A2,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800194 THR_COMP_GLOBAL_GLOBALL3A2,
Zoe Liue9b15e22017-07-19 15:53:01 -0700195
196 THR_COMP_NEAR_NEARGA2,
197 THR_COMP_NEW_NEARESTGA2,
198 THR_COMP_NEAREST_NEWGA2,
199 THR_COMP_NEW_NEARGA2,
200 THR_COMP_NEAR_NEWGA2,
201 THR_COMP_NEW_NEWGA2,
Debargha Mukherjeeae2f3cf2017-11-06 18:44:00 -0800202 THR_COMP_GLOBAL_GLOBALGA2,
Zoe Liue9b15e22017-07-19 15:53:01 -0700203
Yaowu Xuc27fc142016-08-22 16:08:15 -0700204 THR_H_PRED,
205 THR_V_PRED,
206 THR_D135_PRED,
207 THR_D207_PRED,
208 THR_D153_PRED,
209 THR_D63_PRED,
210 THR_D117_PRED,
211 THR_D45_PRED,
212
Debargha Mukherjeec1077e92017-11-06 20:17:33 -0800213#if CONFIG_EXT_COMP_REFS
214 THR_COMP_NEAR_NEARLL2,
215 THR_COMP_NEW_NEARESTLL2,
216 THR_COMP_NEAREST_NEWLL2,
217 THR_COMP_NEW_NEARLL2,
218 THR_COMP_NEAR_NEWLL2,
219 THR_COMP_NEW_NEWLL2,
220 THR_COMP_GLOBAL_GLOBALLL2,
221
222 THR_COMP_NEAR_NEARLL3,
223 THR_COMP_NEW_NEARESTLL3,
224 THR_COMP_NEAREST_NEWLL3,
225 THR_COMP_NEW_NEARLL3,
226 THR_COMP_NEAR_NEWLL3,
227 THR_COMP_NEW_NEWLL3,
228 THR_COMP_GLOBAL_GLOBALLL3,
229
230 THR_COMP_NEAR_NEARLG,
231 THR_COMP_NEW_NEARESTLG,
232 THR_COMP_NEAREST_NEWLG,
233 THR_COMP_NEW_NEARLG,
234 THR_COMP_NEAR_NEWLG,
235 THR_COMP_NEW_NEWLG,
236 THR_COMP_GLOBAL_GLOBALLG,
237
238 THR_COMP_NEAR_NEARBA,
239 THR_COMP_NEW_NEARESTBA,
240 THR_COMP_NEAREST_NEWBA,
241 THR_COMP_NEW_NEARBA,
242 THR_COMP_NEAR_NEWBA,
243 THR_COMP_NEW_NEWBA,
244 THR_COMP_GLOBAL_GLOBALBA,
245#endif // CONFIG_EXT_COMP_REFS
246
Urvang Joshi6be4a542016-11-03 15:24:05 -0700247 MAX_MODES
Yaowu Xuc27fc142016-08-22 16:08:15 -0700248} THR_MODES;
249
250typedef enum {
251 THR_LAST,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700252 THR_LAST2,
253 THR_LAST3,
254 THR_BWDR,
Zoe Liue9b15e22017-07-19 15:53:01 -0700255 THR_ALTR2,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700256 THR_GOLD,
257 THR_ALTR,
258
259 THR_COMP_LA,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700260 THR_COMP_L2A,
261 THR_COMP_L3A,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700262 THR_COMP_GA,
263
Yaowu Xuc27fc142016-08-22 16:08:15 -0700264 THR_COMP_LB,
265 THR_COMP_L2B,
266 THR_COMP_L3B,
267 THR_COMP_GB,
Zoe Liue9b15e22017-07-19 15:53:01 -0700268
Zoe Liue9b15e22017-07-19 15:53:01 -0700269 THR_COMP_LA2,
270 THR_COMP_L2A2,
271 THR_COMP_L3A2,
272 THR_COMP_GA2,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700273
274 THR_INTRA,
Zoe Liue9b15e22017-07-19 15:53:01 -0700275
276 MAX_REFS
Yaowu Xuc27fc142016-08-22 16:08:15 -0700277} THR_MODES_SUB8X8;
278
279typedef struct RD_OPT {
280 // Thresh_mult is used to set a threshold for the rd score. A higher value
281 // means that we will accept the best mode so far more often. This number
282 // is used in combination with the current block size, and thresh_freq_fact
283 // to pick a threshold.
284 int thresh_mult[MAX_MODES];
285 int thresh_mult_sub8x8[MAX_REFS];
286
Rupert Swarbrick93c39e92017-07-12 11:11:02 +0100287 int threshes[MAX_SEGMENTS][BLOCK_SIZES_ALL][MAX_MODES];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700288
289 int64_t prediction_type_threshes[TOTAL_REFS_PER_FRAME][REFERENCE_MODES];
290
291 int RDMULT;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700292} RD_OPT;
293
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700294static INLINE void av1_init_rd_stats(RD_STATS *rd_stats) {
295#if CONFIG_RD_DEBUG
296 int plane;
297#endif
298 rd_stats->rate = 0;
299 rd_stats->dist = 0;
300 rd_stats->rdcost = 0;
301 rd_stats->sse = 0;
302 rd_stats->skip = 1;
Jingning Han3bce7542017-07-25 10:53:57 -0700303 rd_stats->zero_rate = 0;
Jingning Han1a7f0a82017-07-27 09:48:05 -0700304 rd_stats->invalid_rate = 0;
Jingning Han3bce7542017-07-25 10:53:57 -0700305 rd_stats->ref_rdcost = INT64_MAX;
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700306#if CONFIG_RD_DEBUG
Imdad Sardharwallaaf8e2642018-01-19 11:46:34 +0000307 // This may run into problems when monochrome video is
308 // encoded, as there will only be 1 plane
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700309 for (plane = 0; plane < MAX_MB_PLANE; ++plane) {
310 rd_stats->txb_coeff_cost[plane] = 0;
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700311 {
312 int r, c;
313 for (r = 0; r < TXB_COEFF_COST_MAP_SIZE; ++r)
314 for (c = 0; c < TXB_COEFF_COST_MAP_SIZE; ++c)
315 rd_stats->txb_coeff_cost_map[plane][r][c] = 0;
316 }
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700317 }
318#endif
319}
Yaowu Xuc27fc142016-08-22 16:08:15 -0700320
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700321static INLINE void av1_invalid_rd_stats(RD_STATS *rd_stats) {
322#if CONFIG_RD_DEBUG
323 int plane;
324#endif
325 rd_stats->rate = INT_MAX;
326 rd_stats->dist = INT64_MAX;
327 rd_stats->rdcost = INT64_MAX;
328 rd_stats->sse = INT64_MAX;
329 rd_stats->skip = 0;
Jingning Han3bce7542017-07-25 10:53:57 -0700330 rd_stats->zero_rate = 0;
Jingning Han1a7f0a82017-07-27 09:48:05 -0700331 rd_stats->invalid_rate = 1;
Jingning Han3bce7542017-07-25 10:53:57 -0700332 rd_stats->ref_rdcost = INT64_MAX;
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700333#if CONFIG_RD_DEBUG
Imdad Sardharwallaaf8e2642018-01-19 11:46:34 +0000334 // This may run into problems when monochrome video is
335 // encoded, as there will only be 1 plane
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700336 for (plane = 0; plane < MAX_MB_PLANE; ++plane) {
337 rd_stats->txb_coeff_cost[plane] = INT_MAX;
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700338 {
339 int r, c;
340 for (r = 0; r < TXB_COEFF_COST_MAP_SIZE; ++r)
341 for (c = 0; c < TXB_COEFF_COST_MAP_SIZE; ++c)
342 rd_stats->txb_coeff_cost_map[plane][r][c] = INT_MAX;
343 }
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700344 }
345#endif
346}
347
348static INLINE void av1_merge_rd_stats(RD_STATS *rd_stats_dst,
349 const RD_STATS *rd_stats_src) {
350#if CONFIG_RD_DEBUG
351 int plane;
352#endif
353 rd_stats_dst->rate += rd_stats_src->rate;
Debargha Mukherjeede80e762017-11-30 13:58:56 -0800354 if (!rd_stats_dst->zero_rate)
355 rd_stats_dst->zero_rate = rd_stats_src->zero_rate;
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700356 rd_stats_dst->dist += rd_stats_src->dist;
357 rd_stats_dst->sse += rd_stats_src->sse;
358 rd_stats_dst->skip &= rd_stats_src->skip;
Jingning Han1a7f0a82017-07-27 09:48:05 -0700359 rd_stats_dst->invalid_rate &= rd_stats_src->invalid_rate;
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700360#if CONFIG_RD_DEBUG
Imdad Sardharwallaaf8e2642018-01-19 11:46:34 +0000361 // This may run into problems when monochrome video is
362 // encoded, as there will only be 1 plane
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700363 for (plane = 0; plane < MAX_MB_PLANE; ++plane) {
364 rd_stats_dst->txb_coeff_cost[plane] += rd_stats_src->txb_coeff_cost[plane];
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700365 {
366 // TODO(angiebird): optimize this part
367 int r, c;
368 int ref_txb_coeff_cost = 0;
369 for (r = 0; r < TXB_COEFF_COST_MAP_SIZE; ++r)
370 for (c = 0; c < TXB_COEFF_COST_MAP_SIZE; ++c) {
371 rd_stats_dst->txb_coeff_cost_map[plane][r][c] +=
372 rd_stats_src->txb_coeff_cost_map[plane][r][c];
373 ref_txb_coeff_cost += rd_stats_dst->txb_coeff_cost_map[plane][r][c];
374 }
375 assert(ref_txb_coeff_cost == rd_stats_dst->txb_coeff_cost[plane]);
376 }
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700377 }
378#endif
379}
Yaowu Xuc27fc142016-08-22 16:08:15 -0700380
Yaowu Xuabe52152017-10-20 14:37:54 -0700381static INLINE int av1_get_coeff_token_cost(int token, int8_t eob_val,
382 int is_first,
hui suc0cf71d2017-07-20 16:38:50 -0700383 const int *head_cost_table,
384 const int *tail_cost_table) {
Hui Su751a2332018-01-23 11:35:03 -0800385 if (eob_val == LAST_EOB) return av1_cost_literal(1);
hui suc0cf71d2017-07-20 16:38:50 -0700386 const int comb_symb = 2 * AOMMIN(token, TWO_TOKEN) - eob_val + is_first;
387 int cost = head_cost_table[comb_symb];
388 if (token > ONE_TOKEN) cost += tail_cost_table[token - TWO_TOKEN];
389 return cost;
390}
391
Yaowu Xuc27fc142016-08-22 16:08:15 -0700392struct TileInfo;
393struct TileDataEnc;
Yaowu Xuf883b422016-08-30 14:01:10 -0700394struct AV1_COMP;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700395struct macroblock;
396
Yaowu Xuf883b422016-08-30 14:01:10 -0700397int av1_compute_rd_mult(const struct AV1_COMP *cpi, int qindex);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700398
Yaowu Xuf883b422016-08-30 14:01:10 -0700399void av1_initialize_rd_consts(struct AV1_COMP *cpi);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700400
Yaowu Xuf883b422016-08-30 14:01:10 -0700401void av1_initialize_me_consts(const struct AV1_COMP *cpi, MACROBLOCK *x,
402 int qindex);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700403
Yaowu Xuf883b422016-08-30 14:01:10 -0700404void av1_model_rd_from_var_lapndz(int64_t var, unsigned int n,
405 unsigned int qstep, int *rate, int64_t *dist);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700406
Yue Chenb23d00a2017-07-28 17:01:21 -0700407int av1_get_switchable_rate(const AV1_COMMON *const cm, MACROBLOCK *x,
408 const MACROBLOCKD *xd);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700409
Yaowu Xuf883b422016-08-30 14:01:10 -0700410int av1_raster_block_offset(BLOCK_SIZE plane_bsize, int raster_block,
411 int stride);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700412
Yaowu Xuf883b422016-08-30 14:01:10 -0700413int16_t *av1_raster_block_offset_int16(BLOCK_SIZE plane_bsize, int raster_block,
414 int16_t *base);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700415
Yaowu Xuf883b422016-08-30 14:01:10 -0700416YV12_BUFFER_CONFIG *av1_get_scaled_ref_frame(const struct AV1_COMP *cpi,
417 int ref_frame);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700418
Yaowu Xuf883b422016-08-30 14:01:10 -0700419void av1_init_me_luts(void);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700420
Yaowu Xu4306b6e2016-09-27 12:55:32 -0700421void av1_set_mvcost(MACROBLOCK *x, MV_REFERENCE_FRAME ref_frame, int ref,
422 int ref_mv_idx);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700423
Yaowu Xuf883b422016-08-30 14:01:10 -0700424void av1_get_entropy_contexts(BLOCK_SIZE bsize, TX_SIZE tx_size,
425 const struct macroblockd_plane *pd,
426 ENTROPY_CONTEXT t_above[2 * MAX_MIB_SIZE],
427 ENTROPY_CONTEXT t_left[2 * MAX_MIB_SIZE]);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700428
Yaowu Xuf883b422016-08-30 14:01:10 -0700429void av1_set_rd_speed_thresholds(struct AV1_COMP *cpi);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700430
Yaowu Xuf883b422016-08-30 14:01:10 -0700431void av1_set_rd_speed_thresholds_sub8x8(struct AV1_COMP *cpi);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700432
Yaowu Xuf883b422016-08-30 14:01:10 -0700433void av1_update_rd_thresh_fact(const AV1_COMMON *const cm,
434 int (*fact)[MAX_MODES], int rd_thresh, int bsize,
435 int best_mode_index);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700436
Yaowu Xuc27fc142016-08-22 16:08:15 -0700437static INLINE int rd_less_than_thresh(int64_t best_rd, int thresh,
438 int thresh_fact) {
439 return best_rd < ((int64_t)thresh * thresh_fact >> 5) || thresh == INT_MAX;
440}
441
Urvang Joshi52648442016-10-13 17:27:51 -0700442void av1_mv_pred(const struct AV1_COMP *cpi, MACROBLOCK *x,
443 uint8_t *ref_y_buffer, int ref_y_stride, int ref_frame,
444 BLOCK_SIZE block_size);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700445
446static INLINE void set_error_per_bit(MACROBLOCK *x, int rdmult) {
447 x->errorperbit = rdmult >> RD_EPB_SHIFT;
448 x->errorperbit += (x->errorperbit == 0);
449}
450
Yaowu Xuf883b422016-08-30 14:01:10 -0700451void av1_setup_pred_block(const MACROBLOCKD *xd,
452 struct buf_2d dst[MAX_MB_PLANE],
453 const YV12_BUFFER_CONFIG *src, int mi_row, int mi_col,
454 const struct scale_factors *scale,
Imdad Sardharwallaaf8e2642018-01-19 11:46:34 +0000455 const struct scale_factors *scale_uv,
456 const int num_planes);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700457
Yaowu Xuf883b422016-08-30 14:01:10 -0700458int av1_get_intra_cost_penalty(int qindex, int qdelta,
459 aom_bit_depth_t bit_depth);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700460
Yue Chenb23d00a2017-07-28 17:01:21 -0700461void av1_fill_mode_rates(AV1_COMMON *const cm, MACROBLOCK *x,
462 FRAME_CONTEXT *fc);
463
Jingning Handfd72322017-08-09 14:04:12 -0700464#if CONFIG_LV_MAP
Imdad Sardharwallaaf8e2642018-01-19 11:46:34 +0000465void av1_fill_coeff_costs(MACROBLOCK *x, FRAME_CONTEXT *fc,
466 const int num_planes);
Jingning Handfd72322017-08-09 14:04:12 -0700467#endif
468
hui subd57abe2017-07-24 18:14:03 -0700469void av1_fill_token_costs_from_cdf(av1_coeff_cost *cost,
470 coeff_cdf_model (*cdf)[PLANE_TYPES]);
471
Yaowu Xuc27fc142016-08-22 16:08:15 -0700472#ifdef __cplusplus
473} // extern "C"
474#endif
475
Yaowu Xuf883b422016-08-30 14:01:10 -0700476#endif // AV1_ENCODER_RD_H_