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aomedia / avm / 9bc86c2bf0a7c5ceb224b70ff3d60442f1906eda / . / av1 / av1_dx.mk
blob: 1a54ea22a277c972910317c397aa3e63c377bf74 [file] [log] [blame]
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]1##
Yaowu Xu9c01aa12016-09-01 14:32:49 -0700[diff] [blame]2## Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]3##
Yaowu Xu9c01aa12016-09-01 14:32:49 -0700[diff] [blame]4## This source code is subject to the terms of the BSD 2 Clause License and
5## the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6## was not distributed with this source code in the LICENSE file, you can
7## obtain it at www.aomedia.org/license/software. If the Alliance for Open
8## Media Patent License 1.0 was not distributed with this source code in the
9## PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]10##
11
12AV1_DX_EXPORTS += exports_dec
13
14AV1_DX_SRCS-yes += $(AV1_COMMON_SRCS-yes)
15AV1_DX_SRCS-no += $(AV1_COMMON_SRCS-no)
16AV1_DX_SRCS_REMOVE-yes += $(AV1_COMMON_SRCS_REMOVE-yes)
17AV1_DX_SRCS_REMOVE-no += $(AV1_COMMON_SRCS_REMOVE-no)
18
19AV1_DX_SRCS-yes += av1_dx_iface.c
20
21AV1_DX_SRCS-yes += decoder/decodemv.c
22AV1_DX_SRCS-yes += decoder/decodeframe.c
23AV1_DX_SRCS-yes += decoder/decodeframe.h
24AV1_DX_SRCS-yes += decoder/detokenize.c
25AV1_DX_SRCS-yes += decoder/decodemv.h
Angie Chiangcea11f22017-02-24 12:30:40 -0800[diff] [blame]26AV1_DX_SRCS-$(CONFIG_LV_MAP) += decoder/decodetxb.c
27AV1_DX_SRCS-$(CONFIG_LV_MAP) += decoder/decodetxb.h
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]28AV1_DX_SRCS-yes += decoder/detokenize.h
29AV1_DX_SRCS-yes += decoder/dthread.c
30AV1_DX_SRCS-yes += decoder/dthread.h
31AV1_DX_SRCS-yes += decoder/decoder.c
32AV1_DX_SRCS-yes += decoder/decoder.h
33AV1_DX_SRCS-yes += decoder/dsubexp.c
34AV1_DX_SRCS-yes += decoder/dsubexp.h
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]35
Luc Trudeau83fbd572017-04-21 11:24:34 -0400[diff] [blame]36ifeq ($(CONFIG_ACCOUNTING),yes)
37AV1_DX_SRCS-yes += decoder/accounting.h
38AV1_DX_SRCS-yes += decoder/accounting.c
39endif
40
Nathan E. Egge2cf03b12017-02-22 16:19:59 -0500[diff] [blame]41ifeq ($(CONFIG_INSPECTION),yes)
42AV1_DX_SRCS-yes += decoder/inspection.c
43AV1_DX_SRCS-yes += decoder/inspection.h
44endif
45
Yushin Cho77bba8d2016-11-04 16:36:56 -0700[diff] [blame]46ifeq ($(CONFIG_PVQ),yes)
47# PVQ from daala
48AV1_DX_SRCS-yes += decoder/pvq_decoder.c
49AV1_DX_SRCS-yes += decoder/pvq_decoder.h
50AV1_DX_SRCS-yes += decoder/decint.h
51AV1_DX_SRCS-yes += decoder/generic_decoder.c
52AV1_DX_SRCS-yes += decoder/laplace_decoder.c
53AV1_DX_SRCS-yes += encoder/hybrid_fwd_txfm.c
54AV1_DX_SRCS-yes += encoder/hybrid_fwd_txfm.h
55
56AV1_DX_SRCS-yes += encoder/dct.c
57AV1_DX_SRCS-$(HAVE_SSE2) += encoder/x86/dct_sse2.asm
58AV1_DX_SRCS-$(HAVE_SSE2) += encoder/x86/dct_intrin_sse2.c
59AV1_DX_SRCS-$(HAVE_SSSE3) += encoder/x86/dct_ssse3.c
60
Sebastien Alaiwan71e87842017-04-12 16:03:28 +0200[diff] [blame]61ifneq ($(CONFIG_HIGHBITDEPTH),yes)
Yushin Cho77bba8d2016-11-04 16:36:56 -0700[diff] [blame]62AV1_DX_SRCS-$(HAVE_NEON) += encoder/arm/neon/dct_neon.c
63endif
64
65AV1_DX_SRCS-$(HAVE_MSA) += encoder/mips/msa/fdct4x4_msa.c
66AV1_DX_SRCS-$(HAVE_MSA) += encoder/mips/msa/fdct8x8_msa.c
67AV1_DX_SRCS-$(HAVE_MSA) += encoder/mips/msa/fdct16x16_msa.c
68AV1_DX_SRCS-$(HAVE_MSA) += encoder/mips/msa/fdct_msa.h
69endif
70
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]71AV1_DX_SRCS-yes := $(filter-out $(AV1_DX_SRCS_REMOVE-yes),$(AV1_DX_SRCS-yes))