Steinar Midtskogen | a5f8ea1 | 2016-08-03 13:17:33 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016, Alliance for Open Media. All rights reserved |
| 3 | * |
| 4 | * This source code is subject to the terms of the BSD 2 Clause License and |
| 5 | * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License |
| 6 | * was not distributed with this source code in the LICENSE file, you can |
| 7 | * obtain it at www.aomedia.org/license/software. If the Alliance for Open |
| 8 | * Media Patent License 1.0 was not distributed with this source code in the |
| 9 | * PATENTS file, you can obtain it at www.aomedia.org/license/patent. |
| 10 | */ |
| 11 | |
| 12 | #ifndef _V64_INTRINSICS_H |
| 13 | #define _V64_INTRINSICS_H |
| 14 | |
| 15 | #include <stdio.h> |
| 16 | #include <stdlib.h> |
| 17 | #include "./v64_intrinsics_c.h" |
| 18 | |
| 19 | /* Fallback to plain, unoptimised C. */ |
| 20 | |
| 21 | typedef c_v64 v64; |
| 22 | |
| 23 | SIMD_INLINE uint32_t v64_low_u32(v64 a) { return c_v64_low_u32(a); } |
| 24 | SIMD_INLINE uint32_t v64_high_u32(v64 a) { return c_v64_high_u32(a); } |
| 25 | SIMD_INLINE int32_t v64_low_s32(v64 a) { return c_v64_low_s32(a); } |
| 26 | SIMD_INLINE int32_t v64_high_s32(v64 a) { return c_v64_high_s32(a); } |
| 27 | SIMD_INLINE v64 v64_from_32(uint32_t x, uint32_t y) { |
| 28 | return c_v64_from_32(x, y); |
| 29 | } |
| 30 | SIMD_INLINE v64 v64_from_64(uint64_t x) { return c_v64_from_64(x); } |
| 31 | SIMD_INLINE uint64_t v64_u64(v64 x) { return c_v64_u64(x); } |
| 32 | SIMD_INLINE v64 v64_from_16(uint16_t a, uint16_t b, uint16_t c, uint16_t d) { |
| 33 | return c_v64_from_16(a, b, c, d); |
| 34 | } |
| 35 | |
| 36 | SIMD_INLINE uint32_t u32_load_unaligned(const void *p) { |
| 37 | return c_u32_load_unaligned(p); |
| 38 | } |
| 39 | SIMD_INLINE uint32_t u32_load_aligned(const void *p) { |
| 40 | return c_u32_load_aligned(p); |
| 41 | } |
| 42 | SIMD_INLINE void u32_store_unaligned(void *p, uint32_t a) { |
| 43 | c_u32_store_unaligned(p, a); |
| 44 | } |
| 45 | SIMD_INLINE void u32_store_aligned(void *p, uint32_t a) { |
| 46 | c_u32_store_aligned(p, a); |
| 47 | } |
| 48 | |
| 49 | SIMD_INLINE v64 v64_load_unaligned(const void *p) { |
| 50 | return c_v64_load_unaligned(p); |
| 51 | } |
| 52 | SIMD_INLINE v64 v64_load_aligned(const void *p) { |
| 53 | return c_v64_load_aligned(p); |
| 54 | } |
| 55 | |
| 56 | SIMD_INLINE void v64_store_unaligned(void *p, v64 a) { |
| 57 | c_v64_store_unaligned(p, a); |
| 58 | } |
| 59 | SIMD_INLINE void v64_store_aligned(void *p, v64 a) { |
| 60 | c_v64_store_aligned(p, a); |
| 61 | } |
| 62 | |
| 63 | SIMD_INLINE v64 v64_align(v64 a, v64 b, const unsigned int c) { |
| 64 | return c_v64_align(a, b, c); |
| 65 | } |
| 66 | |
| 67 | SIMD_INLINE v64 v64_zero() { return c_v64_zero(); } |
| 68 | SIMD_INLINE v64 v64_dup_8(uint8_t x) { return c_v64_dup_8(x); } |
| 69 | SIMD_INLINE v64 v64_dup_16(uint16_t x) { return c_v64_dup_16(x); } |
| 70 | SIMD_INLINE v64 v64_dup_32(uint32_t x) { return c_v64_dup_32(x); } |
| 71 | |
| 72 | SIMD_INLINE v64 v64_add_8(v64 a, v64 b) { return c_v64_add_8(a, b); } |
| 73 | SIMD_INLINE v64 v64_add_16(v64 a, v64 b) { return c_v64_add_16(a, b); } |
| 74 | SIMD_INLINE v64 v64_sadd_s16(v64 a, v64 b) { return c_v64_sadd_s16(a, b); } |
| 75 | SIMD_INLINE v64 v64_add_32(v64 a, v64 b) { return c_v64_add_32(a, b); } |
| 76 | SIMD_INLINE v64 v64_sub_8(v64 a, v64 b) { return c_v64_sub_8(a, b); } |
| 77 | SIMD_INLINE v64 v64_ssub_u8(v64 a, v64 b) { return c_v64_ssub_u8(a, b); } |
| 78 | SIMD_INLINE v64 v64_ssub_s8(v64 a, v64 b) { return c_v64_ssub_s8(a, b); } |
| 79 | SIMD_INLINE v64 v64_sub_16(v64 a, v64 b) { return c_v64_sub_16(a, b); } |
| 80 | SIMD_INLINE v64 v64_ssub_s16(v64 a, v64 b) { return c_v64_ssub_s16(a, b); } |
| 81 | SIMD_INLINE v64 v64_sub_32(v64 a, v64 b) { return c_v64_sub_32(a, b); } |
| 82 | SIMD_INLINE v64 v64_abs_s16(v64 a) { return c_v64_abs_s16(a); } |
| 83 | |
| 84 | SIMD_INLINE v64 v64_ziplo_8(v64 a, v64 b) { return c_v64_ziplo_8(a, b); } |
| 85 | SIMD_INLINE v64 v64_ziphi_8(v64 a, v64 b) { return c_v64_ziphi_8(a, b); } |
| 86 | SIMD_INLINE v64 v64_ziplo_16(v64 a, v64 b) { return c_v64_ziplo_16(a, b); } |
| 87 | SIMD_INLINE v64 v64_ziphi_16(v64 a, v64 b) { return c_v64_ziphi_16(a, b); } |
| 88 | SIMD_INLINE v64 v64_ziplo_32(v64 a, v64 b) { return c_v64_ziplo_32(a, b); } |
| 89 | SIMD_INLINE v64 v64_ziphi_32(v64 a, v64 b) { return c_v64_ziphi_32(a, b); } |
| 90 | SIMD_INLINE v64 v64_unziplo_8(v64 a, v64 b) { return c_v64_unziplo_8(a, b); } |
| 91 | SIMD_INLINE v64 v64_unziphi_8(v64 a, v64 b) { return c_v64_unziphi_8(a, b); } |
| 92 | SIMD_INLINE v64 v64_unziplo_16(v64 a, v64 b) { return c_v64_unziplo_16(a, b); } |
| 93 | SIMD_INLINE v64 v64_unziphi_16(v64 a, v64 b) { return c_v64_unziphi_16(a, b); } |
| 94 | SIMD_INLINE v64 v64_unpacklo_u8_s16(v64 a) { return c_v64_unpacklo_u8_s16(a); } |
| 95 | SIMD_INLINE v64 v64_unpackhi_u8_s16(v64 a) { return c_v64_unpackhi_u8_s16(a); } |
| 96 | SIMD_INLINE v64 v64_pack_s32_s16(v64 a, v64 b) { |
| 97 | return c_v64_pack_s32_s16(a, b); |
| 98 | } |
| 99 | SIMD_INLINE v64 v64_pack_s16_u8(v64 a, v64 b) { |
| 100 | return c_v64_pack_s16_u8(a, b); |
| 101 | } |
| 102 | SIMD_INLINE v64 v64_pack_s16_s8(v64 a, v64 b) { |
| 103 | return c_v64_pack_s16_s8(a, b); |
| 104 | } |
| 105 | SIMD_INLINE v64 v64_unpacklo_u16_s32(v64 a) { |
| 106 | return c_v64_unpacklo_u16_s32(a); |
| 107 | } |
| 108 | SIMD_INLINE v64 v64_unpacklo_s16_s32(v64 a) { |
| 109 | return c_v64_unpacklo_s16_s32(a); |
| 110 | } |
| 111 | SIMD_INLINE v64 v64_unpackhi_u16_s32(v64 a) { |
| 112 | return c_v64_unpackhi_u16_s32(a); |
| 113 | } |
| 114 | SIMD_INLINE v64 v64_unpackhi_s16_s32(v64 a) { |
| 115 | return c_v64_unpackhi_s16_s32(a); |
| 116 | } |
| 117 | SIMD_INLINE v64 v64_shuffle_8(v64 a, v64 pattern) { |
| 118 | return c_v64_shuffle_8(a, pattern); |
| 119 | } |
| 120 | |
| 121 | typedef uint32_t sad64_internal; |
| 122 | SIMD_INLINE sad64_internal v64_sad_u8_init() { return c_v64_sad_u8_init(); } |
| 123 | SIMD_INLINE sad64_internal v64_sad_u8(sad64_internal s, v64 a, v64 b) { |
| 124 | return c_v64_sad_u8(s, a, b); |
| 125 | } |
| 126 | SIMD_INLINE uint32_t v64_sad_u8_sum(sad64_internal s) { |
| 127 | return c_v64_sad_u8_sum(s); |
| 128 | } |
| 129 | typedef uint32_t ssd64_internal; |
| 130 | SIMD_INLINE ssd64_internal v64_ssd_u8_init() { return c_v64_ssd_u8_init(); } |
| 131 | SIMD_INLINE ssd64_internal v64_ssd_u8(ssd64_internal s, v64 a, v64 b) { |
| 132 | return c_v64_ssd_u8(s, a, b); |
| 133 | } |
| 134 | SIMD_INLINE uint32_t v64_ssd_u8_sum(ssd64_internal s) { |
| 135 | return c_v64_ssd_u8_sum(s); |
| 136 | } |
| 137 | SIMD_INLINE int64_t v64_dotp_su8(v64 a, v64 b) { return c_v64_dotp_su8(a, b); } |
| 138 | SIMD_INLINE int64_t v64_dotp_s16(v64 a, v64 b) { return c_v64_dotp_s16(a, b); } |
| 139 | SIMD_INLINE uint64_t v64_hadd_u8(v64 a) { return c_v64_hadd_u8(a); } |
| 140 | SIMD_INLINE int64_t v64_hadd_s16(v64 a) { return c_v64_hadd_s16(a); } |
| 141 | |
| 142 | SIMD_INLINE v64 v64_or(v64 a, v64 b) { return c_v64_or(a, b); } |
| 143 | SIMD_INLINE v64 v64_xor(v64 a, v64 b) { return c_v64_xor(a, b); } |
| 144 | SIMD_INLINE v64 v64_and(v64 a, v64 b) { return c_v64_and(a, b); } |
| 145 | SIMD_INLINE v64 v64_andn(v64 a, v64 b) { return c_v64_andn(a, b); } |
| 146 | |
| 147 | SIMD_INLINE v64 v64_mullo_s16(v64 a, v64 b) { return c_v64_mullo_s16(a, b); } |
| 148 | SIMD_INLINE v64 v64_mulhi_s16(v64 a, v64 b) { return c_v64_mulhi_s16(a, b); } |
| 149 | SIMD_INLINE v64 v64_mullo_s32(v64 a, v64 b) { return c_v64_mullo_s32(a, b); } |
| 150 | SIMD_INLINE v64 v64_madd_s16(v64 a, v64 b) { return c_v64_madd_s16(a, b); } |
| 151 | SIMD_INLINE v64 v64_madd_us8(v64 a, v64 b) { return c_v64_madd_us8(a, b); } |
| 152 | |
| 153 | SIMD_INLINE v64 v64_avg_u8(v64 a, v64 b) { return c_v64_avg_u8(a, b); } |
| 154 | SIMD_INLINE v64 v64_rdavg_u8(v64 a, v64 b) { return c_v64_rdavg_u8(a, b); } |
| 155 | SIMD_INLINE v64 v64_avg_u16(v64 a, v64 b) { return c_v64_avg_u16(a, b); } |
| 156 | SIMD_INLINE v64 v64_min_u8(v64 a, v64 b) { return c_v64_min_u8(a, b); } |
| 157 | SIMD_INLINE v64 v64_max_u8(v64 a, v64 b) { return c_v64_max_u8(a, b); } |
| 158 | SIMD_INLINE v64 v64_min_s8(v64 a, v64 b) { return c_v64_min_s8(a, b); } |
| 159 | SIMD_INLINE v64 v64_max_s8(v64 a, v64 b) { return c_v64_max_s8(a, b); } |
| 160 | SIMD_INLINE v64 v64_min_s16(v64 a, v64 b) { return c_v64_min_s16(a, b); } |
| 161 | SIMD_INLINE v64 v64_max_s16(v64 a, v64 b) { return c_v64_max_s16(a, b); } |
| 162 | |
| 163 | SIMD_INLINE v64 v64_cmpgt_s8(v64 a, v64 b) { return c_v64_cmpgt_s8(a, b); } |
| 164 | SIMD_INLINE v64 v64_cmplt_s8(v64 a, v64 b) { return c_v64_cmplt_s8(a, b); } |
| 165 | SIMD_INLINE v64 v64_cmpeq_8(v64 a, v64 b) { return c_v64_cmpeq_8(a, b); } |
| 166 | SIMD_INLINE v64 v64_cmpgt_s16(v64 a, v64 b) { return c_v64_cmpgt_s16(a, b); } |
| 167 | SIMD_INLINE v64 v64_cmplt_s16(v64 a, v64 b) { return c_v64_cmplt_s16(a, b); } |
| 168 | SIMD_INLINE v64 v64_cmpeq_16(v64 a, v64 b) { return c_v64_cmpeq_16(a, b); } |
| 169 | |
| 170 | SIMD_INLINE v64 v64_shl_8(v64 a, unsigned int n) { return c_v64_shl_8(a, n); } |
| 171 | SIMD_INLINE v64 v64_shr_u8(v64 a, unsigned int n) { return c_v64_shr_u8(a, n); } |
| 172 | SIMD_INLINE v64 v64_shr_s8(v64 a, unsigned int n) { return c_v64_shr_s8(a, n); } |
| 173 | SIMD_INLINE v64 v64_shl_16(v64 a, unsigned int n) { return c_v64_shl_16(a, n); } |
| 174 | SIMD_INLINE v64 v64_shr_u16(v64 a, unsigned int n) { |
| 175 | return c_v64_shr_u16(a, n); |
| 176 | } |
| 177 | SIMD_INLINE v64 v64_shr_s16(v64 a, unsigned int n) { |
| 178 | return c_v64_shr_s16(a, n); |
| 179 | } |
| 180 | SIMD_INLINE v64 v64_shl_32(v64 a, unsigned int n) { return c_v64_shl_32(a, n); } |
| 181 | SIMD_INLINE v64 v64_shr_u32(v64 a, unsigned int n) { |
| 182 | return c_v64_shr_u32(a, n); |
| 183 | } |
| 184 | SIMD_INLINE v64 v64_shr_s32(v64 a, unsigned int n) { |
| 185 | return c_v64_shr_s32(a, n); |
| 186 | } |
| 187 | SIMD_INLINE v64 v64_shr_n_byte(v64 a, const unsigned int n) { |
| 188 | return c_v64_shr_n_byte(a, n); |
| 189 | } |
| 190 | SIMD_INLINE v64 v64_shl_n_byte(v64 a, const unsigned int n) { |
| 191 | return c_v64_shl_n_byte(a, n); |
| 192 | } |
| 193 | SIMD_INLINE v64 v64_shl_n_8(v64 a, const unsigned int c) { |
| 194 | return c_v64_shl_n_8(a, c); |
| 195 | } |
| 196 | SIMD_INLINE v64 v64_shr_n_u8(v64 a, const unsigned int c) { |
| 197 | return c_v64_shr_n_u8(a, c); |
| 198 | } |
| 199 | SIMD_INLINE v64 v64_shr_n_s8(v64 a, const unsigned int c) { |
| 200 | return c_v64_shr_n_s8(a, c); |
| 201 | } |
| 202 | SIMD_INLINE v64 v64_shl_n_16(v64 a, const unsigned int c) { |
| 203 | return c_v64_shl_n_16(a, c); |
| 204 | } |
| 205 | SIMD_INLINE v64 v64_shr_n_u16(v64 a, const unsigned int c) { |
| 206 | return c_v64_shr_n_u16(a, c); |
| 207 | } |
| 208 | SIMD_INLINE v64 v64_shr_n_s16(v64 a, const unsigned int c) { |
| 209 | return c_v64_shr_n_s16(a, c); |
| 210 | } |
| 211 | SIMD_INLINE v64 v64_shl_n_32(v64 a, const unsigned int c) { |
| 212 | return c_v64_shl_n_32(a, c); |
| 213 | } |
| 214 | SIMD_INLINE v64 v64_shr_n_u32(v64 a, const unsigned int c) { |
| 215 | return c_v64_shr_n_u32(a, c); |
| 216 | } |
| 217 | SIMD_INLINE v64 v64_shr_n_s32(v64 a, const unsigned int c) { |
| 218 | return c_v64_shr_n_s32(a, c); |
| 219 | } |
| 220 | |
| 221 | #endif /* _V64_INTRINSICS_H */ |