blob: 469fd8ed235c549f473c9ab83e1aada55d9c8891 [file] [log] [blame]
Steinar Midtskogena5f8ea12016-08-03 13:17:33 +02001/*
2 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
3 *
4 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
10 */
11
Steinar Midtskogenc38afed2016-10-18 08:04:28 +020012#ifndef AOM_DSP_AOM_AOM_SIMD_H_
13#define AOM_DSP_AOM_AOM_SIMD_H_
Steinar Midtskogena5f8ea12016-08-03 13:17:33 +020014
15#include <stdint.h>
16
17#if defined(_WIN32)
18#include <intrin.h>
19#endif
20
21#include "./aom_config.h"
Steinar Midtskogenc38afed2016-10-18 08:04:28 +020022#include "./aom_simd_inline.h"
Steinar Midtskogena5f8ea12016-08-03 13:17:33 +020023
Steinar Midtskogenea42c4e2016-12-12 09:40:34 +010024#define SIMD_CHECK 1 // Sanity checks in C equivalents
25
Steinar Midtskogena5f8ea12016-08-03 13:17:33 +020026#if HAVE_NEON
Steinar Midtskogen045d4132016-10-18 12:20:05 +020027#include "simd/v256_intrinsics_arm.h"
Steinar Midtskogend954f2d2016-12-13 15:21:53 +010028// VS compiling for 32 bit targets does not support vector types in
29// structs as arguments, which makes the v256 type of the intrinsics
30// hard to support, so optimizations for this target are disabled.
31#elif HAVE_SSE2 && (defined(_WIN64) || !defined(_MSC_VER) || defined(__clang__))
Steinar Midtskogen045d4132016-10-18 12:20:05 +020032#include "simd/v256_intrinsics_x86.h"
Steinar Midtskogena5f8ea12016-08-03 13:17:33 +020033#else
Steinar Midtskogen045d4132016-10-18 12:20:05 +020034#include "simd/v256_intrinsics.h"
Steinar Midtskogena5f8ea12016-08-03 13:17:33 +020035#endif
36
Steinar Midtskogenc38afed2016-10-18 08:04:28 +020037#endif // AOM_DSP_AOM_AOM_SIMD_H_