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Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_ENCODER_BLOCK_H_
13#define AV1_ENCODER_BLOCK_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
15#include "av1/common/entropymv.h"
16#include "av1/common/entropy.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070017#include "av1/common/mvref_common.h"
Hui Su1ddf2312017-08-19 15:21:34 -070018#include "av1/encoder/hash.h"
Yushin Cho55104332017-08-14 16:15:43 -070019#if CONFIG_DIST_8X8
20#include "aom/aomcx.h"
21#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070022
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27typedef struct {
28 unsigned int sse;
29 int sum;
30 unsigned int var;
Urvang Joshi454280d2016-10-14 16:51:44 -070031} DIFF;
Yaowu Xuc27fc142016-08-22 16:08:15 -070032
33typedef struct macroblock_plane {
34 DECLARE_ALIGNED(16, int16_t, src_diff[MAX_SB_SQUARE]);
35 tran_low_t *qcoeff;
36 tran_low_t *coeff;
37 uint16_t *eobs;
Angie Chiang74e23072017-03-24 14:54:23 -070038#if CONFIG_LV_MAP
39 uint8_t *txb_entropy_ctx;
40#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070041 struct buf_2d src;
42
43 // Quantizer setings
Monty Montgomery125c0fc2017-10-26 00:44:35 -040044 // These are used/accessed only in the quantization process
45 // RDO does not / must not depend on any of these values
46 // All values below share the coefficient scale/shift used in TX
47 const int16_t *quant_fp_QTX;
48 const int16_t *round_fp_QTX;
49 const int16_t *quant_QTX;
50 const int16_t *quant_shift_QTX;
51 const int16_t *zbin_QTX;
52 const int16_t *round_QTX;
53 const int16_t *dequant_QTX;
Yaowu Xuc27fc142016-08-22 16:08:15 -070054#if CONFIG_NEW_QUANT
Debargha Mukherjee50e9a1e2018-01-17 17:33:34 -080055 const cuml_bins_type_nuq *cuml_bins_nuq[X0_PROFILES];
Monty Montgomery125c0fc2017-10-26 00:44:35 -040056 const dequant_val_type_nuq *dequant_val_nuq_QTX[QUANT_PROFILES];
Yaowu Xuc27fc142016-08-22 16:08:15 -070057#endif // CONFIG_NEW_QUANT
Yaowu Xuc27fc142016-08-22 16:08:15 -070058} MACROBLOCK_PLANE;
59
hui suc0cf71d2017-07-20 16:38:50 -070060typedef int av1_coeff_cost[PLANE_TYPES][REF_TYPES][COEF_BANDS][COEFF_CONTEXTS]
61 [TAIL_TOKENS];
Yaowu Xuc27fc142016-08-22 16:08:15 -070062
Jingning Handfd72322017-08-09 14:04:12 -070063#if CONFIG_LV_MAP
64typedef struct {
65 int txb_skip_cost[TXB_SKIP_CONTEXTS][2];
Dake He3fe369c2017-11-16 17:56:44 -080066 int base_eob_cost[SIG_COEF_CONTEXTS_EOB][3];
Ola Hugosson13892102017-11-06 08:01:44 +010067 int base_cost[SIG_COEF_CONTEXTS][4];
Angie Chiang7ab884e2017-10-18 15:57:12 -070068 int eob_extra_cost[EOB_COEF_CONTEXTS][2];
Jingning Handfd72322017-08-09 14:04:12 -070069 int dc_sign_cost[DC_SIGN_CONTEXTS][2];
Angie Chiang26d3e452017-09-29 17:40:02 -070070 int lps_cost[LEVEL_CONTEXTS][COEFF_BASE_RANGE + 1];
Jingning Handfd72322017-08-09 14:04:12 -070071} LV_MAP_COEFF_COST;
Jingning Hanf5a4d3b2017-08-27 23:01:19 -070072
Johannb0ef6ff2018-02-08 14:32:21 -080073typedef struct {
74 int eob_cost[2][11];
75} LV_MAP_EOB_COST;
Dake He0db7d0e2017-12-21 15:23:20 -080076
Jingning Hanf5a4d3b2017-08-27 23:01:19 -070077typedef struct {
78 tran_low_t tcoeff[MAX_MB_PLANE][MAX_SB_SQUARE];
79 uint16_t eobs[MAX_MB_PLANE][MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
80 uint8_t txb_skip_ctx[MAX_MB_PLANE]
81 [MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
82 int dc_sign_ctx[MAX_MB_PLANE]
83 [MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
84} CB_COEFF_BUFFER;
Jingning Handfd72322017-08-09 14:04:12 -070085#endif
86
Yaowu Xuc27fc142016-08-22 16:08:15 -070087typedef struct {
88 int_mv ref_mvs[MODE_CTX_REF_FRAMES][MAX_MV_REF_CANDIDATES];
89 int16_t mode_context[MODE_CTX_REF_FRAMES];
Angie Chiangf0fbf9d2017-03-15 15:01:22 -070090#if CONFIG_LV_MAP
Angie Chiangc484abe2017-03-20 15:43:11 -070091 // TODO(angiebird): Reduce the buffer size according to sb_type
Jingning Hanf5a4d3b2017-08-27 23:01:19 -070092 tran_low_t *tcoeff[MAX_MB_PLANE];
93 uint16_t *eobs[MAX_MB_PLANE];
94 uint8_t *txb_skip_ctx[MAX_MB_PLANE];
95 int *dc_sign_ctx[MAX_MB_PLANE];
Angie Chiangf0fbf9d2017-03-15 15:01:22 -070096#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070097 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
98 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -070099 int16_t compound_mode_context[MODE_CTX_REF_FRAMES];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700100} MB_MODE_INFO_EXT;
101
Alex Converse0fa0f422017-04-24 12:51:14 -0700102typedef struct {
103 int col_min;
104 int col_max;
105 int row_min;
106 int row_max;
107} MvLimits;
108
Yaowu Xuc27fc142016-08-22 16:08:15 -0700109typedef struct {
Hui Su473cf892017-11-08 18:14:31 -0800110 uint8_t best_palette_color_map[MAX_PALETTE_SQUARE];
Hui Su5891f982017-12-18 16:18:23 -0800111 int kmeans_data_buf[2 * MAX_PALETTE_SQUARE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700112} PALETTE_BUFFER;
113
Hui Su1ddf2312017-08-19 15:21:34 -0700114typedef struct {
115 TX_TYPE tx_type;
116 TX_SIZE tx_size;
Hui Su1ddf2312017-08-19 15:21:34 -0700117 TX_SIZE min_tx_size;
Hui Su7167d952018-02-01 16:33:12 -0800118 TX_SIZE inter_tx_size[INTER_TX_SIZE_BUF_LEN];
Hui Su1ddf2312017-08-19 15:21:34 -0700119 uint8_t blk_skip[MAX_MIB_SIZE * MAX_MIB_SIZE * 8];
Hui Su1ddf2312017-08-19 15:21:34 -0700120#if CONFIG_TXK_SEL
121 TX_TYPE txk_type[MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
122#endif // CONFIG_TXK_SEL
123 RD_STATS rd_stats;
124 uint32_t hash_value;
125} TX_RD_INFO;
126
127#define RD_RECORD_BUFFER_LEN 8
128typedef struct {
129 TX_RD_INFO tx_rd_info[RD_RECORD_BUFFER_LEN]; // Circular buffer.
130 int index_start;
131 int num;
132 CRC_CALCULATOR crc_calculator; // Hash function.
133} TX_RD_RECORD;
134
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700135typedef struct {
136 int64_t dist;
Jingning Han73bc2aa2018-02-02 14:31:39 -0800137 int64_t sse;
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700138 int rate;
Hui Su8c2b9132017-12-09 10:40:15 -0800139 uint16_t eob;
Jingning Han45027c62017-12-11 11:47:15 -0800140#if CONFIG_LV_MAP
Jingning Han73bc2aa2018-02-02 14:31:39 -0800141#if CONFIG_TXK_SEL
142 TX_TYPE tx_type;
143#endif
Jingning Han45027c62017-12-11 11:47:15 -0800144 uint16_t entropy_context;
Jingning Hand7e99112017-12-13 09:47:45 -0800145 uint8_t txb_entropy_ctx;
Jingning Han45027c62017-12-11 11:47:15 -0800146#else
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700147 uint8_t entropy_context;
Jingning Han45027c62017-12-11 11:47:15 -0800148#endif
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700149 uint8_t valid;
Hui Su950b9122018-02-03 10:21:40 -0800150 uint8_t fast; // This is not being used now.
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700151} TX_SIZE_RD_INFO;
152
153#define TX_SIZE_RD_RECORD_BUFFER_LEN 256
154typedef struct {
155 uint32_t hash_vals[TX_SIZE_RD_RECORD_BUFFER_LEN];
Jingning Han73bc2aa2018-02-02 14:31:39 -0800156#if CONFIG_TXK_SEL
157 TX_SIZE_RD_INFO tx_rd_info[TX_SIZE_RD_RECORD_BUFFER_LEN];
158#else
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700159 TX_SIZE_RD_INFO tx_rd_info[TX_SIZE_RD_RECORD_BUFFER_LEN][TX_TYPES];
Jingning Han73bc2aa2018-02-02 14:31:39 -0800160#endif
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700161 int index_start;
162 int num;
163} TX_SIZE_RD_RECORD;
164
165typedef struct tx_size_rd_info_node {
166 TX_SIZE_RD_INFO *rd_info_array; // Points to array of size TX_TYPES.
167 struct tx_size_rd_info_node *children[4];
168} TX_SIZE_RD_INFO_NODE;
169
Yaowu Xuc27fc142016-08-22 16:08:15 -0700170typedef struct macroblock MACROBLOCK;
171struct macroblock {
172 struct macroblock_plane plane[MAX_MB_PLANE];
173
Hui Su1ddf2312017-08-19 15:21:34 -0700174 // Save the transform RD search info.
175 TX_RD_RECORD tx_rd_record;
176
Jingning Han66965a22018-01-25 09:53:41 -0800177 // Determine if one would go with reduced complexity transform block
178 // search model to select prediction modes, or full complexity model
179 // to select transform kernel.
Jingning Handd8600f2018-01-23 09:06:32 -0800180 int rd_model;
181
Jingning Han4489c262018-01-26 16:43:59 -0800182 // Indicate if the encoder is running in the first pass partition search.
183 // In that case, apply certain speed features therein to reduce the overhead
184 // cost in the first pass search.
Jingning Hanc58ccc32018-01-26 07:46:38 -0800185 int cb_partition_scan;
186
Jingning Han4489c262018-01-26 16:43:59 -0800187 // Activate constrained coding block partition search range.
188 int use_cb_search_range;
189
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700190 // Also save RD info on the TX size search level for square TX sizes.
191 TX_SIZE_RD_RECORD
192 tx_size_rd_record_8X8[(MAX_MIB_SIZE >> 1) * (MAX_MIB_SIZE >> 1)];
193 TX_SIZE_RD_RECORD
194 tx_size_rd_record_16X16[(MAX_MIB_SIZE >> 2) * (MAX_MIB_SIZE >> 2)];
195 TX_SIZE_RD_RECORD
196 tx_size_rd_record_32X32[(MAX_MIB_SIZE >> 3) * (MAX_MIB_SIZE >> 3)];
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700197 TX_SIZE_RD_RECORD
198 tx_size_rd_record_64X64[(MAX_MIB_SIZE >> 4) * (MAX_MIB_SIZE >> 4)];
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700199
Yaowu Xuc27fc142016-08-22 16:08:15 -0700200 MACROBLOCKD e_mbd;
201 MB_MODE_INFO_EXT *mbmi_ext;
202 int skip_block;
David Barkerd7d78c82016-10-24 10:55:35 +0100203 int qindex;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700204
205 // The equivalent error at the current rdmult of one whole bit (not one
206 // bitcost unit).
207 int errorperbit;
208 // The equivalend SAD error of one (whole) bit at the current quantizer
209 // for large blocks.
210 int sadperbit16;
211 // The equivalend SAD error of one (whole) bit at the current quantizer
212 // for sub-8x8 blocks.
213 int sadperbit4;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700214 int rdmult;
215 int mb_energy;
216 int *m_search_count_ptr;
217 int *ex_search_count_ptr;
218
Jingning Han9777afc2016-10-20 15:17:43 -0700219 unsigned int txb_split_count;
Jingning Han9777afc2016-10-20 15:17:43 -0700220
Yaowu Xuc27fc142016-08-22 16:08:15 -0700221 // These are set to their default values at the beginning, and then adjusted
222 // further in the encoding process.
223 BLOCK_SIZE min_partition_size;
224 BLOCK_SIZE max_partition_size;
225
226 int mv_best_ref_index[TOTAL_REFS_PER_FRAME];
227 unsigned int max_mv_context[TOTAL_REFS_PER_FRAME];
228 unsigned int source_variance;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700229 unsigned int pred_sse[TOTAL_REFS_PER_FRAME];
230 int pred_mv_sad[TOTAL_REFS_PER_FRAME];
231
Yaowu Xuc27fc142016-08-22 16:08:15 -0700232 int *nmvjointcost;
233 int nmv_vec_cost[NMV_CONTEXTS][MV_JOINTS];
234 int *nmvcost[NMV_CONTEXTS][2];
235 int *nmvcost_hp[NMV_CONTEXTS][2];
236 int **mv_cost_stack[NMV_CONTEXTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700237 int **mvcost;
Alex Conversea127a792017-05-23 15:27:21 -0700238
Yue Chene9638cc2016-10-10 12:37:54 -0700239 int32_t *wsrc_buf;
240 int32_t *mask_buf;
Jingning Hand064cf02017-06-01 10:00:39 -0700241 uint8_t *above_pred_buf;
242 uint8_t *left_pred_buf;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700243
244 PALETTE_BUFFER *palette_buffer;
245
246 // These define limits to motion vector components to prevent them
247 // from extending outside the UMV borders
Alex Converse0fa0f422017-04-24 12:51:14 -0700248 MvLimits mv_limits;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700249
Jingning Hanca3f0392018-02-15 09:54:49 -0800250 uint8_t blk_skip[MAX_MB_PLANE][MAX_MIB_SIZE * MAX_MIB_SIZE];
251 uint8_t blk_skip_drl[MAX_MB_PLANE][MAX_MIB_SIZE * MAX_MIB_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700252
253 int skip;
Jingning Han8efdbc82017-02-19 14:40:03 -0800254 int skip_chroma_rd;
Zoe Liu1eed2df2017-10-16 17:13:15 -0700255 int skip_cost[SKIP_CONTEXTS][2];
256
Zoe Liuf40a9572017-10-13 12:37:19 -0700257#if CONFIG_EXT_SKIP
258 int skip_mode; // 0: off; 1: on
259 int skip_mode_cost[SKIP_CONTEXTS][2];
260
261 int64_t skip_mode_rdcost; // -1: Not set
262 int skip_mode_rate;
263 int64_t skip_mode_sse;
264 int64_t skip_mode_dist;
265 MV_REFERENCE_FRAME skip_mode_ref_frame[2];
266 int_mv skip_mode_mv[2];
Zoe Liu104d62e2017-12-07 12:44:45 -0800267#if CONFIG_JNT_COMP
268 int compound_idx;
269#endif // CONFIG_JNT_COMP
Zoe Liuf40a9572017-10-13 12:37:19 -0700270 int skip_mode_index_candidate;
271 int skip_mode_index;
272#endif // CONFIG_EXT_SKIP
273
Jingning Handfd72322017-08-09 14:04:12 -0700274#if CONFIG_LV_MAP
275 LV_MAP_COEFF_COST coeff_costs[TX_SIZES][PLANE_TYPES];
Dake He0db7d0e2017-12-21 15:23:20 -0800276 LV_MAP_EOB_COST eob_costs[7][2];
Jingning Hanf5a4d3b2017-08-27 23:01:19 -0700277 uint16_t cb_offset;
Jingning Handfd72322017-08-09 14:04:12 -0700278#endif
279
hui suc0cf71d2017-07-20 16:38:50 -0700280 av1_coeff_cost token_head_costs[TX_SIZES];
281 av1_coeff_cost token_tail_costs[TX_SIZES];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700282
Yue Chenb23d00a2017-07-28 17:01:21 -0700283 // mode costs
Yue Chen170678a2017-10-17 13:43:10 -0700284 int intra_inter_cost[INTRA_INTER_CONTEXTS][2];
285
Yue Chenb23d00a2017-07-28 17:01:21 -0700286 int mbmode_cost[BLOCK_SIZE_GROUPS][INTRA_MODES];
287 int newmv_mode_cost[NEWMV_MODE_CONTEXTS][2];
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700288 int zeromv_mode_cost[GLOBALMV_MODE_CONTEXTS][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700289 int refmv_mode_cost[REFMV_MODE_CONTEXTS][2];
290 int drl_mode_cost0[DRL_MODE_CONTEXTS][2];
291
Hui Su9d0c03d2017-12-27 16:05:23 -0800292 int comp_inter_cost[COMP_INTER_CONTEXTS][2];
Hui Su3d30b4b2017-12-27 16:47:59 -0800293 int single_ref_cost[REF_CONTEXTS][SINGLE_REFS - 1][2];
Hui Su6b3d1e32018-01-05 11:25:40 -0800294#if CONFIG_EXT_COMP_REFS
295 int comp_ref_type_cost[COMP_REF_TYPE_CONTEXTS]
296 [CDF_SIZE(COMP_REFERENCE_TYPES)];
Hui Sua7e3bfe2018-01-05 12:14:48 -0800297 int uni_comp_ref_cost[UNI_COMP_REF_CONTEXTS][UNIDIR_COMP_REFS - 1]
298 [CDF_SIZE(2)];
Hui Su6b3d1e32018-01-05 11:25:40 -0800299#endif // CONFIG_EXT_COMP_REFS
Hui Su0bdf5f52018-01-05 14:54:32 -0800300 // Cost for signaling ref_frame[0] (LAST_FRAME, LAST2_FRAME, LAST3_FRAME or
301 // GOLDEN_FRAME) in bidir-comp mode.
Zoe Liu3b353472018-02-12 13:58:22 -0800302 int comp_ref_cost[REF_CONTEXTS][FWD_REFS - 1][2];
Hui Su0bdf5f52018-01-05 14:54:32 -0800303 // Cost for signaling ref_frame[1] (ALTREF_FRAME, ALTREF2_FRAME, or
304 // BWDREF_FRAME) in bidir-comp mode.
Zoe Liu3b353472018-02-12 13:58:22 -0800305 int comp_bwdref_cost[REF_CONTEXTS][BWD_REFS - 1][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700306 int inter_compound_mode_cost[INTER_MODE_CONTEXTS][INTER_COMPOUND_MODES];
Cheng Chen2ef24ea2017-11-29 12:22:24 -0800307#if CONFIG_JNT_COMP
308 int compound_type_cost[BLOCK_SIZES_ALL][COMPOUND_TYPES - 1];
309#else
Yue Chena4245512017-08-31 11:58:08 -0700310 int compound_type_cost[BLOCK_SIZES_ALL][COMPOUND_TYPES];
Cheng Chen2ef24ea2017-11-29 12:22:24 -0800311#endif // CONFIG_JNT_COMP
Yue Cheneaf128a2017-10-16 17:01:36 -0700312 int interintra_cost[BLOCK_SIZE_GROUPS][2];
313 int wedge_interintra_cost[BLOCK_SIZES_ALL][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700314 int interintra_mode_cost[BLOCK_SIZE_GROUPS][INTERINTRA_MODES];
Yue Chenb23d00a2017-07-28 17:01:21 -0700315 int motion_mode_cost[BLOCK_SIZES_ALL][MOTION_MODES];
Yue Chenb23d00a2017-07-28 17:01:21 -0700316 int motion_mode_cost1[BLOCK_SIZES_ALL][2];
David Michael Barrcb3a8ef2018-01-06 15:48:49 +0900317#if CONFIG_CFL
318 int intra_uv_mode_cost[CFL_ALLOWED_TYPES][INTRA_MODES][UV_INTRA_MODES];
319#else
Yue Chenb23d00a2017-07-28 17:01:21 -0700320 int intra_uv_mode_cost[INTRA_MODES][UV_INTRA_MODES];
David Michael Barrcb3a8ef2018-01-06 15:48:49 +0900321#endif
Yue Chenb23d00a2017-07-28 17:01:21 -0700322 int y_mode_costs[INTRA_MODES][INTRA_MODES][INTRA_MODES];
Yue Chen63ce36f2017-10-10 23:37:31 -0700323#if CONFIG_FILTER_INTRA
Yue Chen4eba69b2017-11-09 22:37:35 -0800324 int filter_intra_cost[TX_SIZES_ALL][2];
Yue Chen994dba22017-12-19 15:27:26 -0800325 int filter_intra_mode_cost[FILTER_INTRA_MODES];
Yue Chen63ce36f2017-10-10 23:37:31 -0700326#endif
Yue Chenb23d00a2017-07-28 17:01:21 -0700327 int switchable_interp_costs[SWITCHABLE_FILTER_CONTEXTS][SWITCHABLE_FILTERS];
328#if CONFIG_EXT_PARTITION_TYPES
Sebastien Alaiwana6a486c2017-11-07 17:04:27 +0100329 int partition_cost[PARTITION_CONTEXTS][EXT_PARTITION_TYPES];
Yue Chenb23d00a2017-07-28 17:01:21 -0700330#else
Sebastien Alaiwana6a486c2017-11-07 17:04:27 +0100331 int partition_cost[PARTITION_CONTEXTS][PARTITION_TYPES];
Yue Chenb23d00a2017-07-28 17:01:21 -0700332#endif // CONFIG_EXT_PARTITION_TYPES
Hui Suc1f411b2017-12-19 15:58:28 -0800333 int palette_y_size_cost[PALATTE_BSIZE_CTXS][PALETTE_SIZES];
334 int palette_uv_size_cost[PALATTE_BSIZE_CTXS][PALETTE_SIZES];
Yue Chenb23d00a2017-07-28 17:01:21 -0700335 int palette_y_color_cost[PALETTE_SIZES][PALETTE_COLOR_INDEX_CONTEXTS]
336 [PALETTE_COLORS];
337 int palette_uv_color_cost[PALETTE_SIZES][PALETTE_COLOR_INDEX_CONTEXTS]
338 [PALETTE_COLORS];
Hui Suc1f411b2017-12-19 15:58:28 -0800339 int palette_y_mode_cost[PALATTE_BSIZE_CTXS][PALETTE_Y_MODE_CONTEXTS][2];
Yue Chendab2ca92017-10-16 17:48:48 -0700340 int palette_uv_mode_cost[PALETTE_UV_MODE_CONTEXTS][2];
David Michael Barr38e560c2017-08-16 21:46:37 +0900341#if CONFIG_CFL
342 // The rate associated with each alpha codeword
343 int cfl_cost[CFL_JOINT_SIGNS][CFL_PRED_PLANES][CFL_ALPHABET_SIZE];
344#endif // CONFIG_CFL
Yue Chenb23d00a2017-07-28 17:01:21 -0700345 int tx_size_cost[TX_SIZES - 1][TX_SIZE_CONTEXTS][TX_SIZES];
Yue Chen171c17d2017-10-16 18:08:22 -0700346 int txfm_partition_cost[TXFM_PARTITION_CONTEXTS][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700347 int inter_tx_type_costs[EXT_TX_SETS_INTER][EXT_TX_SIZES][TX_TYPES];
348 int intra_tx_type_costs[EXT_TX_SETS_INTRA][EXT_TX_SIZES][INTRA_MODES]
349 [TX_TYPES];
Hui Su79c763b2018-01-18 13:18:46 -0800350#if CONFIG_EXT_INTRA_MOD
Joe Young3ca43bf2017-10-06 15:12:46 -0700351 int angle_delta_cost[DIRECTIONAL_MODES][2 * MAX_ANGLE_DELTA + 1];
Hui Su79c763b2018-01-18 13:18:46 -0800352#endif // CONFIG_EXT_INTRA_MOD
Yue Chenb23d00a2017-07-28 17:01:21 -0700353#if CONFIG_LOOP_RESTORATION
354 int switchable_restore_cost[RESTORE_SWITCHABLE_TYPES];
Debargha Mukherjeebc732ef2017-10-12 12:40:25 -0700355 int wiener_restore_cost[2];
356 int sgrproj_restore_cost[2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700357#endif // CONFIG_LOOP_RESTORATION
Hui Su6c8584f2017-09-14 15:37:02 -0700358#if CONFIG_INTRABC
359 int intrabc_cost[2];
360#endif // CONFIG_INTRABC
Yue Chenb23d00a2017-07-28 17:01:21 -0700361
Yaowu Xuc27fc142016-08-22 16:08:15 -0700362 int optimize;
363
Yaowu Xuc27fc142016-08-22 16:08:15 -0700364 // Used to store sub partition's choices.
365 MV pred_mv[TOTAL_REFS_PER_FRAME];
366
367 // Store the best motion vector during motion search
368 int_mv best_mv;
369 // Store the second best motion vector during full-pixel motion search
370 int_mv second_best_mv;
371
Yaowu Xuc27fc142016-08-22 16:08:15 -0700372 // use default transform and skip transform type search for intra modes
373 int use_default_intra_tx_type;
374 // use default transform and skip transform type search for inter modes
375 int use_default_inter_tx_type;
Yushin Chob7b60c52017-07-14 16:18:52 -0700376#if CONFIG_DIST_8X8
Yushin Cho55104332017-08-14 16:15:43 -0700377 int using_dist_8x8;
378 aom_tune_metric tune_metric;
Yushin Chob7b60c52017-07-14 16:18:52 -0700379#endif // CONFIG_DIST_8X8
Cheng Chen46970612017-10-24 14:53:36 -0700380#if CONFIG_JNT_COMP
381 int comp_idx_cost[COMP_INDEX_CONTEXTS][2];
Cheng Chen2ef24ea2017-11-29 12:22:24 -0800382 int comp_group_idx_cost[COMP_GROUP_IDX_CONTEXTS][2];
Cheng Chen46970612017-10-24 14:53:36 -0700383#endif // CONFIG_JNT_COMP
Hui Su6bbd9322018-01-26 11:04:13 -0800384 // Bit flags for pruning tx type search, tx split, etc.
385 int tx_search_prune[EXT_TX_SET_TYPES];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700386};
387
Frederic Barbier0f191da2018-01-03 17:29:26 +0100388static INLINE int is_rect_tx_allowed_bsize(BLOCK_SIZE bsize) {
389 static const char LUT[BLOCK_SIZES_ALL] = {
390 0, // BLOCK_4X4
391 1, // BLOCK_4X8
392 1, // BLOCK_8X4
393 0, // BLOCK_8X8
394 1, // BLOCK_8X16
395 1, // BLOCK_16X8
396 0, // BLOCK_16X16
397 1, // BLOCK_16X32
398 1, // BLOCK_32X16
399 0, // BLOCK_32X32
400 1, // BLOCK_32X64
401 1, // BLOCK_64X32
402 0, // BLOCK_64X64
403#if CONFIG_EXT_PARTITION
404 0, // BLOCK_64X128
405 0, // BLOCK_128X64
406 0, // BLOCK_128X128
407#endif // CONFIG_EXT_PARTITION
408 1, // BLOCK_4X16
409 1, // BLOCK_16X4
410 1, // BLOCK_8X32
411 1, // BLOCK_32X8
412 1, // BLOCK_16X64
413 1, // BLOCK_64X16
414#if CONFIG_EXT_PARTITION
415 1, // BLOCK_32X128
416 1, // BLOCK_128X32
417#endif // CONFIG_EXT_PARTITION
418 };
419
420 return LUT[bsize];
421}
422
423static INLINE int is_rect_tx_allowed(const MACROBLOCKD *xd,
424 const MB_MODE_INFO *mbmi) {
425 return is_rect_tx_allowed_bsize(mbmi->sb_type) &&
426 !xd->lossless[mbmi->segment_id];
427}
428
429static INLINE int tx_size_to_depth(TX_SIZE tx_size, BLOCK_SIZE bsize,
430 int is_inter) {
431 TX_SIZE ctx_size = get_max_rect_tx_size(bsize, is_inter);
432 int depth = 0;
433 while (tx_size != ctx_size) {
434 depth++;
435 ctx_size = sub_tx_size_map[is_inter][ctx_size];
436 assert(depth <= MAX_TX_DEPTH);
437 }
438 return depth;
439}
440
Yaowu Xuc27fc142016-08-22 16:08:15 -0700441#ifdef __cplusplus
442} // extern "C"
443#endif
444
Yaowu Xuf883b422016-08-30 14:01:10 -0700445#endif // AV1_ENCODER_BLOCK_H_