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aomedia / aom / eec47e65bb36b602585bcb09b294d860760ecd02 / . / av1 / av1_common.mk
blob: 07db91f84f05b400fd5604fb8389e82cb396f94d [file] [log] [blame]
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]1##
Yaowu Xu9c01aa12016-09-01 14:32:49 -0700[diff] [blame]2## Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]3##
Yaowu Xu9c01aa12016-09-01 14:32:49 -0700[diff] [blame]4## This source code is subject to the terms of the BSD 2 Clause License and
5## the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6## was not distributed with this source code in the LICENSE file, you can
7## obtain it at www.aomedia.org/license/software. If the Alliance for Open
8## Media Patent License 1.0 was not distributed with this source code in the
9## PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]10##
11
12AV1_COMMON_SRCS-yes += av1_common.mk
13AV1_COMMON_SRCS-yes += av1_iface_common.h
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]14AV1_COMMON_SRCS-yes += common/alloccommon.c
Tom Finegan17ce8b12017-02-08 12:46:31 -0800[diff] [blame]15AV1_COMMON_SRCS-yes += common/av1_loopfilter.c
16AV1_COMMON_SRCS-yes += common/av1_loopfilter.h
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]17AV1_COMMON_SRCS-yes += common/blockd.c
18AV1_COMMON_SRCS-yes += common/debugmodes.c
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]19AV1_COMMON_SRCS-yes += common/entropy.c
20AV1_COMMON_SRCS-yes += common/entropymode.c
21AV1_COMMON_SRCS-yes += common/entropymv.c
22AV1_COMMON_SRCS-yes += common/frame_buffers.c
23AV1_COMMON_SRCS-yes += common/frame_buffers.h
24AV1_COMMON_SRCS-yes += common/alloccommon.h
25AV1_COMMON_SRCS-yes += common/blockd.h
26AV1_COMMON_SRCS-yes += common/common.h
27AV1_COMMON_SRCS-yes += common/entropy.h
28AV1_COMMON_SRCS-yes += common/entropymode.h
29AV1_COMMON_SRCS-yes += common/entropymv.h
30AV1_COMMON_SRCS-yes += common/enums.h
31AV1_COMMON_SRCS-yes += common/filter.h
32AV1_COMMON_SRCS-yes += common/filter.c
33AV1_COMMON_SRCS-yes += common/idct.h
34AV1_COMMON_SRCS-yes += common/idct.c
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]35AV1_COMMON_SRCS-yes += common/thread_common.h
James Zernfd2b1b82017-02-24 18:56:44 -0800[diff] [blame]36AV1_COMMON_SRCS-$(CONFIG_LV_MAP) += common/txb_common.h
Angie Chiangfe2ad262017-03-21 11:09:13 -0700[diff] [blame]37AV1_COMMON_SRCS-$(CONFIG_LV_MAP) += common/txb_common.c
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]38AV1_COMMON_SRCS-yes += common/mv.h
39AV1_COMMON_SRCS-yes += common/onyxc_int.h
40AV1_COMMON_SRCS-yes += common/pred_common.h
41AV1_COMMON_SRCS-yes += common/pred_common.c
42AV1_COMMON_SRCS-yes += common/quant_common.h
43AV1_COMMON_SRCS-yes += common/reconinter.h
44AV1_COMMON_SRCS-yes += common/reconintra.h
45AV1_COMMON_SRCS-yes += common/av1_rtcd.c
46AV1_COMMON_SRCS-yes += common/av1_rtcd_defs.pl
47AV1_COMMON_SRCS-yes += common/scale.h
48AV1_COMMON_SRCS-yes += common/scale.c
49AV1_COMMON_SRCS-yes += common/seg_common.h
50AV1_COMMON_SRCS-yes += common/seg_common.c
51AV1_COMMON_SRCS-yes += common/tile_common.h
52AV1_COMMON_SRCS-yes += common/tile_common.c
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]53AV1_COMMON_SRCS-yes += common/thread_common.c
54AV1_COMMON_SRCS-yes += common/mvref_common.c
55AV1_COMMON_SRCS-yes += common/mvref_common.h
56AV1_COMMON_SRCS-yes += common/quant_common.c
57AV1_COMMON_SRCS-yes += common/reconinter.c
58AV1_COMMON_SRCS-yes += common/reconintra.c
Fergus Simpsond0565002017-03-27 16:51:52 -0700[diff] [blame]59AV1_COMMON_SRCS-yes += common/resize.c
60AV1_COMMON_SRCS-yes += common/resize.h
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]61AV1_COMMON_SRCS-yes += common/restoration.h
62AV1_COMMON_SRCS-yes += common/common_data.h
63AV1_COMMON_SRCS-yes += common/scan.c
64AV1_COMMON_SRCS-yes += common/scan.h
James Zern9fa47582016-05-10 19:28:35 -0700[diff] [blame]65# TODO(angiebird) the forward transform belongs under encoder/
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]66AV1_COMMON_SRCS-yes += common/av1_txfm.h
67AV1_COMMON_SRCS-yes += common/av1_fwd_txfm1d.h
68AV1_COMMON_SRCS-yes += common/av1_fwd_txfm1d.c
69AV1_COMMON_SRCS-yes += common/av1_inv_txfm1d.h
70AV1_COMMON_SRCS-yes += common/av1_inv_txfm1d.c
71AV1_COMMON_SRCS-yes += common/av1_fwd_txfm2d.c
Sarah Parkereec47e62017-05-15 20:49:22 -0700[diff] [blame^]72AV1_COMMON_SRCS-yes += common/av1_fwd_txfm1d_cfg.h
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]73AV1_COMMON_SRCS-yes += common/av1_inv_txfm2d.c
Sarah Parkereec47e62017-05-15 20:49:22 -0700[diff] [blame^]74AV1_COMMON_SRCS-yes += common/av1_inv_txfm1d_cfg.h
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]75AV1_COMMON_SRCS-$(HAVE_SSSE3) += common/x86/av1_convolve_ssse3.c
Sebastien Alaiwan71e87842017-04-12 16:03:28 +0200[diff] [blame]76ifeq ($(CONFIG_HIGHBITDEPTH),yes)
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]77AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/av1_highbd_convolve_sse4.c
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]78endif
Yaowu Xu6557ea92016-10-31 16:33:36 -0700[diff] [blame]79AV1_COMMON_SRCS-yes += common/convolve.c
80AV1_COMMON_SRCS-yes += common/convolve.h
David Barkerce110cc2017-02-22 10:38:59 +0000[diff] [blame]81ifeq ($(CONFIG_LOOP_RESTORATION),yes)
82AV1_COMMON_SRCS-yes += common/restoration.h
83AV1_COMMON_SRCS-yes += common/restoration.c
84AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/selfguided_sse4.c
85endif
Yue Chen235133a2016-09-29 12:12:47 -0700[diff] [blame]86ifeq (yes,$(filter $(CONFIG_GLOBAL_MOTION) $(CONFIG_WARPED_MOTION),yes))
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]87AV1_COMMON_SRCS-yes += common/warped_motion.h
88AV1_COMMON_SRCS-yes += common/warped_motion.c
89endif
Jean-Marc Valin01435132017-02-18 14:12:53 -0500[diff] [blame]90ifeq ($(CONFIG_CDEF),yes)
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]91AV1_COMMON_SRCS-yes += common/clpf.c
92AV1_COMMON_SRCS-yes += common/clpf.h
Steinar Midtskogenbe668e92016-08-05 12:12:38 +0200[diff] [blame]93AV1_COMMON_SRCS-yes += common/clpf_simd.h
Steinar Midtskogen8ff52fc2017-04-04 12:29:19 +0200[diff] [blame]94AV1_COMMON_SRCS-yes += common/cdef_simd.h
Steinar Midtskogenbe668e92016-08-05 12:12:38 +0200[diff] [blame]95AV1_COMMON_SRCS-$(HAVE_SSE2) += common/clpf_sse2.c
96AV1_COMMON_SRCS-$(HAVE_SSSE3) += common/clpf_ssse3.c
Steinar Midtskogenf250e202016-10-18 07:56:52 +0200[diff] [blame]97AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/clpf_sse4.c
Steinar Midtskogenbe668e92016-08-05 12:12:38 +0200[diff] [blame]98AV1_COMMON_SRCS-$(HAVE_NEON) += common/clpf_neon.c
Steinar Midtskogenb8ff6aa2017-03-25 18:52:22 +0100[diff] [blame]99AV1_COMMON_SRCS-$(HAVE_SSE2) += common/od_dering_sse2.c
100AV1_COMMON_SRCS-$(HAVE_SSSE3) += common/od_dering_ssse3.c
101AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/od_dering_sse4.c
102AV1_COMMON_SRCS-$(HAVE_NEON) += common/od_dering_neon.c
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]103AV1_COMMON_SRCS-yes += common/od_dering.c
104AV1_COMMON_SRCS-yes += common/od_dering.h
Steinar Midtskogenb8ff6aa2017-03-25 18:52:22 +0100[diff] [blame]105AV1_COMMON_SRCS-yes += common/od_dering_simd.h
Steinar Midtskogena9d41e82017-03-17 12:48:15 +0100[diff] [blame]106AV1_COMMON_SRCS-yes += common/cdef.c
107AV1_COMMON_SRCS-yes += common/cdef.h
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]108endif
109AV1_COMMON_SRCS-yes += common/odintrin.c
110AV1_COMMON_SRCS-yes += common/odintrin.h
111
Luc Trudeauf8164152017-04-11 16:20:51 -0400[diff] [blame]112ifeq ($(CONFIG_CFL),yes)
113AV1_COMMON_SRCS-yes += common/cfl.h
114AV1_COMMON_SRCS-yes += common/cfl.c
115endif
116
Yushin Cho77bba8d2016-11-04 16:36:56 -0700[diff] [blame]117ifeq ($(CONFIG_PVQ),yes)
118# PVQ from daala
119AV1_COMMON_SRCS-yes += common/pvq.c
Yushin Cho77bba8d2016-11-04 16:36:56 -0700[diff] [blame]120AV1_COMMON_SRCS-yes += common/partition.c
121AV1_COMMON_SRCS-yes += common/partition.h
122AV1_COMMON_SRCS-yes += common/zigzag4.c
123AV1_COMMON_SRCS-yes += common/zigzag8.c
124AV1_COMMON_SRCS-yes += common/zigzag16.c
125AV1_COMMON_SRCS-yes += common/zigzag32.c
126AV1_COMMON_SRCS-yes += common/zigzag.h
127AV1_COMMON_SRCS-yes += common/generic_code.c
Yushin Cho77bba8d2016-11-04 16:36:56 -0700[diff] [blame]128AV1_COMMON_SRCS-yes += common/pvq_state.c
Yushin Cho77bba8d2016-11-04 16:36:56 -0700[diff] [blame]129AV1_COMMON_SRCS-yes += common/laplace_tables.c
Michael Bebenita3a88de82017-02-23 18:49:44 -0800[diff] [blame]130AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/pvq_sse4.c
131AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/pvq_sse4.h
Yushin Cho77bba8d2016-11-04 16:36:56 -0700[diff] [blame]132endif
Yushin Chod8059d52017-03-01 10:08:14 -0800[diff] [blame]133ifneq ($(findstring yes,$(CONFIG_PVQ)$(CONFIG_DAALA_DIST)$(CONFIG_XIPHRC)),)
James Zernfd2b1b82017-02-24 18:56:44 -0800[diff] [blame]134AV1_COMMON_SRCS-yes += common/pvq.h
Yushin Chod8059d52017-03-01 10:08:14 -0800[diff] [blame]135AV1_COMMON_SRCS-yes += common/pvq_state.h
136AV1_COMMON_SRCS-yes += common/generic_code.h
James Zernfd2b1b82017-02-24 18:56:44 -0800[diff] [blame]137endif
Yushin Cho77bba8d2016-11-04 16:36:56 -0700[diff] [blame]138
Sebastien Alaiwan71e87842017-04-12 16:03:28 +0200[diff] [blame]139ifneq ($(CONFIG_HIGHBITDEPTH),yes)
Tom Finegan17ce8b12017-02-08 12:46:31 -0800[diff] [blame]140AV1_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/av1_itrans4_dspr2.c
141AV1_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/av1_itrans8_dspr2.c
142AV1_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/av1_itrans16_dspr2.c
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]143endif
144
145# common (msa)
Tom Finegan17ce8b12017-02-08 12:46:31 -0800[diff] [blame]146AV1_COMMON_SRCS-$(HAVE_MSA) += common/mips/msa/av1_idct4x4_msa.c
147AV1_COMMON_SRCS-$(HAVE_MSA) += common/mips/msa/av1_idct8x8_msa.c
148AV1_COMMON_SRCS-$(HAVE_MSA) += common/mips/msa/av1_idct16x16_msa.c
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]149
150AV1_COMMON_SRCS-$(HAVE_SSE2) += common/x86/idct_intrin_sse2.c
Yi Luo73172002016-10-28 10:52:04 -0700[diff] [blame]151AV1_COMMON_SRCS-$(HAVE_AVX2) += common/x86/hybrid_inv_txfm_avx2.c
152
James Zern9fa47582016-05-10 19:28:35 -0700[diff] [blame]153ifeq ($(CONFIG_AV1_ENCODER),yes)
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]154AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/av1_txfm1d_sse4.h
155AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/av1_fwd_txfm1d_sse4.c
156AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/av1_fwd_txfm2d_sse4.c
James Zern9fa47582016-05-10 19:28:35 -0700[diff] [blame]157endif
Sebastien Alaiwan71e87842017-04-12 16:03:28 +0200[diff] [blame]158ifeq ($(CONFIG_HIGHBITDEPTH),yes)
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]159AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/highbd_txfm_utility_sse4.h
Yi Luo3bd83772017-01-10 10:11:49 -0800[diff] [blame]160AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/highbd_inv_txfm_sse4.c
161AV1_COMMON_SRCS-$(HAVE_AVX2) += common/x86/highbd_inv_txfm_avx2.c
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]162endif
163
Sebastien Alaiwan71e87842017-04-12 16:03:28 +0200[diff] [blame]164ifneq ($(CONFIG_HIGHBITDEPTH),yes)
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]165AV1_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/iht4x4_add_neon.c
166AV1_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/iht8x8_add_neon.c
167endif
168
hui su5db97432016-10-14 16:10:14 -0700[diff] [blame]169ifeq ($(CONFIG_FILTER_INTRA),yes)
hui su9ff41342016-10-18 16:31:57 -0700[diff] [blame]170AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/filterintra_sse4.c
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]171endif
172
David Barkerd5dfa962017-01-10 15:06:08 +0000[diff] [blame]173ifneq ($(findstring yes,$(CONFIG_GLOBAL_MOTION) $(CONFIG_WARPED_MOTION)),)
174AV1_COMMON_SRCS-$(HAVE_SSE2) += common/x86/warp_plane_sse2.c
David Barkerd8a423c2017-04-19 10:32:43 +0100[diff] [blame]175AV1_COMMON_SRCS-$(HAVE_SSSE3) += common/x86/warp_plane_ssse3.c
Sebastien Alaiwan71e87842017-04-12 16:03:28 +0200[diff] [blame]176ifeq ($(CONFIG_HIGHBITDEPTH),yes)
David Barker521383a2017-04-05 14:07:12 +0100[diff] [blame]177AV1_COMMON_SRCS-$(HAVE_SSSE3) += common/x86/highbd_warp_plane_ssse3.c
178endif
David Barkerd5dfa962017-01-10 15:06:08 +0000[diff] [blame]179endif
180
Yaowu Xuf883b422016-08-30 14:01:10 -0700[diff] [blame]181$(eval $(call rtcd_h_template,av1_rtcd,av1/common/av1_rtcd_defs.pl))