Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1 | /* |
Yaowu Xu | 2ab7ff0 | 2016-09-02 12:04:54 -0700 | [diff] [blame] | 2 | * Copyright (c) 2016, Alliance for Open Media. All rights reserved |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 3 | * |
Yaowu Xu | 2ab7ff0 | 2016-09-02 12:04:54 -0700 | [diff] [blame] | 4 | * This source code is subject to the terms of the BSD 2 Clause License and |
| 5 | * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License |
| 6 | * was not distributed with this source code in the LICENSE file, you can |
| 7 | * obtain it at www.aomedia.org/license/software. If the Alliance for Open |
| 8 | * Media Patent License 1.0 was not distributed with this source code in the |
| 9 | * PATENTS file, you can obtain it at www.aomedia.org/license/patent. |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #include <assert.h> |
| 13 | #include <math.h> |
| 14 | #include <stdio.h> |
| 15 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 16 | #include "./av1_rtcd.h" |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 17 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 18 | #include "aom_dsp/aom_dsp_common.h" |
| 19 | #include "aom_mem/aom_mem.h" |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 20 | #include "aom_ports/bitops.h" |
| 21 | #include "aom_ports/mem.h" |
| 22 | #include "aom_ports/system_state.h" |
| 23 | |
| 24 | #include "av1/common/common.h" |
| 25 | #include "av1/common/entropy.h" |
| 26 | #include "av1/common/entropymode.h" |
| 27 | #include "av1/common/mvref_common.h" |
| 28 | #include "av1/common/pred_common.h" |
| 29 | #include "av1/common/quant_common.h" |
| 30 | #include "av1/common/reconinter.h" |
| 31 | #include "av1/common/reconintra.h" |
| 32 | #include "av1/common/seg_common.h" |
| 33 | |
Tom Finegan | 17ce8b1 | 2017-02-08 12:46:31 -0800 | [diff] [blame] | 34 | #include "av1/encoder/av1_quantize.h" |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 35 | #include "av1/encoder/cost.h" |
| 36 | #include "av1/encoder/encodemb.h" |
| 37 | #include "av1/encoder/encodemv.h" |
| 38 | #include "av1/encoder/encoder.h" |
| 39 | #include "av1/encoder/mcomp.h" |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 40 | #include "av1/encoder/ratectrl.h" |
| 41 | #include "av1/encoder/rd.h" |
| 42 | #include "av1/encoder/tokenize.h" |
| 43 | |
| 44 | #define RD_THRESH_POW 1.25 |
| 45 | |
| 46 | // Factor to weigh the rate for switchable interp filters. |
| 47 | #define SWITCHABLE_INTERP_RATE_FACTOR 1 |
| 48 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 49 | // The baseline rd thresholds for breaking out of the rd loop for |
| 50 | // certain modes are assumed to be based on 8x8 blocks. |
| 51 | // This table is used to correct for block size. |
| 52 | // The factors here are << 2 (2 = x0.5, 32 = x8 etc). |
| 53 | static const uint8_t rd_thresh_block_size_factor[BLOCK_SIZES] = { |
Jingning Han | f1702dd | 2016-11-30 21:17:59 -0800 | [diff] [blame] | 54 | #if CONFIG_CB4X4 |
| 55 | 2, 2, 2, |
| 56 | #endif |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 57 | 2, 3, 3, 4, 6, 6, 8, 12, 12, 16, 24, 24, 32, |
| 58 | #if CONFIG_EXT_PARTITION |
| 59 | 48, 48, 64 |
| 60 | #endif // CONFIG_EXT_PARTITION |
| 61 | }; |
| 62 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 63 | static void fill_mode_costs(AV1_COMP *cpi) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 64 | const FRAME_CONTEXT *const fc = cpi->common.fc; |
| 65 | int i, j; |
| 66 | |
| 67 | for (i = 0; i < INTRA_MODES; ++i) |
| 68 | for (j = 0; j < INTRA_MODES; ++j) |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 69 | av1_cost_tokens(cpi->y_mode_costs[i][j], av1_kf_y_mode_prob[i][j], |
| 70 | av1_intra_mode_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 71 | |
| 72 | for (i = 0; i < BLOCK_SIZE_GROUPS; ++i) |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 73 | av1_cost_tokens(cpi->mbmode_cost[i], fc->y_mode_prob[i], |
| 74 | av1_intra_mode_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 75 | |
| 76 | for (i = 0; i < INTRA_MODES; ++i) |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 77 | av1_cost_tokens(cpi->intra_uv_mode_cost[i], fc->uv_mode_prob[i], |
| 78 | av1_intra_mode_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 79 | |
| 80 | for (i = 0; i < SWITCHABLE_FILTER_CONTEXTS; ++i) |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 81 | av1_cost_tokens(cpi->switchable_interp_costs[i], |
| 82 | fc->switchable_interp_prob[i], av1_switchable_interp_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 83 | |
Urvang Joshi | b100db7 | 2016-10-12 16:28:56 -0700 | [diff] [blame] | 84 | #if CONFIG_PALETTE |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 85 | for (i = 0; i < PALETTE_BLOCK_SIZES; ++i) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 86 | av1_cost_tokens(cpi->palette_y_size_cost[i], |
| 87 | av1_default_palette_y_size_prob[i], av1_palette_size_tree); |
| 88 | av1_cost_tokens(cpi->palette_uv_size_cost[i], |
| 89 | av1_default_palette_uv_size_prob[i], av1_palette_size_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 90 | } |
| 91 | |
Alex Converse | 9210981 | 2017-02-22 10:21:40 -0800 | [diff] [blame] | 92 | for (i = 0; i < PALETTE_SIZES; ++i) { |
Urvang Joshi | 23a6111 | 2017-01-30 14:59:27 -0800 | [diff] [blame] | 93 | for (j = 0; j < PALETTE_COLOR_INDEX_CONTEXTS; ++j) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 94 | av1_cost_tokens(cpi->palette_y_color_cost[i][j], |
Urvang Joshi | 23a6111 | 2017-01-30 14:59:27 -0800 | [diff] [blame] | 95 | av1_default_palette_y_color_index_prob[i][j], |
| 96 | av1_palette_color_index_tree[i]); |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 97 | av1_cost_tokens(cpi->palette_uv_color_cost[i][j], |
Urvang Joshi | 23a6111 | 2017-01-30 14:59:27 -0800 | [diff] [blame] | 98 | av1_default_palette_uv_color_index_prob[i][j], |
| 99 | av1_palette_color_index_tree[i]); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 100 | } |
Urvang Joshi | b100db7 | 2016-10-12 16:28:56 -0700 | [diff] [blame] | 101 | } |
| 102 | #endif // CONFIG_PALETTE |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 103 | |
Jingning Han | aae72a6 | 2016-10-25 15:35:29 -0700 | [diff] [blame] | 104 | for (i = 0; i < MAX_TX_DEPTH; ++i) |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 105 | for (j = 0; j < TX_SIZE_CONTEXTS; ++j) |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 106 | av1_cost_tokens(cpi->tx_size_cost[i][j], fc->tx_size_probs[i][j], |
| 107 | av1_tx_size_tree[i]); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 108 | |
| 109 | #if CONFIG_EXT_TX |
| 110 | for (i = TX_4X4; i < EXT_TX_SIZES; ++i) { |
| 111 | int s; |
| 112 | for (s = 1; s < EXT_TX_SETS_INTER; ++s) { |
| 113 | if (use_inter_ext_tx_for_txsize[s][i]) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 114 | av1_cost_tokens(cpi->inter_tx_type_costs[s][i], |
| 115 | fc->inter_ext_tx_prob[s][i], av1_ext_tx_inter_tree[s]); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 116 | } |
| 117 | } |
| 118 | for (s = 1; s < EXT_TX_SETS_INTRA; ++s) { |
| 119 | if (use_intra_ext_tx_for_txsize[s][i]) { |
| 120 | for (j = 0; j < INTRA_MODES; ++j) |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 121 | av1_cost_tokens(cpi->intra_tx_type_costs[s][i][j], |
| 122 | fc->intra_ext_tx_prob[s][i][j], |
| 123 | av1_ext_tx_intra_tree[s]); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 124 | } |
| 125 | } |
| 126 | } |
| 127 | #else |
| 128 | for (i = TX_4X4; i < EXT_TX_SIZES; ++i) { |
| 129 | for (j = 0; j < TX_TYPES; ++j) |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 130 | av1_cost_tokens(cpi->intra_tx_type_costs[i][j], |
| 131 | fc->intra_ext_tx_prob[i][j], av1_ext_tx_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 132 | } |
| 133 | for (i = TX_4X4; i < EXT_TX_SIZES; ++i) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 134 | av1_cost_tokens(cpi->inter_tx_type_costs[i], fc->inter_ext_tx_prob[i], |
| 135 | av1_ext_tx_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 136 | } |
| 137 | #endif // CONFIG_EXT_TX |
| 138 | #if CONFIG_EXT_INTRA |
hui su | eda3d76 | 2016-12-06 16:58:23 -0800 | [diff] [blame] | 139 | #if CONFIG_INTRA_INTERP |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 140 | for (i = 0; i < INTRA_FILTERS + 1; ++i) |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 141 | av1_cost_tokens(cpi->intra_filter_cost[i], fc->intra_filter_probs[i], |
| 142 | av1_intra_filter_tree); |
hui su | eda3d76 | 2016-12-06 16:58:23 -0800 | [diff] [blame] | 143 | #endif // CONFIG_INTRA_INTERP |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 144 | #endif // CONFIG_EXT_INTRA |
Debargha Mukherjee | 5cd2ab9 | 2016-09-08 15:15:17 -0700 | [diff] [blame] | 145 | #if CONFIG_LOOP_RESTORATION |
| 146 | av1_cost_tokens(cpi->switchable_restore_cost, fc->switchable_restore_prob, |
| 147 | av1_switchable_restore_tree); |
| 148 | #endif // CONFIG_LOOP_RESTORATION |
Debargha Mukherjee | 9febfc1 | 2016-12-07 13:20:44 -0800 | [diff] [blame] | 149 | #if CONFIG_GLOBAL_MOTION |
| 150 | av1_cost_tokens(cpi->gmtype_cost, fc->global_motion_types_prob, |
| 151 | av1_global_motion_types_tree); |
| 152 | #endif // CONFIG_GLOBAL_MOTION |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 153 | } |
| 154 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 155 | void av1_fill_token_costs(av1_coeff_cost *c, |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 156 | av1_coeff_probs_model (*p)[PLANE_TYPES]) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 157 | int i, j, k, l; |
| 158 | TX_SIZE t; |
Jingning Han | 6a9b240 | 2016-12-16 11:56:56 -0800 | [diff] [blame] | 159 | for (t = 0; t < TX_SIZES; ++t) |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 160 | for (i = 0; i < PLANE_TYPES; ++i) |
| 161 | for (j = 0; j < REF_TYPES; ++j) |
| 162 | for (k = 0; k < COEF_BANDS; ++k) |
| 163 | for (l = 0; l < BAND_COEFF_CONTEXTS(k); ++l) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 164 | aom_prob probs[ENTROPY_NODES]; |
| 165 | av1_model_to_full_probs(p[t][i][j][k][l], probs); |
| 166 | av1_cost_tokens((int *)c[t][i][j][k][0][l], probs, av1_coef_tree); |
| 167 | av1_cost_tokens_skip((int *)c[t][i][j][k][1][l], probs, |
| 168 | av1_coef_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 169 | assert(c[t][i][j][k][0][l][EOB_TOKEN] == |
| 170 | c[t][i][j][k][1][l][EOB_TOKEN]); |
| 171 | } |
| 172 | } |
| 173 | |
| 174 | // Values are now correlated to quantizer. |
| 175 | static int sad_per_bit16lut_8[QINDEX_RANGE]; |
| 176 | static int sad_per_bit4lut_8[QINDEX_RANGE]; |
| 177 | |
Sebastien Alaiwan | 71e8784 | 2017-04-12 16:03:28 +0200 | [diff] [blame] | 178 | #if CONFIG_HIGHBITDEPTH |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 179 | static int sad_per_bit16lut_10[QINDEX_RANGE]; |
| 180 | static int sad_per_bit4lut_10[QINDEX_RANGE]; |
| 181 | static int sad_per_bit16lut_12[QINDEX_RANGE]; |
| 182 | static int sad_per_bit4lut_12[QINDEX_RANGE]; |
| 183 | #endif |
| 184 | |
| 185 | static void init_me_luts_bd(int *bit16lut, int *bit4lut, int range, |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 186 | aom_bit_depth_t bit_depth) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 187 | int i; |
| 188 | // Initialize the sad lut tables using a formulaic calculation for now. |
| 189 | // This is to make it easier to resolve the impact of experimental changes |
| 190 | // to the quantizer tables. |
| 191 | for (i = 0; i < range; i++) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 192 | const double q = av1_convert_qindex_to_q(i, bit_depth); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 193 | bit16lut[i] = (int)(0.0418 * q + 2.4107); |
| 194 | bit4lut[i] = (int)(0.063 * q + 2.742); |
| 195 | } |
| 196 | } |
| 197 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 198 | void av1_init_me_luts(void) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 199 | init_me_luts_bd(sad_per_bit16lut_8, sad_per_bit4lut_8, QINDEX_RANGE, |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 200 | AOM_BITS_8); |
Sebastien Alaiwan | 71e8784 | 2017-04-12 16:03:28 +0200 | [diff] [blame] | 201 | #if CONFIG_HIGHBITDEPTH |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 202 | init_me_luts_bd(sad_per_bit16lut_10, sad_per_bit4lut_10, QINDEX_RANGE, |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 203 | AOM_BITS_10); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 204 | init_me_luts_bd(sad_per_bit16lut_12, sad_per_bit4lut_12, QINDEX_RANGE, |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 205 | AOM_BITS_12); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 206 | #endif |
| 207 | } |
| 208 | |
| 209 | static const int rd_boost_factor[16] = { 64, 32, 32, 32, 24, 16, 12, 12, |
| 210 | 8, 8, 4, 4, 2, 2, 1, 0 }; |
| 211 | static const int rd_frame_type_factor[FRAME_UPDATE_TYPES] = { |
| 212 | 128, 144, 128, 128, 144, |
| 213 | #if CONFIG_EXT_REFS |
| 214 | // TODO(zoeliu): To adjust further following factor values. |
| 215 | 128, 128, 128 |
| 216 | // TODO(weitinglin): We should investigate if the values should be the same |
| 217 | // as the value used by OVERLAY frame |
| 218 | , |
| 219 | 144 |
| 220 | #endif // CONFIG_EXT_REFS |
| 221 | }; |
| 222 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 223 | int av1_compute_rd_mult(const AV1_COMP *cpi, int qindex) { |
| 224 | const int64_t q = av1_dc_quant(qindex, 0, cpi->common.bit_depth); |
Sebastien Alaiwan | 71e8784 | 2017-04-12 16:03:28 +0200 | [diff] [blame] | 225 | #if CONFIG_HIGHBITDEPTH |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 226 | int64_t rdmult = 0; |
| 227 | switch (cpi->common.bit_depth) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 228 | case AOM_BITS_8: rdmult = 88 * q * q / 24; break; |
| 229 | case AOM_BITS_10: rdmult = ROUND_POWER_OF_TWO(88 * q * q / 24, 4); break; |
| 230 | case AOM_BITS_12: rdmult = ROUND_POWER_OF_TWO(88 * q * q / 24, 8); break; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 231 | default: |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 232 | assert(0 && "bit_depth should be AOM_BITS_8, AOM_BITS_10 or AOM_BITS_12"); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 233 | return -1; |
| 234 | } |
| 235 | #else |
| 236 | int64_t rdmult = 88 * q * q / 24; |
Sebastien Alaiwan | 71e8784 | 2017-04-12 16:03:28 +0200 | [diff] [blame] | 237 | #endif // CONFIG_HIGHBITDEPTH |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 238 | if (cpi->oxcf.pass == 2 && (cpi->common.frame_type != KEY_FRAME)) { |
| 239 | const GF_GROUP *const gf_group = &cpi->twopass.gf_group; |
| 240 | const FRAME_UPDATE_TYPE frame_type = gf_group->update_type[gf_group->index]; |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 241 | const int boost_index = AOMMIN(15, (cpi->rc.gfu_boost / 100)); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 242 | |
| 243 | rdmult = (rdmult * rd_frame_type_factor[frame_type]) >> 7; |
| 244 | rdmult += ((rdmult * rd_boost_factor[boost_index]) >> 7); |
| 245 | } |
| 246 | if (rdmult < 1) rdmult = 1; |
| 247 | return (int)rdmult; |
| 248 | } |
| 249 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 250 | static int compute_rd_thresh_factor(int qindex, aom_bit_depth_t bit_depth) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 251 | double q; |
Sebastien Alaiwan | 71e8784 | 2017-04-12 16:03:28 +0200 | [diff] [blame] | 252 | #if CONFIG_HIGHBITDEPTH |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 253 | switch (bit_depth) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 254 | case AOM_BITS_8: q = av1_dc_quant(qindex, 0, AOM_BITS_8) / 4.0; break; |
| 255 | case AOM_BITS_10: q = av1_dc_quant(qindex, 0, AOM_BITS_10) / 16.0; break; |
| 256 | case AOM_BITS_12: q = av1_dc_quant(qindex, 0, AOM_BITS_12) / 64.0; break; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 257 | default: |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 258 | assert(0 && "bit_depth should be AOM_BITS_8, AOM_BITS_10 or AOM_BITS_12"); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 259 | return -1; |
| 260 | } |
| 261 | #else |
| 262 | (void)bit_depth; |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 263 | q = av1_dc_quant(qindex, 0, AOM_BITS_8) / 4.0; |
Sebastien Alaiwan | 71e8784 | 2017-04-12 16:03:28 +0200 | [diff] [blame] | 264 | #endif // CONFIG_HIGHBITDEPTH |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 265 | // TODO(debargha): Adjust the function below. |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 266 | return AOMMAX((int)(pow(q, RD_THRESH_POW) * 5.12), 8); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 267 | } |
| 268 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 269 | void av1_initialize_me_consts(const AV1_COMP *cpi, MACROBLOCK *x, int qindex) { |
Sebastien Alaiwan | 71e8784 | 2017-04-12 16:03:28 +0200 | [diff] [blame] | 270 | #if CONFIG_HIGHBITDEPTH |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 271 | switch (cpi->common.bit_depth) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 272 | case AOM_BITS_8: |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 273 | x->sadperbit16 = sad_per_bit16lut_8[qindex]; |
| 274 | x->sadperbit4 = sad_per_bit4lut_8[qindex]; |
| 275 | break; |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 276 | case AOM_BITS_10: |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 277 | x->sadperbit16 = sad_per_bit16lut_10[qindex]; |
| 278 | x->sadperbit4 = sad_per_bit4lut_10[qindex]; |
| 279 | break; |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 280 | case AOM_BITS_12: |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 281 | x->sadperbit16 = sad_per_bit16lut_12[qindex]; |
| 282 | x->sadperbit4 = sad_per_bit4lut_12[qindex]; |
| 283 | break; |
| 284 | default: |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 285 | assert(0 && "bit_depth should be AOM_BITS_8, AOM_BITS_10 or AOM_BITS_12"); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 286 | } |
| 287 | #else |
| 288 | (void)cpi; |
| 289 | x->sadperbit16 = sad_per_bit16lut_8[qindex]; |
| 290 | x->sadperbit4 = sad_per_bit4lut_8[qindex]; |
Sebastien Alaiwan | 71e8784 | 2017-04-12 16:03:28 +0200 | [diff] [blame] | 291 | #endif // CONFIG_HIGHBITDEPTH |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 292 | } |
| 293 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 294 | static void set_block_thresholds(const AV1_COMMON *cm, RD_OPT *rd) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 295 | int i, bsize, segment_id; |
| 296 | |
| 297 | for (segment_id = 0; segment_id < MAX_SEGMENTS; ++segment_id) { |
| 298 | const int qindex = |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 299 | clamp(av1_get_qindex(&cm->seg, segment_id, cm->base_qindex) + |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 300 | cm->y_dc_delta_q, |
| 301 | 0, MAXQ); |
| 302 | const int q = compute_rd_thresh_factor(qindex, cm->bit_depth); |
| 303 | |
| 304 | for (bsize = 0; bsize < BLOCK_SIZES; ++bsize) { |
| 305 | // Threshold here seems unnecessarily harsh but fine given actual |
| 306 | // range of values used for cpi->sf.thresh_mult[]. |
| 307 | const int t = q * rd_thresh_block_size_factor[bsize]; |
| 308 | const int thresh_max = INT_MAX / t; |
| 309 | |
Jingning Han | 9104bed | 2016-12-14 09:38:00 -0800 | [diff] [blame] | 310 | #if CONFIG_CB4X4 |
| 311 | for (i = 0; i < MAX_MODES; ++i) |
| 312 | rd->threshes[segment_id][bsize][i] = rd->thresh_mult[i] < thresh_max |
| 313 | ? rd->thresh_mult[i] * t / 4 |
| 314 | : INT_MAX; |
| 315 | #else |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 316 | if (bsize >= BLOCK_8X8) { |
| 317 | for (i = 0; i < MAX_MODES; ++i) |
| 318 | rd->threshes[segment_id][bsize][i] = rd->thresh_mult[i] < thresh_max |
| 319 | ? rd->thresh_mult[i] * t / 4 |
| 320 | : INT_MAX; |
| 321 | } else { |
| 322 | for (i = 0; i < MAX_REFS; ++i) |
| 323 | rd->threshes[segment_id][bsize][i] = |
| 324 | rd->thresh_mult_sub8x8[i] < thresh_max |
| 325 | ? rd->thresh_mult_sub8x8[i] * t / 4 |
| 326 | : INT_MAX; |
| 327 | } |
Jingning Han | 9104bed | 2016-12-14 09:38:00 -0800 | [diff] [blame] | 328 | #endif |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 329 | } |
| 330 | } |
| 331 | } |
| 332 | |
Yaowu Xu | 4306b6e | 2016-09-27 12:55:32 -0700 | [diff] [blame] | 333 | void av1_set_mvcost(MACROBLOCK *x, MV_REFERENCE_FRAME ref_frame, int ref, |
| 334 | int ref_mv_idx) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 335 | MB_MODE_INFO_EXT *mbmi_ext = x->mbmi_ext; |
Yaowu Xu | 4306b6e | 2016-09-27 12:55:32 -0700 | [diff] [blame] | 336 | int8_t rf_type = av1_ref_frame_type(x->e_mbd.mi[0]->mbmi.ref_frame); |
| 337 | int nmv_ctx = av1_nmv_ctx(mbmi_ext->ref_mv_count[rf_type], |
| 338 | mbmi_ext->ref_mv_stack[rf_type], ref, ref_mv_idx); |
| 339 | (void)ref_frame; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 340 | x->mvcost = x->mv_cost_stack[nmv_ctx]; |
| 341 | x->nmvjointcost = x->nmv_vec_cost[nmv_ctx]; |
| 342 | x->mvsadcost = x->mvcost; |
| 343 | x->nmvjointsadcost = x->nmvjointcost; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 344 | } |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 345 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 346 | void av1_initialize_rd_consts(AV1_COMP *cpi) { |
| 347 | AV1_COMMON *const cm = &cpi->common; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 348 | MACROBLOCK *const x = &cpi->td.mb; |
| 349 | RD_OPT *const rd = &cpi->rd; |
| 350 | int i; |
Jingning Han | b3b034d | 2016-11-29 17:57:14 -0800 | [diff] [blame] | 351 | int nmv_ctx; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 352 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 353 | aom_clear_system_state(); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 354 | |
| 355 | rd->RDDIV = RDDIV_BITS; // In bits (to multiply D by 128). |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 356 | rd->RDMULT = av1_compute_rd_mult(cpi, cm->base_qindex + cm->y_dc_delta_q); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 357 | |
| 358 | set_error_per_bit(x, rd->RDMULT); |
| 359 | |
| 360 | set_block_thresholds(cm, rd); |
| 361 | |
Jingning Han | b3b034d | 2016-11-29 17:57:14 -0800 | [diff] [blame] | 362 | for (nmv_ctx = 0; nmv_ctx < NMV_CONTEXTS; ++nmv_ctx) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 363 | av1_build_nmv_cost_table( |
Jingning Han | b3b034d | 2016-11-29 17:57:14 -0800 | [diff] [blame] | 364 | x->nmv_vec_cost[nmv_ctx], |
| 365 | cm->allow_high_precision_mv ? x->nmvcost_hp[nmv_ctx] |
| 366 | : x->nmvcost[nmv_ctx], |
| 367 | &cm->fc->nmvc[nmv_ctx], cm->allow_high_precision_mv); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 368 | } |
Jingning Han | b3b034d | 2016-11-29 17:57:14 -0800 | [diff] [blame] | 369 | x->mvcost = x->mv_cost_stack[0]; |
| 370 | x->nmvjointcost = x->nmv_vec_cost[0]; |
| 371 | x->mvsadcost = x->mvcost; |
| 372 | x->nmvjointsadcost = x->nmvjointcost; |
Jingning Han | b3b034d | 2016-11-29 17:57:14 -0800 | [diff] [blame] | 373 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 374 | if (cpi->oxcf.pass != 1) { |
Alex Converse | ccf472b | 2016-10-12 13:03:55 -0700 | [diff] [blame] | 375 | av1_fill_token_costs(x->token_costs, cm->fc->coef_probs); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 376 | |
| 377 | if (cpi->sf.partition_search_type != VAR_BASED_PARTITION || |
| 378 | cm->frame_type == KEY_FRAME) { |
| 379 | #if CONFIG_EXT_PARTITION_TYPES |
Alex Converse | 4e18d40 | 2017-03-14 15:36:38 -0700 | [diff] [blame] | 380 | for (i = 0; i < PARTITION_PLOFFSET; ++i) |
Alex Converse | 2b9d19d | 2017-04-03 11:11:17 -0700 | [diff] [blame] | 381 | av1_cost_tokens(cpi->partition_cost[i], cm->fc->partition_prob[i], |
| 382 | av1_partition_tree); |
Alex Converse | 4e18d40 | 2017-03-14 15:36:38 -0700 | [diff] [blame] | 383 | for (; i < PARTITION_CONTEXTS_PRIMARY; ++i) |
Alex Converse | 2b9d19d | 2017-04-03 11:11:17 -0700 | [diff] [blame] | 384 | av1_cost_tokens(cpi->partition_cost[i], cm->fc->partition_prob[i], |
| 385 | av1_ext_partition_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 386 | #else |
Alex Converse | 55c6bde | 2017-01-12 15:55:31 -0800 | [diff] [blame] | 387 | for (i = 0; i < PARTITION_CONTEXTS_PRIMARY; ++i) |
Alex Converse | 2b9d19d | 2017-04-03 11:11:17 -0700 | [diff] [blame] | 388 | av1_cost_tokens(cpi->partition_cost[i], cm->fc->partition_prob[i], |
| 389 | av1_partition_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 390 | #endif // CONFIG_EXT_PARTITION_TYPES |
Alex Converse | 55c6bde | 2017-01-12 15:55:31 -0800 | [diff] [blame] | 391 | #if CONFIG_UNPOISON_PARTITION_CTX |
| 392 | for (; i < PARTITION_CONTEXTS_PRIMARY + PARTITION_BLOCK_SIZES; ++i) { |
| 393 | aom_prob p = cm->fc->partition_prob[i][PARTITION_VERT]; |
| 394 | assert(p > 0); |
Alex Converse | 2b9d19d | 2017-04-03 11:11:17 -0700 | [diff] [blame] | 395 | cpi->partition_cost[i][PARTITION_NONE] = INT_MAX; |
| 396 | cpi->partition_cost[i][PARTITION_HORZ] = INT_MAX; |
| 397 | cpi->partition_cost[i][PARTITION_VERT] = av1_cost_bit(p, 0); |
| 398 | cpi->partition_cost[i][PARTITION_SPLIT] = av1_cost_bit(p, 1); |
Alex Converse | 55c6bde | 2017-01-12 15:55:31 -0800 | [diff] [blame] | 399 | } |
| 400 | for (; i < PARTITION_CONTEXTS_PRIMARY + 2 * PARTITION_BLOCK_SIZES; ++i) { |
| 401 | aom_prob p = cm->fc->partition_prob[i][PARTITION_HORZ]; |
| 402 | assert(p > 0); |
Alex Converse | 2b9d19d | 2017-04-03 11:11:17 -0700 | [diff] [blame] | 403 | cpi->partition_cost[i][PARTITION_NONE] = INT_MAX; |
| 404 | cpi->partition_cost[i][PARTITION_HORZ] = av1_cost_bit(p, 0); |
| 405 | cpi->partition_cost[i][PARTITION_VERT] = INT_MAX; |
| 406 | cpi->partition_cost[i][PARTITION_SPLIT] = av1_cost_bit(p, 1); |
Alex Converse | 55c6bde | 2017-01-12 15:55:31 -0800 | [diff] [blame] | 407 | } |
Alex Converse | 2b9d19d | 2017-04-03 11:11:17 -0700 | [diff] [blame] | 408 | cpi->partition_cost[PARTITION_CONTEXTS][PARTITION_NONE] = INT_MAX; |
| 409 | cpi->partition_cost[PARTITION_CONTEXTS][PARTITION_HORZ] = INT_MAX; |
| 410 | cpi->partition_cost[PARTITION_CONTEXTS][PARTITION_VERT] = INT_MAX; |
| 411 | cpi->partition_cost[PARTITION_CONTEXTS][PARTITION_SPLIT] = 0; |
| 412 | #endif // CONFIG_UNPOISON_PARTITION_CTX |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 413 | } |
| 414 | |
| 415 | fill_mode_costs(cpi); |
| 416 | |
| 417 | if (!frame_is_intra_only(cm)) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 418 | for (i = 0; i < NEWMV_MODE_CONTEXTS; ++i) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 419 | cpi->newmv_mode_cost[i][0] = av1_cost_bit(cm->fc->newmv_prob[i], 0); |
| 420 | cpi->newmv_mode_cost[i][1] = av1_cost_bit(cm->fc->newmv_prob[i], 1); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 421 | } |
| 422 | |
| 423 | for (i = 0; i < ZEROMV_MODE_CONTEXTS; ++i) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 424 | cpi->zeromv_mode_cost[i][0] = av1_cost_bit(cm->fc->zeromv_prob[i], 0); |
| 425 | cpi->zeromv_mode_cost[i][1] = av1_cost_bit(cm->fc->zeromv_prob[i], 1); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 426 | } |
| 427 | |
| 428 | for (i = 0; i < REFMV_MODE_CONTEXTS; ++i) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 429 | cpi->refmv_mode_cost[i][0] = av1_cost_bit(cm->fc->refmv_prob[i], 0); |
| 430 | cpi->refmv_mode_cost[i][1] = av1_cost_bit(cm->fc->refmv_prob[i], 1); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 431 | } |
| 432 | |
| 433 | for (i = 0; i < DRL_MODE_CONTEXTS; ++i) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 434 | cpi->drl_mode_cost0[i][0] = av1_cost_bit(cm->fc->drl_prob[i], 0); |
| 435 | cpi->drl_mode_cost0[i][1] = av1_cost_bit(cm->fc->drl_prob[i], 1); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 436 | } |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 437 | #if CONFIG_EXT_INTER |
| 438 | for (i = 0; i < INTER_MODE_CONTEXTS; ++i) |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 439 | av1_cost_tokens((int *)cpi->inter_compound_mode_cost[i], |
| 440 | cm->fc->inter_compound_mode_probs[i], |
| 441 | av1_inter_compound_mode_tree); |
Yue Chen | 4d26acb | 2017-05-01 12:28:34 -0700 | [diff] [blame] | 442 | #if CONFIG_INTERINTRA |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 443 | for (i = 0; i < BLOCK_SIZE_GROUPS; ++i) |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 444 | av1_cost_tokens((int *)cpi->interintra_mode_cost[i], |
| 445 | cm->fc->interintra_mode_prob[i], |
| 446 | av1_interintra_mode_tree); |
Yue Chen | 4d26acb | 2017-05-01 12:28:34 -0700 | [diff] [blame] | 447 | #endif // CONFIG_INTERINTRA |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 448 | #endif // CONFIG_EXT_INTER |
Yue Chen | cb60b18 | 2016-10-13 15:18:22 -0700 | [diff] [blame] | 449 | #if CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 450 | for (i = BLOCK_8X8; i < BLOCK_SIZES; i++) { |
Yue Chen | cb60b18 | 2016-10-13 15:18:22 -0700 | [diff] [blame] | 451 | av1_cost_tokens((int *)cpi->motion_mode_cost[i], |
| 452 | cm->fc->motion_mode_prob[i], av1_motion_mode_tree); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 453 | } |
Yue Chen | 69f18e1 | 2016-09-08 14:48:15 -0700 | [diff] [blame] | 454 | #if CONFIG_MOTION_VAR && CONFIG_WARPED_MOTION |
| 455 | for (i = BLOCK_8X8; i < BLOCK_SIZES; i++) { |
| 456 | cpi->motion_mode_cost1[i][0] = av1_cost_bit(cm->fc->obmc_prob[i], 0); |
| 457 | cpi->motion_mode_cost1[i][1] = av1_cost_bit(cm->fc->obmc_prob[i], 1); |
| 458 | } |
| 459 | #endif // CONFIG_MOTION_VAR && CONFIG_WARPED_MOTION |
Yue Chen | cb60b18 | 2016-10-13 15:18:22 -0700 | [diff] [blame] | 460 | #endif // CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 461 | } |
| 462 | } |
| 463 | } |
| 464 | |
| 465 | static void model_rd_norm(int xsq_q10, int *r_q10, int *d_q10) { |
| 466 | // NOTE: The tables below must be of the same size. |
| 467 | |
| 468 | // The functions described below are sampled at the four most significant |
| 469 | // bits of x^2 + 8 / 256. |
| 470 | |
| 471 | // Normalized rate: |
| 472 | // This table models the rate for a Laplacian source with given variance |
| 473 | // when quantized with a uniform quantizer with given stepsize. The |
| 474 | // closed form expression is: |
| 475 | // Rn(x) = H(sqrt(r)) + sqrt(r)*[1 + H(r)/(1 - r)], |
| 476 | // where r = exp(-sqrt(2) * x) and x = qpstep / sqrt(variance), |
| 477 | // and H(x) is the binary entropy function. |
| 478 | static const int rate_tab_q10[] = { |
| 479 | 65536, 6086, 5574, 5275, 5063, 4899, 4764, 4651, 4553, 4389, 4255, 4142, |
| 480 | 4044, 3958, 3881, 3811, 3748, 3635, 3538, 3453, 3376, 3307, 3244, 3186, |
| 481 | 3133, 3037, 2952, 2877, 2809, 2747, 2690, 2638, 2589, 2501, 2423, 2353, |
| 482 | 2290, 2232, 2179, 2130, 2084, 2001, 1928, 1862, 1802, 1748, 1698, 1651, |
| 483 | 1608, 1530, 1460, 1398, 1342, 1290, 1243, 1199, 1159, 1086, 1021, 963, |
| 484 | 911, 864, 821, 781, 745, 680, 623, 574, 530, 490, 455, 424, |
| 485 | 395, 345, 304, 269, 239, 213, 190, 171, 154, 126, 104, 87, |
| 486 | 73, 61, 52, 44, 38, 28, 21, 16, 12, 10, 8, 6, |
| 487 | 5, 3, 2, 1, 1, 1, 0, 0, |
| 488 | }; |
| 489 | // Normalized distortion: |
| 490 | // This table models the normalized distortion for a Laplacian source |
| 491 | // with given variance when quantized with a uniform quantizer |
| 492 | // with given stepsize. The closed form expression is: |
| 493 | // Dn(x) = 1 - 1/sqrt(2) * x / sinh(x/sqrt(2)) |
| 494 | // where x = qpstep / sqrt(variance). |
| 495 | // Note the actual distortion is Dn * variance. |
| 496 | static const int dist_tab_q10[] = { |
| 497 | 0, 0, 1, 1, 1, 2, 2, 2, 3, 3, 4, 5, |
| 498 | 5, 6, 7, 7, 8, 9, 11, 12, 13, 15, 16, 17, |
| 499 | 18, 21, 24, 26, 29, 31, 34, 36, 39, 44, 49, 54, |
| 500 | 59, 64, 69, 73, 78, 88, 97, 106, 115, 124, 133, 142, |
| 501 | 151, 167, 184, 200, 215, 231, 245, 260, 274, 301, 327, 351, |
| 502 | 375, 397, 418, 439, 458, 495, 528, 559, 587, 613, 637, 659, |
| 503 | 680, 717, 749, 777, 801, 823, 842, 859, 874, 899, 919, 936, |
| 504 | 949, 960, 969, 977, 983, 994, 1001, 1006, 1010, 1013, 1015, 1017, |
| 505 | 1018, 1020, 1022, 1022, 1023, 1023, 1023, 1024, |
| 506 | }; |
| 507 | static const int xsq_iq_q10[] = { |
| 508 | 0, 4, 8, 12, 16, 20, 24, 28, 32, |
| 509 | 40, 48, 56, 64, 72, 80, 88, 96, 112, |
| 510 | 128, 144, 160, 176, 192, 208, 224, 256, 288, |
| 511 | 320, 352, 384, 416, 448, 480, 544, 608, 672, |
| 512 | 736, 800, 864, 928, 992, 1120, 1248, 1376, 1504, |
| 513 | 1632, 1760, 1888, 2016, 2272, 2528, 2784, 3040, 3296, |
| 514 | 3552, 3808, 4064, 4576, 5088, 5600, 6112, 6624, 7136, |
| 515 | 7648, 8160, 9184, 10208, 11232, 12256, 13280, 14304, 15328, |
| 516 | 16352, 18400, 20448, 22496, 24544, 26592, 28640, 30688, 32736, |
| 517 | 36832, 40928, 45024, 49120, 53216, 57312, 61408, 65504, 73696, |
| 518 | 81888, 90080, 98272, 106464, 114656, 122848, 131040, 147424, 163808, |
| 519 | 180192, 196576, 212960, 229344, 245728, |
| 520 | }; |
| 521 | const int tmp = (xsq_q10 >> 2) + 8; |
| 522 | const int k = get_msb(tmp) - 3; |
| 523 | const int xq = (k << 3) + ((tmp >> k) & 0x7); |
| 524 | const int one_q10 = 1 << 10; |
| 525 | const int a_q10 = ((xsq_q10 - xsq_iq_q10[xq]) << 10) >> (2 + k); |
| 526 | const int b_q10 = one_q10 - a_q10; |
| 527 | *r_q10 = (rate_tab_q10[xq] * b_q10 + rate_tab_q10[xq + 1] * a_q10) >> 10; |
| 528 | *d_q10 = (dist_tab_q10[xq] * b_q10 + dist_tab_q10[xq + 1] * a_q10) >> 10; |
| 529 | } |
| 530 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 531 | void av1_model_rd_from_var_lapndz(int64_t var, unsigned int n_log2, |
| 532 | unsigned int qstep, int *rate, |
| 533 | int64_t *dist) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 534 | // This function models the rate and distortion for a Laplacian |
| 535 | // source with given variance when quantized with a uniform quantizer |
| 536 | // with given stepsize. The closed form expressions are in: |
| 537 | // Hang and Chen, "Source Model for transform video coder and its |
| 538 | // application - Part I: Fundamental Theory", IEEE Trans. Circ. |
| 539 | // Sys. for Video Tech., April 1997. |
| 540 | if (var == 0) { |
| 541 | *rate = 0; |
| 542 | *dist = 0; |
| 543 | } else { |
| 544 | int d_q10, r_q10; |
| 545 | static const uint32_t MAX_XSQ_Q10 = 245727; |
| 546 | const uint64_t xsq_q10_64 = |
| 547 | (((uint64_t)qstep * qstep << (n_log2 + 10)) + (var >> 1)) / var; |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 548 | const int xsq_q10 = (int)AOMMIN(xsq_q10_64, MAX_XSQ_Q10); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 549 | model_rd_norm(xsq_q10, &r_q10, &d_q10); |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 550 | *rate = ROUND_POWER_OF_TWO(r_q10 << n_log2, 10 - AV1_PROB_COST_SHIFT); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 551 | *dist = (var * (int64_t)d_q10 + 512) >> 10; |
| 552 | } |
| 553 | } |
| 554 | |
| 555 | static void get_entropy_contexts_plane( |
| 556 | BLOCK_SIZE plane_bsize, TX_SIZE tx_size, const struct macroblockd_plane *pd, |
| 557 | ENTROPY_CONTEXT t_above[2 * MAX_MIB_SIZE], |
| 558 | ENTROPY_CONTEXT t_left[2 * MAX_MIB_SIZE]) { |
Jingning Han | 9eef06d | 2016-12-05 12:39:34 -0800 | [diff] [blame] | 559 | const int num_4x4_w = block_size_wide[plane_bsize] >> tx_size_wide_log2[0]; |
| 560 | const int num_4x4_h = block_size_high[plane_bsize] >> tx_size_high_log2[0]; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 561 | const ENTROPY_CONTEXT *const above = pd->above_context; |
| 562 | const ENTROPY_CONTEXT *const left = pd->left_context; |
| 563 | |
| 564 | int i; |
Jingning Han | aa8a4a5 | 2016-12-13 17:30:48 -0800 | [diff] [blame] | 565 | |
Jingning Han | 39772c1 | 2016-12-01 12:47:05 -0800 | [diff] [blame] | 566 | #if CONFIG_CB4X4 |
Jingning Han | aa8a4a5 | 2016-12-13 17:30:48 -0800 | [diff] [blame] | 567 | switch (tx_size) { |
Jingning Han | 39772c1 | 2016-12-01 12:47:05 -0800 | [diff] [blame] | 568 | case TX_2X2: |
Jingning Han | aa8a4a5 | 2016-12-13 17:30:48 -0800 | [diff] [blame] | 569 | memcpy(t_above, above, sizeof(ENTROPY_CONTEXT) * num_4x4_w); |
| 570 | memcpy(t_left, left, sizeof(ENTROPY_CONTEXT) * num_4x4_h); |
| 571 | break; |
| 572 | case TX_4X4: |
| 573 | for (i = 0; i < num_4x4_w; i += 2) |
| 574 | t_above[i] = !!*(const uint16_t *)&above[i]; |
| 575 | for (i = 0; i < num_4x4_h; i += 2) |
| 576 | t_left[i] = !!*(const uint16_t *)&left[i]; |
| 577 | break; |
| 578 | case TX_8X8: |
| 579 | for (i = 0; i < num_4x4_w; i += 4) |
| 580 | t_above[i] = !!*(const uint32_t *)&above[i]; |
| 581 | for (i = 0; i < num_4x4_h; i += 4) |
| 582 | t_left[i] = !!*(const uint32_t *)&left[i]; |
| 583 | break; |
| 584 | case TX_16X16: |
| 585 | for (i = 0; i < num_4x4_w; i += 8) |
| 586 | t_above[i] = !!*(const uint64_t *)&above[i]; |
| 587 | for (i = 0; i < num_4x4_h; i += 8) |
| 588 | t_left[i] = !!*(const uint64_t *)&left[i]; |
| 589 | break; |
| 590 | case TX_32X32: |
| 591 | for (i = 0; i < num_4x4_w; i += 16) |
| 592 | t_above[i] = |
| 593 | !!(*(const uint64_t *)&above[i] | *(const uint64_t *)&above[i + 8]); |
| 594 | for (i = 0; i < num_4x4_h; i += 16) |
| 595 | t_left[i] = |
| 596 | !!(*(const uint64_t *)&left[i] | *(const uint64_t *)&left[i + 8]); |
| 597 | break; |
Urvang Joshi | 4c6d436 | 2017-05-11 12:35:46 -0700 | [diff] [blame] | 598 | #if CONFIG_TX64X64 |
| 599 | case TX_64X64: |
| 600 | for (i = 0; i < num_4x4_w; i += 32) |
| 601 | t_above[i] = |
| 602 | !!(*(const uint64_t *)&above[i] | *(const uint64_t *)&above[i + 8] | |
| 603 | *(const uint64_t *)&above[i + 16] | |
| 604 | *(const uint64_t *)&above[i + 24]); |
| 605 | for (i = 0; i < num_4x4_h; i += 32) |
| 606 | t_left[i] = |
| 607 | !!(*(const uint64_t *)&left[i] | *(const uint64_t *)&left[i + 8] | |
| 608 | *(const uint64_t *)&left[i + 16] | |
| 609 | *(const uint64_t *)&left[i + 24]); |
| 610 | break; |
| 611 | #endif // CONFIG_TX64X64 |
Jingning Han | aa8a4a5 | 2016-12-13 17:30:48 -0800 | [diff] [blame] | 612 | case TX_4X8: |
| 613 | for (i = 0; i < num_4x4_w; i += 2) |
| 614 | t_above[i] = !!*(const uint16_t *)&above[i]; |
| 615 | for (i = 0; i < num_4x4_h; i += 4) |
| 616 | t_left[i] = !!*(const uint32_t *)&left[i]; |
| 617 | break; |
| 618 | case TX_8X4: |
| 619 | for (i = 0; i < num_4x4_w; i += 4) |
| 620 | t_above[i] = !!*(const uint32_t *)&above[i]; |
| 621 | for (i = 0; i < num_4x4_h; i += 2) |
| 622 | t_left[i] = !!*(const uint16_t *)&left[i]; |
| 623 | break; |
| 624 | case TX_8X16: |
| 625 | for (i = 0; i < num_4x4_w; i += 4) |
| 626 | t_above[i] = !!*(const uint32_t *)&above[i]; |
| 627 | for (i = 0; i < num_4x4_h; i += 8) |
| 628 | t_left[i] = !!*(const uint64_t *)&left[i]; |
| 629 | break; |
| 630 | case TX_16X8: |
| 631 | for (i = 0; i < num_4x4_w; i += 8) |
| 632 | t_above[i] = !!*(const uint64_t *)&above[i]; |
| 633 | for (i = 0; i < num_4x4_h; i += 4) |
| 634 | t_left[i] = !!*(const uint32_t *)&left[i]; |
| 635 | break; |
| 636 | case TX_16X32: |
| 637 | for (i = 0; i < num_4x4_w; i += 8) |
| 638 | t_above[i] = !!*(const uint64_t *)&above[i]; |
| 639 | for (i = 0; i < num_4x4_h; i += 16) |
| 640 | t_left[i] = |
| 641 | !!(*(const uint64_t *)&left[i] | *(const uint64_t *)&left[i + 8]); |
| 642 | break; |
| 643 | case TX_32X16: |
| 644 | for (i = 0; i < num_4x4_w; i += 16) |
| 645 | t_above[i] = |
| 646 | !!(*(const uint64_t *)&above[i] | *(const uint64_t *)&above[i + 8]); |
| 647 | for (i = 0; i < num_4x4_h; i += 8) |
| 648 | t_left[i] = !!*(const uint64_t *)&left[i]; |
Jingning Han | 0f6a60a | 2017-01-20 09:25:40 -0800 | [diff] [blame] | 649 | break; |
Yue Chen | 56e226e | 2017-05-02 16:21:40 -0700 | [diff] [blame^] | 650 | #if CONFIG_EXT_TX && CONFIG_RECT_TX && CONFIG_RECT_TX_EXT |
| 651 | case TX_4X16: |
| 652 | for (i = 0; i < num_4x4_w; i += 2) |
| 653 | t_above[i] = !!*(const uint16_t *)&above[i]; |
| 654 | for (i = 0; i < num_4x4_h; i += 8) |
| 655 | t_left[i] = !!*(const uint64_t *)&left[i]; |
| 656 | break; |
| 657 | case TX_16X4: |
| 658 | for (i = 0; i < num_4x4_w; i += 8) |
| 659 | t_above[i] = !!*(const uint64_t *)&above[i]; |
| 660 | for (i = 0; i < num_4x4_h; i += 2) |
| 661 | t_left[i] = !!*(const uint16_t *)&left[i]; |
| 662 | break; |
| 663 | case TX_8X32: |
| 664 | for (i = 0; i < num_4x4_w; i += 4) |
| 665 | t_above[i] = !!*(const uint32_t *)&above[i]; |
| 666 | for (i = 0; i < num_4x4_h; i += 16) |
| 667 | t_left[i] = |
| 668 | !!(*(const uint64_t *)&left[i] | *(const uint64_t *)&left[i + 8]); |
| 669 | break; |
| 670 | case TX_32X8: |
| 671 | for (i = 0; i < num_4x4_w; i += 16) |
| 672 | t_above[i] = |
| 673 | !!(*(const uint64_t *)&above[i] | *(const uint64_t *)&above[i + 8]); |
| 674 | for (i = 0; i < num_4x4_h; i += 4) |
| 675 | t_left[i] = !!*(const uint32_t *)&left[i]; |
| 676 | break; |
| 677 | #endif // CONFIG_EXT_TX && CONFIG_RECT_TX && CONFIG_RECT_TX_EXT |
Jingning Han | aa8a4a5 | 2016-12-13 17:30:48 -0800 | [diff] [blame] | 678 | |
| 679 | default: assert(0 && "Invalid transform size."); break; |
| 680 | } |
| 681 | return; |
Jingning Han | 39772c1 | 2016-12-01 12:47:05 -0800 | [diff] [blame] | 682 | #endif |
Jingning Han | aa8a4a5 | 2016-12-13 17:30:48 -0800 | [diff] [blame] | 683 | |
| 684 | switch (tx_size) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 685 | case TX_4X4: |
| 686 | memcpy(t_above, above, sizeof(ENTROPY_CONTEXT) * num_4x4_w); |
| 687 | memcpy(t_left, left, sizeof(ENTROPY_CONTEXT) * num_4x4_h); |
| 688 | break; |
| 689 | case TX_8X8: |
| 690 | for (i = 0; i < num_4x4_w; i += 2) |
| 691 | t_above[i] = !!*(const uint16_t *)&above[i]; |
| 692 | for (i = 0; i < num_4x4_h; i += 2) |
| 693 | t_left[i] = !!*(const uint16_t *)&left[i]; |
| 694 | break; |
| 695 | case TX_16X16: |
| 696 | for (i = 0; i < num_4x4_w; i += 4) |
| 697 | t_above[i] = !!*(const uint32_t *)&above[i]; |
| 698 | for (i = 0; i < num_4x4_h; i += 4) |
| 699 | t_left[i] = !!*(const uint32_t *)&left[i]; |
| 700 | break; |
| 701 | case TX_32X32: |
| 702 | for (i = 0; i < num_4x4_w; i += 8) |
| 703 | t_above[i] = !!*(const uint64_t *)&above[i]; |
| 704 | for (i = 0; i < num_4x4_h; i += 8) |
| 705 | t_left[i] = !!*(const uint64_t *)&left[i]; |
| 706 | break; |
Debargha Mukherjee | 153e1f8 | 2016-11-17 09:59:14 -0800 | [diff] [blame] | 707 | #if CONFIG_TX64X64 |
| 708 | case TX_64X64: |
| 709 | for (i = 0; i < num_4x4_w; i += 16) |
| 710 | t_above[i] = |
| 711 | !!(*(const uint64_t *)&above[i] | *(const uint64_t *)&above[i + 8]); |
| 712 | for (i = 0; i < num_4x4_h; i += 16) |
Debargha Mukherjee | 932cf69 | 2016-11-18 08:14:10 -0800 | [diff] [blame] | 713 | t_left[i] = |
| 714 | !!(*(const uint64_t *)&left[i] | *(const uint64_t *)&left[i + 8]); |
Debargha Mukherjee | 153e1f8 | 2016-11-17 09:59:14 -0800 | [diff] [blame] | 715 | break; |
| 716 | #endif // CONFIG_TX64X64 |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 717 | case TX_4X8: |
| 718 | memcpy(t_above, above, sizeof(ENTROPY_CONTEXT) * num_4x4_w); |
| 719 | for (i = 0; i < num_4x4_h; i += 2) |
| 720 | t_left[i] = !!*(const uint16_t *)&left[i]; |
| 721 | break; |
| 722 | case TX_8X4: |
| 723 | for (i = 0; i < num_4x4_w; i += 2) |
| 724 | t_above[i] = !!*(const uint16_t *)&above[i]; |
| 725 | memcpy(t_left, left, sizeof(ENTROPY_CONTEXT) * num_4x4_h); |
| 726 | break; |
| 727 | case TX_8X16: |
| 728 | for (i = 0; i < num_4x4_w; i += 2) |
| 729 | t_above[i] = !!*(const uint16_t *)&above[i]; |
| 730 | for (i = 0; i < num_4x4_h; i += 4) |
| 731 | t_left[i] = !!*(const uint32_t *)&left[i]; |
| 732 | break; |
| 733 | case TX_16X8: |
| 734 | for (i = 0; i < num_4x4_w; i += 4) |
| 735 | t_above[i] = !!*(const uint32_t *)&above[i]; |
| 736 | for (i = 0; i < num_4x4_h; i += 2) |
| 737 | t_left[i] = !!*(const uint16_t *)&left[i]; |
| 738 | break; |
| 739 | case TX_16X32: |
| 740 | for (i = 0; i < num_4x4_w; i += 4) |
| 741 | t_above[i] = !!*(const uint32_t *)&above[i]; |
| 742 | for (i = 0; i < num_4x4_h; i += 8) |
| 743 | t_left[i] = !!*(const uint64_t *)&left[i]; |
| 744 | break; |
| 745 | case TX_32X16: |
| 746 | for (i = 0; i < num_4x4_w; i += 8) |
| 747 | t_above[i] = !!*(const uint64_t *)&above[i]; |
| 748 | for (i = 0; i < num_4x4_h; i += 4) |
| 749 | t_left[i] = !!*(const uint32_t *)&left[i]; |
| 750 | break; |
Yue Chen | 56e226e | 2017-05-02 16:21:40 -0700 | [diff] [blame^] | 751 | #if CONFIG_EXT_TX && CONFIG_RECT_TX && CONFIG_RECT_TX_EXT |
| 752 | case TX_4X16: |
| 753 | memcpy(t_above, above, sizeof(ENTROPY_CONTEXT) * num_4x4_w); |
| 754 | for (i = 0; i < num_4x4_h; i += 4) |
| 755 | t_left[i] = !!*(const uint32_t *)&left[i]; |
| 756 | break; |
| 757 | case TX_16X4: |
| 758 | for (i = 0; i < num_4x4_w; i += 4) |
| 759 | t_above[i] = !!*(const uint32_t *)&above[i]; |
| 760 | memcpy(t_left, left, sizeof(ENTROPY_CONTEXT) * num_4x4_h); |
| 761 | break; |
| 762 | case TX_8X32: |
| 763 | for (i = 0; i < num_4x4_w; i += 2) |
| 764 | t_above[i] = !!*(const uint16_t *)&above[i]; |
| 765 | for (i = 0; i < num_4x4_h; i += 8) |
| 766 | t_left[i] = !!*(const uint64_t *)&left[i]; |
| 767 | break; |
| 768 | case TX_32X8: |
| 769 | for (i = 0; i < num_4x4_w; i += 8) |
| 770 | t_above[i] = !!*(const uint64_t *)&above[i]; |
| 771 | for (i = 0; i < num_4x4_h; i += 2) |
| 772 | t_left[i] = !!*(const uint16_t *)&left[i]; |
| 773 | break; |
| 774 | #endif // CONFIG_EXT_TX && CONFIG_RECT_TX && CONFIG_RECT_TX_EXT |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 775 | default: assert(0 && "Invalid transform size."); break; |
| 776 | } |
| 777 | } |
| 778 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 779 | void av1_get_entropy_contexts(BLOCK_SIZE bsize, TX_SIZE tx_size, |
| 780 | const struct macroblockd_plane *pd, |
| 781 | ENTROPY_CONTEXT t_above[2 * MAX_MIB_SIZE], |
| 782 | ENTROPY_CONTEXT t_left[2 * MAX_MIB_SIZE]) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 783 | const BLOCK_SIZE plane_bsize = get_plane_block_size(bsize, pd); |
| 784 | get_entropy_contexts_plane(plane_bsize, tx_size, pd, t_above, t_left); |
| 785 | } |
| 786 | |
Urvang Joshi | 5264844 | 2016-10-13 17:27:51 -0700 | [diff] [blame] | 787 | void av1_mv_pred(const AV1_COMP *cpi, MACROBLOCK *x, uint8_t *ref_y_buffer, |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 788 | int ref_y_stride, int ref_frame, BLOCK_SIZE block_size) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 789 | int i; |
| 790 | int zero_seen = 0; |
| 791 | int best_index = 0; |
| 792 | int best_sad = INT_MAX; |
| 793 | int this_sad = INT_MAX; |
| 794 | int max_mv = 0; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 795 | uint8_t *src_y_ptr = x->plane[0].src.buf; |
| 796 | uint8_t *ref_y_ptr; |
Thomas Daede | 0743857 | 2017-05-10 11:22:33 -0700 | [diff] [blame] | 797 | MV pred_mv[MAX_MV_REF_CANDIDATES + 1]; |
Debargha Mukherjee | d80d63f | 2017-05-17 15:53:27 -0700 | [diff] [blame] | 798 | int num_mv_refs = 0; |
| 799 | |
| 800 | pred_mv[num_mv_refs++] = x->mbmi_ext->ref_mvs[ref_frame][0].as_mv; |
| 801 | if (x->mbmi_ext->ref_mvs[ref_frame][0].as_int != |
| 802 | x->mbmi_ext->ref_mvs[ref_frame][1].as_int) { |
| 803 | pred_mv[num_mv_refs++] = x->mbmi_ext->ref_mvs[ref_frame][1].as_mv; |
Thomas Daede | 0743857 | 2017-05-10 11:22:33 -0700 | [diff] [blame] | 804 | } |
Debargha Mukherjee | d80d63f | 2017-05-17 15:53:27 -0700 | [diff] [blame] | 805 | if (cpi->sf.adaptive_motion_search && block_size < x->max_partition_size) |
| 806 | pred_mv[num_mv_refs++] = x->pred_mv[ref_frame]; |
| 807 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 808 | assert(num_mv_refs <= (int)(sizeof(pred_mv) / sizeof(pred_mv[0]))); |
Debargha Mukherjee | d80d63f | 2017-05-17 15:53:27 -0700 | [diff] [blame] | 809 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 810 | // Get the sad for each candidate reference mv. |
| 811 | for (i = 0; i < num_mv_refs; ++i) { |
| 812 | const MV *this_mv = &pred_mv[i]; |
| 813 | int fp_row, fp_col; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 814 | fp_row = (this_mv->row + 3 + (this_mv->row >= 0)) >> 3; |
| 815 | fp_col = (this_mv->col + 3 + (this_mv->col >= 0)) >> 3; |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 816 | max_mv = AOMMAX(max_mv, AOMMAX(abs(this_mv->row), abs(this_mv->col)) >> 3); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 817 | |
| 818 | if (fp_row == 0 && fp_col == 0 && zero_seen) continue; |
| 819 | zero_seen |= (fp_row == 0 && fp_col == 0); |
| 820 | |
| 821 | ref_y_ptr = &ref_y_buffer[ref_y_stride * fp_row + fp_col]; |
| 822 | // Find sad for current vector. |
| 823 | this_sad = cpi->fn_ptr[block_size].sdf(src_y_ptr, x->plane[0].src.stride, |
| 824 | ref_y_ptr, ref_y_stride); |
| 825 | // Note if it is the best so far. |
| 826 | if (this_sad < best_sad) { |
| 827 | best_sad = this_sad; |
| 828 | best_index = i; |
| 829 | } |
| 830 | } |
| 831 | |
| 832 | // Note the index of the mv that worked best in the reference list. |
| 833 | x->mv_best_ref_index[ref_frame] = best_index; |
| 834 | x->max_mv_context[ref_frame] = max_mv; |
| 835 | x->pred_mv_sad[ref_frame] = best_sad; |
| 836 | } |
| 837 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 838 | void av1_setup_pred_block(const MACROBLOCKD *xd, |
| 839 | struct buf_2d dst[MAX_MB_PLANE], |
| 840 | const YV12_BUFFER_CONFIG *src, int mi_row, int mi_col, |
| 841 | const struct scale_factors *scale, |
| 842 | const struct scale_factors *scale_uv) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 843 | int i; |
| 844 | |
| 845 | dst[0].buf = src->y_buffer; |
| 846 | dst[0].stride = src->y_stride; |
| 847 | dst[1].buf = src->u_buffer; |
| 848 | dst[2].buf = src->v_buffer; |
| 849 | dst[1].stride = dst[2].stride = src->uv_stride; |
| 850 | |
| 851 | for (i = 0; i < MAX_MB_PLANE; ++i) { |
Jingning Han | 91d9a79 | 2017-04-18 12:01:52 -0700 | [diff] [blame] | 852 | setup_pred_plane(dst + i, xd->mi[0]->mbmi.sb_type, dst[i].buf, |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 853 | i ? src->uv_crop_width : src->y_crop_width, |
| 854 | i ? src->uv_crop_height : src->y_crop_height, |
| 855 | dst[i].stride, mi_row, mi_col, i ? scale_uv : scale, |
| 856 | xd->plane[i].subsampling_x, xd->plane[i].subsampling_y); |
| 857 | } |
| 858 | } |
| 859 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 860 | int av1_raster_block_offset(BLOCK_SIZE plane_bsize, int raster_block, |
| 861 | int stride) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 862 | const int bw = b_width_log2_lookup[plane_bsize]; |
| 863 | const int y = 4 * (raster_block >> bw); |
| 864 | const int x = 4 * (raster_block & ((1 << bw) - 1)); |
| 865 | return y * stride + x; |
| 866 | } |
| 867 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 868 | int16_t *av1_raster_block_offset_int16(BLOCK_SIZE plane_bsize, int raster_block, |
| 869 | int16_t *base) { |
Jingning Han | ae5cfde | 2016-11-30 12:01:44 -0800 | [diff] [blame] | 870 | const int stride = block_size_wide[plane_bsize]; |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 871 | return base + av1_raster_block_offset(plane_bsize, raster_block, stride); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 872 | } |
| 873 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 874 | YV12_BUFFER_CONFIG *av1_get_scaled_ref_frame(const AV1_COMP *cpi, |
| 875 | int ref_frame) { |
| 876 | const AV1_COMMON *const cm = &cpi->common; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 877 | const int scaled_idx = cpi->scaled_ref_idx[ref_frame - 1]; |
| 878 | const int ref_idx = get_ref_frame_buf_idx(cpi, ref_frame); |
| 879 | return (scaled_idx != ref_idx && scaled_idx != INVALID_IDX) |
| 880 | ? &cm->buffer_pool->frame_bufs[scaled_idx].buf |
| 881 | : NULL; |
| 882 | } |
| 883 | |
| 884 | #if CONFIG_DUAL_FILTER |
Angie Chiang | 65eb2cf | 2016-10-26 10:48:47 -0700 | [diff] [blame] | 885 | int av1_get_switchable_rate(const AV1_COMP *cpi, const MACROBLOCKD *xd) { |
Angie Chiang | 75c2209 | 2016-10-25 12:19:16 -0700 | [diff] [blame] | 886 | const AV1_COMMON *const cm = &cpi->common; |
| 887 | if (cm->interp_filter == SWITCHABLE) { |
| 888 | const MB_MODE_INFO *const mbmi = &xd->mi[0]->mbmi; |
| 889 | int inter_filter_cost = 0; |
| 890 | int dir; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 891 | |
Angie Chiang | 75c2209 | 2016-10-25 12:19:16 -0700 | [diff] [blame] | 892 | for (dir = 0; dir < 2; ++dir) { |
| 893 | if (has_subpel_mv_component(xd->mi[0], xd, dir) || |
| 894 | (mbmi->ref_frame[1] > INTRA_FRAME && |
| 895 | has_subpel_mv_component(xd->mi[0], xd, dir + 2))) { |
| 896 | const int ctx = av1_get_pred_context_switchable_interp(xd, dir); |
| 897 | inter_filter_cost += |
| 898 | cpi->switchable_interp_costs[ctx][mbmi->interp_filter[dir]]; |
| 899 | } |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 900 | } |
Angie Chiang | 75c2209 | 2016-10-25 12:19:16 -0700 | [diff] [blame] | 901 | return SWITCHABLE_INTERP_RATE_FACTOR * inter_filter_cost; |
| 902 | } else { |
| 903 | return 0; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 904 | } |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 905 | } |
| 906 | #else |
Angie Chiang | 65eb2cf | 2016-10-26 10:48:47 -0700 | [diff] [blame] | 907 | int av1_get_switchable_rate(const AV1_COMP *cpi, const MACROBLOCKD *xd) { |
Angie Chiang | 75c2209 | 2016-10-25 12:19:16 -0700 | [diff] [blame] | 908 | const AV1_COMMON *const cm = &cpi->common; |
| 909 | if (cm->interp_filter == SWITCHABLE) { |
Angie Chiang | 1733f6b | 2017-01-05 09:52:20 -0800 | [diff] [blame] | 910 | const MB_MODE_INFO *const mbmi = &xd->mi[0]->mbmi; |
| 911 | const int ctx = av1_get_pred_context_switchable_interp(xd); |
| 912 | return SWITCHABLE_INTERP_RATE_FACTOR * |
| 913 | cpi->switchable_interp_costs[ctx][mbmi->interp_filter]; |
Angie Chiang | 75c2209 | 2016-10-25 12:19:16 -0700 | [diff] [blame] | 914 | } |
| 915 | return 0; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 916 | } |
| 917 | #endif |
| 918 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 919 | void av1_set_rd_speed_thresholds(AV1_COMP *cpi) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 920 | int i; |
| 921 | RD_OPT *const rd = &cpi->rd; |
| 922 | SPEED_FEATURES *const sf = &cpi->sf; |
| 923 | |
| 924 | // Set baseline threshold values. |
Thomas Daede | 6eca835 | 2017-03-17 14:14:12 -0700 | [diff] [blame] | 925 | for (i = 0; i < MAX_MODES; ++i) rd->thresh_mult[i] = cpi->oxcf.mode == 0; |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 926 | |
| 927 | if (sf->adaptive_rd_thresh) { |
| 928 | rd->thresh_mult[THR_NEARESTMV] = 300; |
| 929 | #if CONFIG_EXT_REFS |
| 930 | rd->thresh_mult[THR_NEARESTL2] = 300; |
| 931 | rd->thresh_mult[THR_NEARESTL3] = 300; |
| 932 | rd->thresh_mult[THR_NEARESTB] = 300; |
| 933 | #endif // CONFIG_EXT_REFS |
| 934 | rd->thresh_mult[THR_NEARESTA] = 300; |
| 935 | rd->thresh_mult[THR_NEARESTG] = 300; |
| 936 | } else { |
| 937 | rd->thresh_mult[THR_NEARESTMV] = 0; |
| 938 | #if CONFIG_EXT_REFS |
| 939 | rd->thresh_mult[THR_NEARESTL2] = 0; |
| 940 | rd->thresh_mult[THR_NEARESTL3] = 0; |
| 941 | rd->thresh_mult[THR_NEARESTB] = 0; |
| 942 | #endif // CONFIG_EXT_REFS |
| 943 | rd->thresh_mult[THR_NEARESTA] = 0; |
| 944 | rd->thresh_mult[THR_NEARESTG] = 0; |
| 945 | } |
| 946 | |
| 947 | rd->thresh_mult[THR_DC] += 1000; |
| 948 | |
| 949 | rd->thresh_mult[THR_NEWMV] += 1000; |
| 950 | #if CONFIG_EXT_REFS |
| 951 | rd->thresh_mult[THR_NEWL2] += 1000; |
| 952 | rd->thresh_mult[THR_NEWL3] += 1000; |
| 953 | rd->thresh_mult[THR_NEWB] += 1000; |
| 954 | #endif // CONFIG_EXT_REFS |
| 955 | rd->thresh_mult[THR_NEWA] += 1000; |
| 956 | rd->thresh_mult[THR_NEWG] += 1000; |
| 957 | |
| 958 | rd->thresh_mult[THR_NEARMV] += 1000; |
| 959 | #if CONFIG_EXT_REFS |
| 960 | rd->thresh_mult[THR_NEARL2] += 1000; |
| 961 | rd->thresh_mult[THR_NEARL3] += 1000; |
| 962 | rd->thresh_mult[THR_NEARB] += 1000; |
| 963 | #endif // CONFIG_EXT_REFS |
| 964 | rd->thresh_mult[THR_NEARA] += 1000; |
| 965 | rd->thresh_mult[THR_NEARG] += 1000; |
| 966 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 967 | rd->thresh_mult[THR_ZEROMV] += 2000; |
| 968 | #if CONFIG_EXT_REFS |
| 969 | rd->thresh_mult[THR_ZEROL2] += 2000; |
| 970 | rd->thresh_mult[THR_ZEROL3] += 2000; |
| 971 | rd->thresh_mult[THR_ZEROB] += 2000; |
| 972 | #endif // CONFIG_EXT_REFS |
| 973 | rd->thresh_mult[THR_ZEROG] += 2000; |
| 974 | rd->thresh_mult[THR_ZEROA] += 2000; |
| 975 | |
| 976 | rd->thresh_mult[THR_TM] += 1000; |
| 977 | |
| 978 | #if CONFIG_EXT_INTER |
| 979 | |
| 980 | rd->thresh_mult[THR_COMP_NEAREST_NEARESTLA] += 1000; |
| 981 | #if CONFIG_EXT_REFS |
| 982 | rd->thresh_mult[THR_COMP_NEAREST_NEARESTL2A] += 1000; |
| 983 | rd->thresh_mult[THR_COMP_NEAREST_NEARESTL3A] += 1000; |
| 984 | #endif // CONFIG_EXT_REFS |
| 985 | rd->thresh_mult[THR_COMP_NEAREST_NEARESTGA] += 1000; |
| 986 | #if CONFIG_EXT_REFS |
| 987 | rd->thresh_mult[THR_COMP_NEAREST_NEARESTLB] += 1000; |
| 988 | rd->thresh_mult[THR_COMP_NEAREST_NEARESTL2B] += 1000; |
| 989 | rd->thresh_mult[THR_COMP_NEAREST_NEARESTL3B] += 1000; |
| 990 | rd->thresh_mult[THR_COMP_NEAREST_NEARESTGB] += 1000; |
| 991 | #endif // CONFIG_EXT_REFS |
| 992 | |
| 993 | #else // CONFIG_EXT_INTER |
| 994 | |
| 995 | rd->thresh_mult[THR_COMP_NEARESTLA] += 1000; |
| 996 | #if CONFIG_EXT_REFS |
| 997 | rd->thresh_mult[THR_COMP_NEARESTL2A] += 1000; |
| 998 | rd->thresh_mult[THR_COMP_NEARESTL3A] += 1000; |
| 999 | #endif // CONFIG_EXT_REFS |
| 1000 | rd->thresh_mult[THR_COMP_NEARESTGA] += 1000; |
| 1001 | #if CONFIG_EXT_REFS |
| 1002 | rd->thresh_mult[THR_COMP_NEARESTLB] += 1000; |
| 1003 | rd->thresh_mult[THR_COMP_NEARESTL2B] += 1000; |
| 1004 | rd->thresh_mult[THR_COMP_NEARESTL3B] += 1000; |
| 1005 | rd->thresh_mult[THR_COMP_NEARESTGB] += 1000; |
| 1006 | #endif // CONFIG_EXT_REFS |
| 1007 | |
| 1008 | #endif // CONFIG_EXT_INTER |
| 1009 | |
| 1010 | #if CONFIG_EXT_INTER |
| 1011 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1012 | rd->thresh_mult[THR_COMP_NEAR_NEARLA] += 1200; |
| 1013 | rd->thresh_mult[THR_COMP_NEAREST_NEWLA] += 1500; |
| 1014 | rd->thresh_mult[THR_COMP_NEW_NEARESTLA] += 1500; |
| 1015 | rd->thresh_mult[THR_COMP_NEAR_NEWLA] += 1700; |
| 1016 | rd->thresh_mult[THR_COMP_NEW_NEARLA] += 1700; |
| 1017 | rd->thresh_mult[THR_COMP_NEW_NEWLA] += 2000; |
| 1018 | rd->thresh_mult[THR_COMP_ZERO_ZEROLA] += 2500; |
| 1019 | |
| 1020 | #if CONFIG_EXT_REFS |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1021 | rd->thresh_mult[THR_COMP_NEAR_NEARL2A] += 1200; |
| 1022 | rd->thresh_mult[THR_COMP_NEAREST_NEWL2A] += 1500; |
| 1023 | rd->thresh_mult[THR_COMP_NEW_NEARESTL2A] += 1500; |
| 1024 | rd->thresh_mult[THR_COMP_NEAR_NEWL2A] += 1700; |
| 1025 | rd->thresh_mult[THR_COMP_NEW_NEARL2A] += 1700; |
| 1026 | rd->thresh_mult[THR_COMP_NEW_NEWL2A] += 2000; |
| 1027 | rd->thresh_mult[THR_COMP_ZERO_ZEROL2A] += 2500; |
| 1028 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1029 | rd->thresh_mult[THR_COMP_NEAR_NEARL3A] += 1200; |
| 1030 | rd->thresh_mult[THR_COMP_NEAREST_NEWL3A] += 1500; |
| 1031 | rd->thresh_mult[THR_COMP_NEW_NEARESTL3A] += 1500; |
| 1032 | rd->thresh_mult[THR_COMP_NEAR_NEWL3A] += 1700; |
| 1033 | rd->thresh_mult[THR_COMP_NEW_NEARL3A] += 1700; |
| 1034 | rd->thresh_mult[THR_COMP_NEW_NEWL3A] += 2000; |
| 1035 | rd->thresh_mult[THR_COMP_ZERO_ZEROL3A] += 2500; |
| 1036 | #endif // CONFIG_EXT_REFS |
| 1037 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1038 | rd->thresh_mult[THR_COMP_NEAR_NEARGA] += 1200; |
| 1039 | rd->thresh_mult[THR_COMP_NEAREST_NEWGA] += 1500; |
| 1040 | rd->thresh_mult[THR_COMP_NEW_NEARESTGA] += 1500; |
| 1041 | rd->thresh_mult[THR_COMP_NEAR_NEWGA] += 1700; |
| 1042 | rd->thresh_mult[THR_COMP_NEW_NEARGA] += 1700; |
| 1043 | rd->thresh_mult[THR_COMP_NEW_NEWGA] += 2000; |
| 1044 | rd->thresh_mult[THR_COMP_ZERO_ZEROGA] += 2500; |
| 1045 | |
| 1046 | #if CONFIG_EXT_REFS |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1047 | rd->thresh_mult[THR_COMP_NEAR_NEARLB] += 1200; |
| 1048 | rd->thresh_mult[THR_COMP_NEAREST_NEWLB] += 1500; |
| 1049 | rd->thresh_mult[THR_COMP_NEW_NEARESTLB] += 1500; |
| 1050 | rd->thresh_mult[THR_COMP_NEAR_NEWLB] += 1700; |
| 1051 | rd->thresh_mult[THR_COMP_NEW_NEARLB] += 1700; |
| 1052 | rd->thresh_mult[THR_COMP_NEW_NEWLB] += 2000; |
| 1053 | rd->thresh_mult[THR_COMP_ZERO_ZEROLB] += 2500; |
| 1054 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1055 | rd->thresh_mult[THR_COMP_NEAR_NEARL2B] += 1200; |
| 1056 | rd->thresh_mult[THR_COMP_NEAREST_NEWL2B] += 1500; |
| 1057 | rd->thresh_mult[THR_COMP_NEW_NEARESTL2B] += 1500; |
| 1058 | rd->thresh_mult[THR_COMP_NEAR_NEWL2B] += 1700; |
| 1059 | rd->thresh_mult[THR_COMP_NEW_NEARL2B] += 1700; |
| 1060 | rd->thresh_mult[THR_COMP_NEW_NEWL2B] += 2000; |
| 1061 | rd->thresh_mult[THR_COMP_ZERO_ZEROL2B] += 2500; |
| 1062 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1063 | rd->thresh_mult[THR_COMP_NEAR_NEARL3B] += 1200; |
| 1064 | rd->thresh_mult[THR_COMP_NEAREST_NEWL3B] += 1500; |
| 1065 | rd->thresh_mult[THR_COMP_NEW_NEARESTL3B] += 1500; |
| 1066 | rd->thresh_mult[THR_COMP_NEAR_NEWL3B] += 1700; |
| 1067 | rd->thresh_mult[THR_COMP_NEW_NEARL3B] += 1700; |
| 1068 | rd->thresh_mult[THR_COMP_NEW_NEWL3B] += 2000; |
| 1069 | rd->thresh_mult[THR_COMP_ZERO_ZEROL3B] += 2500; |
| 1070 | |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1071 | rd->thresh_mult[THR_COMP_NEAR_NEARGB] += 1200; |
| 1072 | rd->thresh_mult[THR_COMP_NEAREST_NEWGB] += 1500; |
| 1073 | rd->thresh_mult[THR_COMP_NEW_NEARESTGB] += 1500; |
| 1074 | rd->thresh_mult[THR_COMP_NEAR_NEWGB] += 1700; |
| 1075 | rd->thresh_mult[THR_COMP_NEW_NEARGB] += 1700; |
| 1076 | rd->thresh_mult[THR_COMP_NEW_NEWGB] += 2000; |
| 1077 | rd->thresh_mult[THR_COMP_ZERO_ZEROGB] += 2500; |
| 1078 | #endif // CONFIG_EXT_REFS |
| 1079 | |
| 1080 | #else // CONFIG_EXT_INTER |
| 1081 | |
| 1082 | rd->thresh_mult[THR_COMP_NEARLA] += 1500; |
| 1083 | rd->thresh_mult[THR_COMP_NEWLA] += 2000; |
| 1084 | #if CONFIG_EXT_REFS |
| 1085 | rd->thresh_mult[THR_COMP_NEARL2A] += 1500; |
| 1086 | rd->thresh_mult[THR_COMP_NEWL2A] += 2000; |
| 1087 | rd->thresh_mult[THR_COMP_NEARL3A] += 1500; |
| 1088 | rd->thresh_mult[THR_COMP_NEWL3A] += 2000; |
| 1089 | #endif // CONFIG_EXT_REFS |
| 1090 | rd->thresh_mult[THR_COMP_NEARGA] += 1500; |
| 1091 | rd->thresh_mult[THR_COMP_NEWGA] += 2000; |
| 1092 | |
| 1093 | #if CONFIG_EXT_REFS |
| 1094 | rd->thresh_mult[THR_COMP_NEARLB] += 1500; |
| 1095 | rd->thresh_mult[THR_COMP_NEWLB] += 2000; |
| 1096 | rd->thresh_mult[THR_COMP_NEARL2B] += 1500; |
| 1097 | rd->thresh_mult[THR_COMP_NEWL2B] += 2000; |
| 1098 | rd->thresh_mult[THR_COMP_NEARL3B] += 1500; |
| 1099 | rd->thresh_mult[THR_COMP_NEWL3B] += 2000; |
| 1100 | rd->thresh_mult[THR_COMP_NEARGB] += 1500; |
| 1101 | rd->thresh_mult[THR_COMP_NEWGB] += 2000; |
| 1102 | #endif // CONFIG_EXT_REFS |
| 1103 | |
| 1104 | rd->thresh_mult[THR_COMP_ZEROLA] += 2500; |
| 1105 | #if CONFIG_EXT_REFS |
| 1106 | rd->thresh_mult[THR_COMP_ZEROL2A] += 2500; |
| 1107 | rd->thresh_mult[THR_COMP_ZEROL3A] += 2500; |
| 1108 | #endif // CONFIG_EXT_REFS |
| 1109 | rd->thresh_mult[THR_COMP_ZEROGA] += 2500; |
| 1110 | |
| 1111 | #if CONFIG_EXT_REFS |
| 1112 | rd->thresh_mult[THR_COMP_ZEROLB] += 2500; |
| 1113 | rd->thresh_mult[THR_COMP_ZEROL2B] += 2500; |
| 1114 | rd->thresh_mult[THR_COMP_ZEROL3B] += 2500; |
| 1115 | rd->thresh_mult[THR_COMP_ZEROGB] += 2500; |
| 1116 | #endif // CONFIG_EXT_REFS |
| 1117 | |
| 1118 | #endif // CONFIG_EXT_INTER |
| 1119 | |
| 1120 | rd->thresh_mult[THR_H_PRED] += 2000; |
| 1121 | rd->thresh_mult[THR_V_PRED] += 2000; |
| 1122 | rd->thresh_mult[THR_D135_PRED] += 2500; |
| 1123 | rd->thresh_mult[THR_D207_PRED] += 2500; |
| 1124 | rd->thresh_mult[THR_D153_PRED] += 2500; |
| 1125 | rd->thresh_mult[THR_D63_PRED] += 2500; |
| 1126 | rd->thresh_mult[THR_D117_PRED] += 2500; |
| 1127 | rd->thresh_mult[THR_D45_PRED] += 2500; |
| 1128 | |
| 1129 | #if CONFIG_EXT_INTER |
| 1130 | rd->thresh_mult[THR_COMP_INTERINTRA_ZEROL] += 1500; |
| 1131 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARESTL] += 1500; |
| 1132 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARL] += 1500; |
| 1133 | rd->thresh_mult[THR_COMP_INTERINTRA_NEWL] += 2000; |
| 1134 | |
| 1135 | #if CONFIG_EXT_REFS |
| 1136 | rd->thresh_mult[THR_COMP_INTERINTRA_ZEROL2] += 1500; |
| 1137 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARESTL2] += 1500; |
| 1138 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARL2] += 1500; |
| 1139 | rd->thresh_mult[THR_COMP_INTERINTRA_NEWL2] += 2000; |
| 1140 | |
| 1141 | rd->thresh_mult[THR_COMP_INTERINTRA_ZEROL3] += 1500; |
| 1142 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARESTL3] += 1500; |
| 1143 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARL3] += 1500; |
| 1144 | rd->thresh_mult[THR_COMP_INTERINTRA_NEWL3] += 2000; |
| 1145 | #endif // CONFIG_EXT_REFS |
| 1146 | |
| 1147 | rd->thresh_mult[THR_COMP_INTERINTRA_ZEROG] += 1500; |
| 1148 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARESTG] += 1500; |
| 1149 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARG] += 1500; |
| 1150 | rd->thresh_mult[THR_COMP_INTERINTRA_NEWG] += 2000; |
| 1151 | |
| 1152 | #if CONFIG_EXT_REFS |
| 1153 | rd->thresh_mult[THR_COMP_INTERINTRA_ZEROB] += 1500; |
| 1154 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARESTB] += 1500; |
| 1155 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARB] += 1500; |
| 1156 | rd->thresh_mult[THR_COMP_INTERINTRA_NEWB] += 2000; |
| 1157 | #endif // CONFIG_EXT_REFS |
| 1158 | |
| 1159 | rd->thresh_mult[THR_COMP_INTERINTRA_ZEROA] += 1500; |
| 1160 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARESTA] += 1500; |
| 1161 | rd->thresh_mult[THR_COMP_INTERINTRA_NEARA] += 1500; |
| 1162 | rd->thresh_mult[THR_COMP_INTERINTRA_NEWA] += 2000; |
| 1163 | #endif // CONFIG_EXT_INTER |
| 1164 | } |
| 1165 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 1166 | void av1_set_rd_speed_thresholds_sub8x8(AV1_COMP *cpi) { |
Thomas Daede | 6eca835 | 2017-03-17 14:14:12 -0700 | [diff] [blame] | 1167 | static const int thresh_mult[MAX_REFS] = { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1168 | #if CONFIG_EXT_REFS |
Thomas Daede | 6eca835 | 2017-03-17 14:14:12 -0700 | [diff] [blame] | 1169 | 2500, |
| 1170 | 2500, |
| 1171 | 2500, |
| 1172 | 2500, |
| 1173 | 2500, |
| 1174 | 2500, |
| 1175 | 4500, |
| 1176 | 4500, |
| 1177 | 4500, |
| 1178 | 4500, |
| 1179 | 4500, |
| 1180 | 4500, |
| 1181 | 4500, |
| 1182 | 4500, |
| 1183 | 2500 |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1184 | #else |
Thomas Daede | 6eca835 | 2017-03-17 14:14:12 -0700 | [diff] [blame] | 1185 | 2500, |
| 1186 | 2500, |
| 1187 | 2500, |
| 1188 | 4500, |
| 1189 | 4500, |
| 1190 | 2500 |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1191 | #endif // CONFIG_EXT_REFS |
| 1192 | }; |
| 1193 | RD_OPT *const rd = &cpi->rd; |
Thomas Daede | 6eca835 | 2017-03-17 14:14:12 -0700 | [diff] [blame] | 1194 | memcpy(rd->thresh_mult_sub8x8, thresh_mult, sizeof(thresh_mult)); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1195 | } |
| 1196 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 1197 | void av1_update_rd_thresh_fact(const AV1_COMMON *const cm, |
| 1198 | int (*factor_buf)[MAX_MODES], int rd_thresh, |
| 1199 | int bsize, int best_mode_index) { |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1200 | if (rd_thresh > 0) { |
Jingning Han | 9104bed | 2016-12-14 09:38:00 -0800 | [diff] [blame] | 1201 | #if CONFIG_CB4X4 |
| 1202 | const int top_mode = MAX_MODES; |
| 1203 | #else |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1204 | const int top_mode = bsize < BLOCK_8X8 ? MAX_REFS : MAX_MODES; |
Jingning Han | 9104bed | 2016-12-14 09:38:00 -0800 | [diff] [blame] | 1205 | #endif |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1206 | int mode; |
| 1207 | for (mode = 0; mode < top_mode; ++mode) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 1208 | const BLOCK_SIZE min_size = AOMMAX(bsize - 1, BLOCK_4X4); |
Urvang Joshi | cb586f3 | 2016-09-20 11:36:33 -0700 | [diff] [blame] | 1209 | const BLOCK_SIZE max_size = AOMMIN(bsize + 2, (int)cm->sb_size); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1210 | BLOCK_SIZE bs; |
| 1211 | for (bs = min_size; bs <= max_size; ++bs) { |
| 1212 | int *const fact = &factor_buf[bs][mode]; |
| 1213 | if (mode == best_mode_index) { |
| 1214 | *fact -= (*fact >> 4); |
| 1215 | } else { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 1216 | *fact = AOMMIN(*fact + RD_THRESH_INC, rd_thresh * RD_THRESH_MAX_FACT); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1217 | } |
| 1218 | } |
| 1219 | } |
| 1220 | } |
| 1221 | } |
| 1222 | |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 1223 | int av1_get_intra_cost_penalty(int qindex, int qdelta, |
| 1224 | aom_bit_depth_t bit_depth) { |
| 1225 | const int q = av1_dc_quant(qindex, qdelta, bit_depth); |
Sebastien Alaiwan | 71e8784 | 2017-04-12 16:03:28 +0200 | [diff] [blame] | 1226 | #if CONFIG_HIGHBITDEPTH |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1227 | switch (bit_depth) { |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 1228 | case AOM_BITS_8: return 20 * q; |
| 1229 | case AOM_BITS_10: return 5 * q; |
| 1230 | case AOM_BITS_12: return ROUND_POWER_OF_TWO(5 * q, 2); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1231 | default: |
Yaowu Xu | f883b42 | 2016-08-30 14:01:10 -0700 | [diff] [blame] | 1232 | assert(0 && "bit_depth should be AOM_BITS_8, AOM_BITS_10 or AOM_BITS_12"); |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1233 | return -1; |
| 1234 | } |
| 1235 | #else |
| 1236 | return 20 * q; |
Sebastien Alaiwan | 71e8784 | 2017-04-12 16:03:28 +0200 | [diff] [blame] | 1237 | #endif // CONFIG_HIGHBITDEPTH |
Yaowu Xu | c27fc14 | 2016-08-22 16:08:15 -0700 | [diff] [blame] | 1238 | } |