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Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_COMMON_BLOCKD_H_
13#define AV1_COMMON_BLOCKD_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
Yaowu Xuf883b422016-08-30 14:01:10 -070015#include "./aom_config.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070016
Yaowu Xuf883b422016-08-30 14:01:10 -070017#include "aom_dsp/aom_dsp_common.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070018#include "aom_ports/mem.h"
19#include "aom_scale/yv12config.h"
20
21#include "av1/common/common_data.h"
22#include "av1/common/quant_common.h"
23#include "av1/common/entropy.h"
24#include "av1/common/entropymode.h"
25#include "av1/common/mv.h"
26#include "av1/common/scale.h"
27#include "av1/common/seg_common.h"
28#include "av1/common/tile_common.h"
Yushin Cho77bba8d2016-11-04 16:36:56 -070029#if CONFIG_PVQ
30#include "av1/common/pvq.h"
31#include "av1/common/pvq_state.h"
32#include "av1/decoder/decint.h"
33#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070034
35#ifdef __cplusplus
36extern "C" {
37#endif
38
39#define MAX_MB_PLANE 3
40
David Barkerac37fa32016-12-02 12:30:21 +000041#if CONFIG_EXT_INTER
42// Should we try rectangular interintra predictions?
43#define USE_RECT_INTERINTRA 1
Sarah Parkerb9f757c2017-01-06 17:12:24 -080044#if CONFIG_COMPOUND_SEGMENT
45#define MAX_SEG_MASK_BITS 3
46
47// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
48typedef enum {
49 UNIFORM_45 = 0,
50 UNIFORM_45_INV,
51 UNIFORM_55,
52 UNIFORM_55_INV,
53 SEG_MASK_TYPES,
54} SEG_MASK_TYPE;
55#endif // CONFIG_COMPOUND_SEGMENT
David Barkerac37fa32016-12-02 12:30:21 +000056#endif
57
Yaowu Xuc27fc142016-08-22 16:08:15 -070058typedef enum {
59 KEY_FRAME = 0,
60 INTER_FRAME = 1,
61 FRAME_TYPES,
62} FRAME_TYPE;
63
Yaowu Xuc27fc142016-08-22 16:08:15 -070064static INLINE int is_inter_mode(PREDICTION_MODE mode) {
65#if CONFIG_EXT_INTER
66 return mode >= NEARESTMV && mode <= NEW_NEWMV;
67#else
68 return mode >= NEARESTMV && mode <= NEWMV;
69#endif // CONFIG_EXT_INTER
70}
71
Yushin Cho77bba8d2016-11-04 16:36:56 -070072#if CONFIG_PVQ
73typedef struct PVQ_INFO {
74 int theta[PVQ_MAX_PARTITIONS];
75 int max_theta[PVQ_MAX_PARTITIONS];
76 int qg[PVQ_MAX_PARTITIONS];
77 int k[PVQ_MAX_PARTITIONS];
Yushin Cho48f84db2016-11-07 21:20:17 -080078 od_coeff y[OD_TXSIZE_MAX * OD_TXSIZE_MAX];
Yushin Cho77bba8d2016-11-04 16:36:56 -070079 int nb_bands;
80 int off[PVQ_MAX_PARTITIONS];
81 int size[PVQ_MAX_PARTITIONS];
82 int skip_rest;
83 int skip_dir;
84 int bs; // log of the block size minus two,
85 // i.e. equivalent to aom's TX_SIZE
86 int ac_dc_coded; // block skip info, indicating whether DC/AC is coded.
87 // bit0: DC coded, bit1 : AC coded (1 means coded)
88 tran_low_t dq_dc_residue;
89} PVQ_INFO;
90
91typedef struct PVQ_QUEUE {
92 PVQ_INFO *buf; // buffer for pvq info, stored in encoding order
93 int curr_pos; // curr position to write PVQ_INFO
94 int buf_len; // allocated buffer length
95 int last_pos; // last written position of PVQ_INFO in a tile
96} PVQ_QUEUE;
97#endif
98
David Barkerac37fa32016-12-02 12:30:21 +000099typedef struct {
100 uint8_t *plane[MAX_MB_PLANE];
101 int stride[MAX_MB_PLANE];
102} BUFFER_SET;
103
Yaowu Xuc27fc142016-08-22 16:08:15 -0700104#if CONFIG_EXT_INTER
105static INLINE int is_inter_singleref_mode(PREDICTION_MODE mode) {
106 return mode >= NEARESTMV && mode <= NEWFROMNEARMV;
107}
108
109static INLINE int is_inter_compound_mode(PREDICTION_MODE mode) {
110 return mode >= NEAREST_NEARESTMV && mode <= NEW_NEWMV;
111}
112
113static INLINE PREDICTION_MODE compound_ref0_mode(PREDICTION_MODE mode) {
114 static PREDICTION_MODE lut[MB_MODE_COUNT] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800115 MB_MODE_COUNT, // DC_PRED
116 MB_MODE_COUNT, // V_PRED
117 MB_MODE_COUNT, // H_PRED
118 MB_MODE_COUNT, // D45_PRED
119 MB_MODE_COUNT, // D135_PRED
120 MB_MODE_COUNT, // D117_PRED
121 MB_MODE_COUNT, // D153_PRED
122 MB_MODE_COUNT, // D207_PRED
123 MB_MODE_COUNT, // D63_PRED
124#if CONFIG_ALT_INTRA
125 MB_MODE_COUNT, // SMOOTH_PRED
126#endif // CONFIG_ALT_INTRA
127 MB_MODE_COUNT, // TM_PRED
128 MB_MODE_COUNT, // NEARESTMV
129 MB_MODE_COUNT, // NEARMV
130 MB_MODE_COUNT, // ZEROMV
131 MB_MODE_COUNT, // NEWMV
132 MB_MODE_COUNT, // NEWFROMNEARMV
133 NEARESTMV, // NEAREST_NEARESTMV
134 NEARESTMV, // NEAREST_NEARMV
135 NEARMV, // NEAR_NEARESTMV
136 NEARMV, // NEAR_NEARMV
137 NEARESTMV, // NEAREST_NEWMV
138 NEWMV, // NEW_NEARESTMV
139 NEARMV, // NEAR_NEWMV
140 NEWMV, // NEW_NEARMV
141 ZEROMV, // ZERO_ZEROMV
142 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700143 };
144 assert(is_inter_compound_mode(mode));
145 return lut[mode];
146}
147
148static INLINE PREDICTION_MODE compound_ref1_mode(PREDICTION_MODE mode) {
149 static PREDICTION_MODE lut[MB_MODE_COUNT] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800150 MB_MODE_COUNT, // DC_PRED
151 MB_MODE_COUNT, // V_PRED
152 MB_MODE_COUNT, // H_PRED
153 MB_MODE_COUNT, // D45_PRED
154 MB_MODE_COUNT, // D135_PRED
155 MB_MODE_COUNT, // D117_PRED
156 MB_MODE_COUNT, // D153_PRED
157 MB_MODE_COUNT, // D207_PRED
158 MB_MODE_COUNT, // D63_PRED
159#if CONFIG_ALT_INTRA
160 MB_MODE_COUNT, // SMOOTH_PRED
161#endif // CONFIG_ALT_INTRA
162 MB_MODE_COUNT, // TM_PRED
163 MB_MODE_COUNT, // NEARESTMV
164 MB_MODE_COUNT, // NEARMV
165 MB_MODE_COUNT, // ZEROMV
166 MB_MODE_COUNT, // NEWMV
167 MB_MODE_COUNT, // NEWFROMNEARMV
168 NEARESTMV, // NEAREST_NEARESTMV
169 NEARMV, // NEAREST_NEARMV
170 NEARESTMV, // NEAR_NEARESTMV
171 NEARMV, // NEAR_NEARMV
172 NEWMV, // NEAREST_NEWMV
173 NEARESTMV, // NEW_NEARESTMV
174 NEWMV, // NEAR_NEWMV
175 NEARMV, // NEW_NEARMV
176 ZEROMV, // ZERO_ZEROMV
177 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700178 };
179 assert(is_inter_compound_mode(mode));
180 return lut[mode];
181}
182
183static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
184 return (mode == NEWMV || mode == NEWFROMNEARMV || mode == NEW_NEWMV ||
185 mode == NEAREST_NEWMV || mode == NEW_NEARESTMV ||
186 mode == NEAR_NEWMV || mode == NEW_NEARMV);
187}
Sarah Parker6fdc8532016-11-16 17:47:13 -0800188
Sarah Parker6fdc8532016-11-16 17:47:13 -0800189static INLINE int is_masked_compound_type(COMPOUND_TYPE type) {
Sarah Parker569edda2016-12-14 14:57:38 -0800190#if CONFIG_COMPOUND_SEGMENT
191 return (type == COMPOUND_WEDGE || type == COMPOUND_SEG);
192#else
Sarah Parker6fdc8532016-11-16 17:47:13 -0800193 return (type == COMPOUND_WEDGE);
Sarah Parker569edda2016-12-14 14:57:38 -0800194#endif // CONFIG_COMPOUND_SEGMENT
Sarah Parker6fdc8532016-11-16 17:47:13 -0800195}
Yaowu Xuc27fc142016-08-22 16:08:15 -0700196#else
197
198static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
199 return (mode == NEWMV);
200}
201#endif // CONFIG_EXT_INTER
202
203/* For keyframes, intra block modes are predicted by the (already decoded)
204 modes for the Y blocks to the left and above us; for interframes, there
205 is a single probability table. */
206
207typedef struct {
208 PREDICTION_MODE as_mode;
209 int_mv as_mv[2]; // first, second inter predictor motion vectors
210#if CONFIG_REF_MV
Yaowu Xuf5bbbfa2016-09-26 09:13:38 -0700211 int_mv pred_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700212#endif
213#if CONFIG_EXT_INTER
214 int_mv ref_mv[2];
215#endif // CONFIG_EXT_INTER
216} b_mode_info;
217
218typedef int8_t MV_REFERENCE_FRAME;
219
Urvang Joshib100db72016-10-12 16:28:56 -0700220#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700221typedef struct {
222 // Number of base colors for Y (0) and UV (1)
223 uint8_t palette_size[2];
224// Value of base colors for Y, U, and V
Yaowu Xuf883b422016-08-30 14:01:10 -0700225#if CONFIG_AOM_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700226 uint16_t palette_colors[3 * PALETTE_MAX_SIZE];
227#else
228 uint8_t palette_colors[3 * PALETTE_MAX_SIZE];
Yaowu Xuf883b422016-08-30 14:01:10 -0700229#endif // CONFIG_AOM_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700230 // Only used by encoder to store the color index of the top left pixel.
231 // TODO(huisu): move this to encoder
232 uint8_t palette_first_color_idx[2];
233} PALETTE_MODE_INFO;
Urvang Joshib100db72016-10-12 16:28:56 -0700234#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700235
hui su5db97432016-10-14 16:10:14 -0700236#if CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700237typedef struct {
238 // 1: an ext intra mode is used; 0: otherwise.
hui su5db97432016-10-14 16:10:14 -0700239 uint8_t use_filter_intra_mode[PLANE_TYPES];
240 FILTER_INTRA_MODE filter_intra_mode[PLANE_TYPES];
241} FILTER_INTRA_MODE_INFO;
242#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700243
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800244#if CONFIG_VAR_TX
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800245#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800246#define TXB_COEFF_COST_MAP_SIZE (2 * MAX_MIB_SIZE)
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800247#endif
248#endif
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800249
250// TODO(angiebird): Merge RD_COST and RD_STATS
251typedef struct RD_STATS {
252 int rate;
253 int64_t dist;
254 int64_t sse;
255 int skip;
256#if CONFIG_RD_DEBUG
257 int txb_coeff_cost[MAX_MB_PLANE];
Angie Chiang3963d632016-11-10 18:41:40 -0800258#if CONFIG_VAR_TX
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800259 int txb_coeff_cost_map[MAX_MB_PLANE][TXB_COEFF_COST_MAP_SIZE]
260 [TXB_COEFF_COST_MAP_SIZE];
Angie Chiang3963d632016-11-10 18:41:40 -0800261#endif // CONFIG_VAR_TX
262#endif // CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800263} RD_STATS;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800264
Sarah Parker6fdc8532016-11-16 17:47:13 -0800265#if CONFIG_EXT_INTER
266typedef struct {
267 COMPOUND_TYPE type;
268 int wedge_index;
269 int wedge_sign;
Sarah Parker569edda2016-12-14 14:57:38 -0800270#if CONFIG_COMPOUND_SEGMENT
Sarah Parkerb9f757c2017-01-06 17:12:24 -0800271 SEG_MASK_TYPE mask_type;
272 DECLARE_ALIGNED(16, uint8_t, seg_mask[2 * MAX_SB_SQUARE]);
Sarah Parker569edda2016-12-14 14:57:38 -0800273#endif // CONFIG_COMPOUND_SEGMENT
Sarah Parker6fdc8532016-11-16 17:47:13 -0800274} INTERINTER_COMPOUND_DATA;
275#endif // CONFIG_EXT_INTER
276
Yaowu Xuc27fc142016-08-22 16:08:15 -0700277// This structure now relates to 8x8 block regions.
278typedef struct {
279 // Common for both INTER and INTRA blocks
280 BLOCK_SIZE sb_type;
281 PREDICTION_MODE mode;
282 TX_SIZE tx_size;
283#if CONFIG_VAR_TX
284 // TODO(jingning): This effectively assigned a separate entry for each
285 // 8x8 block. Apparently it takes much more space than needed.
286 TX_SIZE inter_tx_size[MAX_MIB_SIZE][MAX_MIB_SIZE];
Jingning Hane67b38a2016-11-04 10:30:00 -0700287 TX_SIZE min_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700288#endif
289 int8_t skip;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700290 int8_t segment_id;
291#if CONFIG_SUPERTX
292 // Minimum of all segment IDs under the current supertx block.
293 int8_t segment_id_supertx;
294#endif // CONFIG_SUPERTX
295 int8_t seg_id_predicted; // valid only when temporal_update is enabled
296
297 // Only for INTRA blocks
298 PREDICTION_MODE uv_mode;
Urvang Joshib100db72016-10-12 16:28:56 -0700299#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700300 PALETTE_MODE_INFO palette_mode_info;
Urvang Joshib100db72016-10-12 16:28:56 -0700301#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700302
303// Only for INTER blocks
304#if CONFIG_DUAL_FILTER
James Zern7b9407a2016-05-18 23:48:05 -0700305 InterpFilter interp_filter[4];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700306#else
James Zern7b9407a2016-05-18 23:48:05 -0700307 InterpFilter interp_filter;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700308#endif
309 MV_REFERENCE_FRAME ref_frame[2];
310 TX_TYPE tx_type;
311
hui su5db97432016-10-14 16:10:14 -0700312#if CONFIG_FILTER_INTRA
313 FILTER_INTRA_MODE_INFO filter_intra_mode_info;
314#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700315#if CONFIG_EXT_INTRA
hui sueda3d762016-12-06 16:58:23 -0800316 // The actual prediction angle is the base angle + (angle_delta * step).
Yaowu Xuc27fc142016-08-22 16:08:15 -0700317 int8_t angle_delta[2];
hui sueda3d762016-12-06 16:58:23 -0800318#if CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700319 // To-Do (huisu): this may be replaced by interp_filter
320 INTRA_FILTER intra_filter;
hui sueda3d762016-12-06 16:58:23 -0800321#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700322#endif // CONFIG_EXT_INTRA
323
324#if CONFIG_EXT_INTER
325 INTERINTRA_MODE interintra_mode;
326 // TODO(debargha): Consolidate these flags
327 int use_wedge_interintra;
328 int interintra_wedge_index;
329 int interintra_wedge_sign;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800330 INTERINTER_COMPOUND_DATA interinter_compound_data;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700331#endif // CONFIG_EXT_INTER
Yue Chencb60b182016-10-13 15:18:22 -0700332 MOTION_MODE motion_mode;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700333 int_mv mv[2];
334 int_mv pred_mv[2];
335#if CONFIG_REF_MV
336 uint8_t ref_mv_idx;
337#endif
338#if CONFIG_EXT_PARTITION_TYPES
339 PARTITION_TYPE partition;
340#endif
341#if CONFIG_NEW_QUANT
342 int dq_off_index;
343 int send_dq_bit;
344#endif // CONFIG_NEW_QUANT
345 /* deringing gain *per-superblock* */
346 int8_t dering_gain;
Arild Fuldseth07441162016-08-15 15:07:52 +0200347#if CONFIG_DELTA_Q
348 int current_q_index;
349#endif
Angie Chiangd4022822016-11-02 18:30:25 -0700350#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800351 RD_STATS rd_stats;
Angie Chiangd4022822016-11-02 18:30:25 -0700352 int mi_row;
353 int mi_col;
354#endif
Yue Chen69f18e12016-09-08 14:48:15 -0700355#if CONFIG_WARPED_MOTION
356 int num_proj_ref[2];
357 WarpedMotionParams wm_params[2];
358#endif // CONFIG_WARPED_MOTION
Ryan Lei7386eda2016-12-08 21:08:31 -0800359#if CONFIG_DEBLOCKING_ACROSS_TILES
360 TILE_BOUNDARY_TYPE tile_boundary_info;
361#endif // CONFIG_DEBLOCKING_ACROSS_TILES
Yaowu Xuc27fc142016-08-22 16:08:15 -0700362} MB_MODE_INFO;
363
364typedef struct MODE_INFO {
365 MB_MODE_INFO mbmi;
366 b_mode_info bmi[4];
367} MODE_INFO;
368
369static INLINE PREDICTION_MODE get_y_mode(const MODE_INFO *mi, int block) {
Jingning Hand7d20472016-12-14 11:13:48 -0800370#if CONFIG_CB4X4
371 (void)block;
372 return mi->mbmi.mode;
373#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700374 return mi->mbmi.sb_type < BLOCK_8X8 ? mi->bmi[block].as_mode : mi->mbmi.mode;
Jingning Hand7d20472016-12-14 11:13:48 -0800375#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700376}
377
378static INLINE int is_inter_block(const MB_MODE_INFO *mbmi) {
379 return mbmi->ref_frame[0] > INTRA_FRAME;
380}
381
382static INLINE int has_second_ref(const MB_MODE_INFO *mbmi) {
383 return mbmi->ref_frame[1] > INTRA_FRAME;
384}
385
Yaowu Xuf883b422016-08-30 14:01:10 -0700386PREDICTION_MODE av1_left_block_mode(const MODE_INFO *cur_mi,
387 const MODE_INFO *left_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700388
Yaowu Xuf883b422016-08-30 14:01:10 -0700389PREDICTION_MODE av1_above_block_mode(const MODE_INFO *cur_mi,
390 const MODE_INFO *above_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700391
392enum mv_precision { MV_PRECISION_Q3, MV_PRECISION_Q4 };
393
394struct buf_2d {
395 uint8_t *buf;
396 uint8_t *buf0;
397 int width;
398 int height;
399 int stride;
400};
401
402typedef struct macroblockd_plane {
403 tran_low_t *dqcoeff;
404 PLANE_TYPE plane_type;
405 int subsampling_x;
406 int subsampling_y;
407 struct buf_2d dst;
408 struct buf_2d pre[2];
409 ENTROPY_CONTEXT *above_context;
410 ENTROPY_CONTEXT *left_context;
411 int16_t seg_dequant[MAX_SEGMENTS][2];
412#if CONFIG_NEW_QUANT
clang-format67948d32016-09-07 22:40:40 -0700413 dequant_val_type_nuq seg_dequant_nuq[MAX_SEGMENTS][QUANT_PROFILES]
414 [COEF_BANDS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700415#endif
Urvang Joshib100db72016-10-12 16:28:56 -0700416#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700417 uint8_t *color_index_map;
Urvang Joshib100db72016-10-12 16:28:56 -0700418#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700419
420 // number of 4x4s in current block
421 uint16_t n4_w, n4_h;
422 // log2 of n4_w, n4_h
423 uint8_t n4_wl, n4_hl;
Jingning Hanc47fe6c2016-10-21 16:40:47 -0700424 // block size in pixels
425 uint8_t width, height;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700426
427#if CONFIG_AOM_QM
428 const qm_val_t *seg_iqmatrix[MAX_SEGMENTS][2][TX_SIZES];
429#endif
430 // encoder
431 const int16_t *dequant;
432#if CONFIG_NEW_QUANT
433 const dequant_val_type_nuq *dequant_val_nuq[QUANT_PROFILES];
434#endif // CONFIG_NEW_QUANT
435#if CONFIG_AOM_QM
436 const qm_val_t *seg_qmatrix[MAX_SEGMENTS][2][TX_SIZES];
437#endif
Yushin Cho77bba8d2016-11-04 16:36:56 -0700438
439#if CONFIG_PVQ
440 DECLARE_ALIGNED(16, int16_t, pred[MAX_SB_SQUARE]);
441 // PVQ: forward transformed predicted image, a reference for PVQ.
442 tran_low_t *pvq_ref_coeff;
443#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700444} MACROBLOCKD_PLANE;
445
Jingning Han3468df12016-12-05 17:53:16 -0800446#define BLOCK_OFFSET(x, i) \
447 ((x) + (i) * (1 << (tx_size_wide_log2[0] + tx_size_high_log2[0])))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700448
449typedef struct RefBuffer {
450 // TODO(dkovalev): idx is not really required and should be removed, now it
Yaowu Xuf883b422016-08-30 14:01:10 -0700451 // is used in av1_onyxd_if.c
Yaowu Xuc27fc142016-08-22 16:08:15 -0700452 int idx;
453 YV12_BUFFER_CONFIG *buf;
454 struct scale_factors sf;
455} RefBuffer;
456
457typedef struct macroblockd {
458 struct macroblockd_plane plane[MAX_MB_PLANE];
459 uint8_t bmode_blocks_wl;
460 uint8_t bmode_blocks_hl;
461
462 FRAME_COUNTS *counts;
463 TileInfo tile;
464
465 int mi_stride;
466
467 MODE_INFO **mi;
468 MODE_INFO *left_mi;
469 MODE_INFO *above_mi;
470 MB_MODE_INFO *left_mbmi;
471 MB_MODE_INFO *above_mbmi;
472
473 int up_available;
474 int left_available;
475
Yaowu Xuf883b422016-08-30 14:01:10 -0700476 const aom_prob (*partition_probs)[PARTITION_TYPES - 1];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700477
478 /* Distance of MB away from frame edges */
479 int mb_to_left_edge;
480 int mb_to_right_edge;
481 int mb_to_top_edge;
482 int mb_to_bottom_edge;
483
484 FRAME_CONTEXT *fc;
485
486 /* pointers to reference frames */
Urvang Joshi52648442016-10-13 17:27:51 -0700487 const RefBuffer *block_refs[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700488
489 /* pointer to current frame */
490 const YV12_BUFFER_CONFIG *cur_buf;
491
492 ENTROPY_CONTEXT *above_context[MAX_MB_PLANE];
493 ENTROPY_CONTEXT left_context[MAX_MB_PLANE][2 * MAX_MIB_SIZE];
494
495 PARTITION_CONTEXT *above_seg_context;
496 PARTITION_CONTEXT left_seg_context[MAX_MIB_SIZE];
497
498#if CONFIG_VAR_TX
499 TXFM_CONTEXT *above_txfm_context;
500 TXFM_CONTEXT *left_txfm_context;
501 TXFM_CONTEXT left_txfm_context_buffer[MAX_MIB_SIZE];
502
503 TX_SIZE max_tx_size;
504#if CONFIG_SUPERTX
505 TX_SIZE supertx_size;
506#endif
507#endif
508
Jingning Hanff6ee6a2016-12-07 09:55:21 -0800509 // block dimension in the unit of mode_info.
Yaowu Xuc27fc142016-08-22 16:08:15 -0700510 uint8_t n8_w, n8_h;
511
512#if CONFIG_REF_MV
513 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
514 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
515 uint8_t is_sec_rect;
516#endif
517
Yushin Cho77bba8d2016-11-04 16:36:56 -0700518#if CONFIG_PVQ
519 daala_dec_ctx daala_dec;
520#endif
Yaowu Xuf883b422016-08-30 14:01:10 -0700521#if CONFIG_AOM_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700522 /* Bit depth: 8, 10, 12 */
523 int bd;
524#endif
525
Debargha Mukherjee3c42c092016-09-29 09:17:36 -0700526 int qindex[MAX_SEGMENTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700527 int lossless[MAX_SEGMENTS];
528 int corrupted;
529
Yaowu Xuf883b422016-08-30 14:01:10 -0700530 struct aom_internal_error_info *error_info;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700531#if CONFIG_GLOBAL_MOTION
David Barkercf3d0b02016-11-10 10:14:49 +0000532 WarpedMotionParams *global_motion;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700533#endif // CONFIG_GLOBAL_MOTION
Arild Fuldseth07441162016-08-15 15:07:52 +0200534#if CONFIG_DELTA_Q
535 int prev_qindex;
536 int delta_qindex;
537 int current_qindex;
538#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700539} MACROBLOCKD;
540
541static INLINE BLOCK_SIZE get_subsize(BLOCK_SIZE bsize,
542 PARTITION_TYPE partition) {
543 if (partition == PARTITION_INVALID)
Urvang Joshicb586f32016-09-20 11:36:33 -0700544 return BLOCK_INVALID;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700545 else
546 return subsize_lookup[partition][bsize];
547}
548
549static const TX_TYPE intra_mode_to_tx_type_context[INTRA_MODES] = {
550 DCT_DCT, // DC
551 ADST_DCT, // V
552 DCT_ADST, // H
553 DCT_DCT, // D45
554 ADST_ADST, // D135
555 ADST_DCT, // D117
556 DCT_ADST, // D153
557 DCT_ADST, // D207
558 ADST_DCT, // D63
Urvang Joshi6be4a542016-11-03 15:24:05 -0700559#if CONFIG_ALT_INTRA
560 ADST_ADST, // SMOOTH
561#endif // CONFIG_ALT_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700562 ADST_ADST, // TM
563};
564
565#if CONFIG_SUPERTX
566static INLINE int supertx_enabled(const MB_MODE_INFO *mbmi) {
Jingning Han93531242016-12-20 11:54:36 -0800567 TX_SIZE max_tx_size = txsize_sqr_map[mbmi->tx_size];
568 return tx_size_wide[max_tx_size] >
569 AOMMIN(block_size_wide[mbmi->sb_type], block_size_high[mbmi->sb_type]);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700570}
571#endif // CONFIG_SUPERTX
572
Yaowu Xuc27fc142016-08-22 16:08:15 -0700573#if CONFIG_EXT_TX
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800574
Yaowu Xuc27fc142016-08-22 16:08:15 -0700575#define ALLOW_INTRA_EXT_TX 1
Yaowu Xuc27fc142016-08-22 16:08:15 -0700576
577static const int num_ext_tx_set_inter[EXT_TX_SETS_INTER] = { 1, 16, 12, 2 };
578static const int num_ext_tx_set_intra[EXT_TX_SETS_INTRA] = { 1, 7, 5 };
579
Yaowu Xuc27fc142016-08-22 16:08:15 -0700580static INLINE int get_ext_tx_set(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter) {
581 tx_size = txsize_sqr_map[tx_size];
Jingning Han1a00cff2016-12-28 14:53:14 -0800582#if CONFIG_CB4X4
583 (void)bs;
584 if (tx_size > TX_32X32) return 0;
585#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700586 if (tx_size > TX_32X32 || bs < BLOCK_8X8) return 0;
Jingning Han1a00cff2016-12-28 14:53:14 -0800587#endif
Debargha Mukherjee3b52b3a2016-08-30 15:55:23 -0700588 if (tx_size == TX_32X32) return is_inter ? 3 : 0;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700589 return (tx_size == TX_16X16 ? 2 : 1);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700590}
591
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800592static const int use_intra_ext_tx_for_txsize[EXT_TX_SETS_INTRA]
593 [EXT_TX_SIZES] = {
Jingning Han1a00cff2016-12-28 14:53:14 -0800594#if CONFIG_CB4X4
595 { 1, 1, 1, 1, 1 }, // unused
596 { 0, 1, 1, 0, 0 },
597 { 0, 0, 0, 1, 0 },
598#else
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800599 { 1, 1, 1, 1 }, // unused
600 { 1, 1, 0, 0 },
601 { 0, 0, 1, 0 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800602#endif // CONFIG_CB4X4
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800603 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700604
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800605static const int use_inter_ext_tx_for_txsize[EXT_TX_SETS_INTER]
606 [EXT_TX_SIZES] = {
Jingning Han1a00cff2016-12-28 14:53:14 -0800607#if CONFIG_CB4X4
608 { 1, 1, 1, 1, 1 }, // unused
609 { 0, 1, 1, 0, 0 },
610 { 0, 0, 0, 1, 0 },
611 { 0, 0, 0, 0, 1 },
612#else
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800613 { 1, 1, 1, 1 }, // unused
614 { 1, 1, 0, 0 },
615 { 0, 0, 1, 0 },
616 { 0, 0, 0, 1 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800617#endif // CONFIG_CB4X4
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800618 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700619
620// Transform types used in each intra set
621static const int ext_tx_used_intra[EXT_TX_SETS_INTRA][TX_TYPES] = {
622 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
623 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0 },
624 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
625};
626
627// Transform types used in each inter set
628static const int ext_tx_used_inter[EXT_TX_SETS_INTER][TX_TYPES] = {
629 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
630 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
631 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
632 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
633};
634
635// 1D Transforms used in inter set, this needs to be changed if
636// ext_tx_used_inter is changed
637static const int ext_tx_used_inter_1D[EXT_TX_SETS_INTER][TX_TYPES_1D] = {
638 { 1, 0, 0, 0 }, { 1, 1, 1, 1 }, { 1, 1, 1, 1 }, { 1, 0, 0, 1 },
639};
640
641static INLINE int get_ext_tx_types(TX_SIZE tx_size, BLOCK_SIZE bs,
642 int is_inter) {
643 const int set = get_ext_tx_set(tx_size, bs, is_inter);
644 return is_inter ? num_ext_tx_set_inter[set] : num_ext_tx_set_intra[set];
645}
646
647#if CONFIG_RECT_TX
648static INLINE int is_rect_tx_allowed_bsize(BLOCK_SIZE bsize) {
649 static const char LUT[BLOCK_SIZES] = {
650 0, // BLOCK_4X4
651 1, // BLOCK_4X8
652 1, // BLOCK_8X4
653 0, // BLOCK_8X8
654 1, // BLOCK_8X16
655 1, // BLOCK_16X8
656 0, // BLOCK_16X16
657 1, // BLOCK_16X32
658 1, // BLOCK_32X16
659 0, // BLOCK_32X32
660 0, // BLOCK_32X64
661 0, // BLOCK_64X32
662 0, // BLOCK_64X64
663#if CONFIG_EXT_PARTITION
664 0, // BLOCK_64X128
665 0, // BLOCK_128X64
666 0, // BLOCK_128X128
667#endif // CONFIG_EXT_PARTITION
668 };
669
670 return LUT[bsize];
671}
672
Yue Chen49587a72016-09-28 17:09:47 -0700673static INLINE int is_rect_tx_allowed(const MACROBLOCKD *xd,
674 const MB_MODE_INFO *mbmi) {
675 return is_inter_block(mbmi) && is_rect_tx_allowed_bsize(mbmi->sb_type) &&
676 !xd->lossless[mbmi->segment_id];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700677}
678
679static INLINE int is_rect_tx(TX_SIZE tx_size) { return tx_size >= TX_SIZES; }
680#endif // CONFIG_RECT_TX
681#endif // CONFIG_EXT_TX
682
683static INLINE TX_SIZE tx_size_from_tx_mode(BLOCK_SIZE bsize, TX_MODE tx_mode,
684 int is_inter) {
685 const TX_SIZE largest_tx_size = tx_mode_to_biggest_tx_size[tx_mode];
Jingning Han70e5f3f2016-11-09 17:03:07 -0800686#if CONFIG_VAR_TX
687 const TX_SIZE max_tx_size = max_txsize_rect_lookup[bsize];
688
Jingning Han4be1a4d2017-01-06 10:59:20 -0800689#if CONFIG_CB4X4
690 if (!is_inter || bsize == BLOCK_4X4)
691 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
692#else
Jingning Han70e5f3f2016-11-09 17:03:07 -0800693 if (!is_inter || bsize < BLOCK_8X8)
694 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
Jingning Han4be1a4d2017-01-06 10:59:20 -0800695#endif
Jingning Han70e5f3f2016-11-09 17:03:07 -0800696
697 if (txsize_sqr_map[max_tx_size] <= largest_tx_size)
698 return max_tx_size;
699 else
700 return largest_tx_size;
701#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700702 const TX_SIZE max_tx_size = max_txsize_lookup[bsize];
Jingning Han70e5f3f2016-11-09 17:03:07 -0800703#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700704
705#if CONFIG_EXT_TX && CONFIG_RECT_TX
706 if (!is_inter) {
Yaowu Xuf883b422016-08-30 14:01:10 -0700707 return AOMMIN(max_tx_size, largest_tx_size);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700708 } else {
709 const TX_SIZE max_rect_tx_size = max_txsize_rect_lookup[bsize];
710 if (txsize_sqr_up_map[max_rect_tx_size] <= largest_tx_size) {
711 return max_rect_tx_size;
712 } else {
713 return largest_tx_size;
714 }
715 }
716#else
717 (void)is_inter;
Yaowu Xuf883b422016-08-30 14:01:10 -0700718 return AOMMIN(max_tx_size, largest_tx_size);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700719#endif // CONFIG_EXT_TX && CONFIG_RECT_TX
720}
721
hui su5db97432016-10-14 16:10:14 -0700722#if CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700723static const TX_TYPE filter_intra_mode_to_tx_type_lookup[FILTER_INTRA_MODES] = {
724 DCT_DCT, // FILTER_DC
725 ADST_DCT, // FILTER_V
726 DCT_ADST, // FILTER_H
727 DCT_DCT, // FILTER_D45
728 ADST_ADST, // FILTER_D135
729 ADST_DCT, // FILTER_D117
730 DCT_ADST, // FILTER_D153
731 DCT_ADST, // FILTER_D207
732 ADST_DCT, // FILTER_D63
733 ADST_ADST, // FILTER_TM
734};
hui su5db97432016-10-14 16:10:14 -0700735#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700736
hui su5db97432016-10-14 16:10:14 -0700737#if CONFIG_EXT_INTRA
hui su45dc5972016-12-08 17:42:50 -0800738#define MAX_ANGLE_DELTA_UV 2
739#define ANGLE_STEP_UV 4
740
741static const uint8_t av1_angle_step_y[TX_SIZES] = {
742 0, 4, 3, 3,
743};
744static const uint8_t av1_max_angle_delta_y[TX_SIZES] = {
745 0, 2, 3, 3,
746};
747
hui su5db97432016-10-14 16:10:14 -0700748extern const int16_t dr_intra_derivative[90];
749static const uint8_t mode_to_angle_map[INTRA_MODES] = {
750 0, 90, 180, 45, 135, 111, 157, 203, 67, 0,
751};
752
hui su45dc5972016-12-08 17:42:50 -0800753static INLINE int av1_get_angle_step(BLOCK_SIZE sb_type, int plane) {
754 const TX_SIZE max_tx_size = max_txsize_lookup[sb_type];
755 return plane ? ANGLE_STEP_UV : av1_angle_step_y[max_tx_size];
756}
757
758static INLINE int av1_get_max_angle_delta(BLOCK_SIZE sb_type, int plane) {
759 const TX_SIZE max_tx_size = max_txsize_lookup[sb_type];
760 return plane ? MAX_ANGLE_DELTA_UV : av1_max_angle_delta_y[max_tx_size];
761}
762
hui sueda3d762016-12-06 16:58:23 -0800763#if CONFIG_INTRA_INTERP
hui su5db97432016-10-14 16:10:14 -0700764// Returns whether filter selection is needed for a given
765// intra prediction angle.
Yaowu Xuf883b422016-08-30 14:01:10 -0700766int av1_is_intra_filter_switchable(int angle);
hui sueda3d762016-12-06 16:58:23 -0800767#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700768#endif // CONFIG_EXT_INTRA
769
770#if CONFIG_EXT_TILE
771#define FIXED_TX_TYPE 1
772#else
773#define FIXED_TX_TYPE 0
774#endif
775
776static INLINE TX_TYPE get_default_tx_type(PLANE_TYPE plane_type,
777 const MACROBLOCKD *xd, int block_idx,
778 TX_SIZE tx_size) {
779 const MB_MODE_INFO *const mbmi = &xd->mi[0]->mbmi;
780
781 if (is_inter_block(mbmi) || plane_type != PLANE_TYPE_Y ||
782 xd->lossless[mbmi->segment_id] || tx_size >= TX_32X32)
783 return DCT_DCT;
784
785 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
786 ? get_y_mode(xd->mi[0], block_idx)
787 : mbmi->uv_mode];
788}
789
790static INLINE TX_TYPE get_tx_type(PLANE_TYPE plane_type, const MACROBLOCKD *xd,
791 int block_idx, TX_SIZE tx_size) {
792 const MODE_INFO *const mi = xd->mi[0];
793 const MB_MODE_INFO *const mbmi = &mi->mbmi;
794
795 if (FIXED_TX_TYPE)
796 return get_default_tx_type(plane_type, xd, block_idx, tx_size);
797
hui su5db97432016-10-14 16:10:14 -0700798#if CONFIG_EXT_INTRA || CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700799 if (!is_inter_block(mbmi)) {
hui su5db97432016-10-14 16:10:14 -0700800#if CONFIG_FILTER_INTRA
801 const int use_filter_intra_mode_info =
802 mbmi->filter_intra_mode_info.use_filter_intra_mode[plane_type];
803 const FILTER_INTRA_MODE filter_intra_mode =
804 mbmi->filter_intra_mode_info.filter_intra_mode[plane_type];
805#endif // CONFIG_FILTER_INTRA
806#if CONFIG_EXT_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700807 const PREDICTION_MODE mode = (plane_type == PLANE_TYPE_Y)
808 ? get_y_mode(mi, block_idx)
809 : mbmi->uv_mode;
hui su5db97432016-10-14 16:10:14 -0700810#endif // CONFIG_EXT_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700811
812 if (xd->lossless[mbmi->segment_id] || tx_size >= TX_32X32) return DCT_DCT;
813
814#if CONFIG_EXT_TX
815#if ALLOW_INTRA_EXT_TX
816 if (mbmi->sb_type >= BLOCK_8X8 && plane_type == PLANE_TYPE_Y)
817 return mbmi->tx_type;
818#endif // ALLOW_INTRA_EXT_TX
819#endif // CONFIG_EXT_TX
820
hui su5db97432016-10-14 16:10:14 -0700821#if CONFIG_FILTER_INTRA
822 if (use_filter_intra_mode_info)
823 return filter_intra_mode_to_tx_type_lookup[filter_intra_mode];
824#endif // CONFIG_FILTER_INTRA
825#if CONFIG_EXT_INTRA
hui su45dc5972016-12-08 17:42:50 -0800826#if CONFIG_ALT_INTRA
827 if (mode == SMOOTH_PRED) return ADST_ADST;
828#endif // CONFIG_ALT_INTRA
829 if (mode == DC_PRED) return DCT_DCT;
830 if (mode == TM_PRED) return ADST_ADST;
831 {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700832 int angle = mode_to_angle_map[mode];
hui su45dc5972016-12-08 17:42:50 -0800833 const int angle_step = av1_get_angle_step(mbmi->sb_type, (int)plane_type);
834 assert(mode == D45_PRED || mode == D63_PRED || mode == D117_PRED ||
835 mode == D135_PRED || mode == D153_PRED || mode == D207_PRED ||
836 mode == V_PRED || mode == H_PRED);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700837 if (mbmi->sb_type >= BLOCK_8X8)
hui su45dc5972016-12-08 17:42:50 -0800838 angle += mbmi->angle_delta[plane_type] * angle_step;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700839 assert(angle > 0 && angle < 270);
840 if (angle == 135)
841 return ADST_ADST;
842 else if (angle < 45 || angle > 225)
843 return DCT_DCT;
844 else if (angle < 135)
845 return ADST_DCT;
846 else
847 return DCT_ADST;
848 }
Yaowu Xuc27fc142016-08-22 16:08:15 -0700849#endif // CONFIG_EXT_INTRA
hui su5db97432016-10-14 16:10:14 -0700850 }
851#endif // CONFIG_EXT_INTRA || CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700852
853#if CONFIG_EXT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700854 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] > TX_32X32 ||
855 (txsize_sqr_map[tx_size] >= TX_32X32 && !is_inter_block(mbmi)))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700856 return DCT_DCT;
Jingning Han8260d8b2016-12-28 13:48:43 -0800857 if (mbmi->sb_type >= BLOCK_8X8 || CONFIG_CB4X4) {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700858 if (plane_type == PLANE_TYPE_Y) {
859#if !ALLOW_INTRA_EXT_TX
860 if (is_inter_block(mbmi))
861#endif // ALLOW_INTRA_EXT_TX
862 return mbmi->tx_type;
863 }
Jingning Han1a00cff2016-12-28 14:53:14 -0800864
865 if (is_inter_block(mbmi)) {
866// UV Inter only
867#if CONFIG_CB4X4
868 if (tx_size < TX_4X4) return DCT_DCT;
869#endif
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800870 return (mbmi->tx_type == IDTX && txsize_sqr_map[tx_size] >= TX_32X32)
Yaowu Xuc27fc142016-08-22 16:08:15 -0700871 ? DCT_DCT
872 : mbmi->tx_type;
Jingning Han1a00cff2016-12-28 14:53:14 -0800873 }
Yaowu Xuc27fc142016-08-22 16:08:15 -0700874 }
875
Jingning Han8260d8b2016-12-28 13:48:43 -0800876#if CONFIG_CB4X4
Jingning Han1a00cff2016-12-28 14:53:14 -0800877 if (tx_size < TX_4X4)
878 return DCT_DCT;
879 else
880 return intra_mode_to_tx_type_context[mbmi->uv_mode];
Jingning Han8260d8b2016-12-28 13:48:43 -0800881#endif
882
Yaowu Xuc27fc142016-08-22 16:08:15 -0700883 // Sub8x8-Inter/Intra OR UV-Intra
884 if (is_inter_block(mbmi)) // Sub8x8-Inter
885 return DCT_DCT;
886 else // Sub8x8 Intra OR UV-Intra
887 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
888 ? get_y_mode(mi, block_idx)
889 : mbmi->uv_mode];
890#else // CONFIG_EXT_TX
891 (void)block_idx;
892 if (plane_type != PLANE_TYPE_Y || xd->lossless[mbmi->segment_id] ||
893 txsize_sqr_map[tx_size] >= TX_32X32)
894 return DCT_DCT;
895 return mbmi->tx_type;
896#endif // CONFIG_EXT_TX
897}
898
Yaowu Xuf883b422016-08-30 14:01:10 -0700899void av1_setup_block_planes(MACROBLOCKD *xd, int ss_x, int ss_y);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700900
Jingning Han4e1737a2016-10-25 16:05:02 -0700901static INLINE int tx_size_to_depth(const TX_SIZE tx_size) {
902 return (int)(tx_size - TX_4X4);
903}
904
905static INLINE TX_SIZE depth_to_tx_size(const int depth) {
906 return (TX_SIZE)(depth + TX_4X4);
907}
908
Yaowu Xuc27fc142016-08-22 16:08:15 -0700909static INLINE TX_SIZE get_uv_tx_size(const MB_MODE_INFO *mbmi,
910 const struct macroblockd_plane *pd) {
Debargha Mukherjee2f123402016-08-30 17:43:38 -0700911 TX_SIZE uv_txsize;
Jingning Han93531242016-12-20 11:54:36 -0800912#if CONFIG_CB4X4
913 assert(mbmi->tx_size > TX_2X2);
914#endif
915
Yaowu Xuc27fc142016-08-22 16:08:15 -0700916#if CONFIG_SUPERTX
917 if (supertx_enabled(mbmi))
918 return uvsupertx_size_lookup[txsize_sqr_map[mbmi->tx_size]]
919 [pd->subsampling_x][pd->subsampling_y];
920#endif // CONFIG_SUPERTX
Jingning Hancabd9892016-12-01 12:28:42 -0800921
Debargha Mukherjee2f123402016-08-30 17:43:38 -0700922 uv_txsize = uv_txsize_lookup[mbmi->sb_type][mbmi->tx_size][pd->subsampling_x]
923 [pd->subsampling_y];
924 assert(uv_txsize != TX_INVALID);
925 return uv_txsize;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700926}
927
928static INLINE BLOCK_SIZE
929get_plane_block_size(BLOCK_SIZE bsize, const struct macroblockd_plane *pd) {
930 return ss_size_lookup[bsize][pd->subsampling_x][pd->subsampling_y];
931}
932
933static INLINE void reset_skip_context(MACROBLOCKD *xd, BLOCK_SIZE bsize) {
934 int i;
935 for (i = 0; i < MAX_MB_PLANE; i++) {
936 struct macroblockd_plane *const pd = &xd->plane[i];
937 const BLOCK_SIZE plane_bsize = get_plane_block_size(bsize, pd);
Jingning Hanb49004d2016-12-05 09:37:29 -0800938 const int txs_wide = block_size_wide[plane_bsize] >> tx_size_wide_log2[0];
939 const int txs_high = block_size_high[plane_bsize] >> tx_size_high_log2[0];
940 memset(pd->above_context, 0, sizeof(ENTROPY_CONTEXT) * txs_wide);
941 memset(pd->left_context, 0, sizeof(ENTROPY_CONTEXT) * txs_high);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700942 }
943}
944
945typedef void (*foreach_transformed_block_visitor)(int plane, int block,
946 int blk_row, int blk_col,
947 BLOCK_SIZE plane_bsize,
948 TX_SIZE tx_size, void *arg);
949
Yaowu Xuf883b422016-08-30 14:01:10 -0700950void av1_foreach_transformed_block_in_plane(
Yaowu Xuc27fc142016-08-22 16:08:15 -0700951 const MACROBLOCKD *const xd, BLOCK_SIZE bsize, int plane,
952 foreach_transformed_block_visitor visit, void *arg);
953
Yaowu Xuf883b422016-08-30 14:01:10 -0700954void av1_foreach_transformed_block(const MACROBLOCKD *const xd,
955 BLOCK_SIZE bsize,
956 foreach_transformed_block_visitor visit,
957 void *arg);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700958
iole moccagattaf25a4cf2016-11-11 23:57:57 -0800959#if CONFIG_COEF_INTERLEAVE
960static INLINE int get_max_4x4_size(int num_4x4, int mb_to_edge,
961 int subsampling) {
962 return num_4x4 + (mb_to_edge >= 0 ? 0 : mb_to_edge >> (5 + subsampling));
963}
964
965void av1_foreach_transformed_block_interleave(
966 const MACROBLOCKD *const xd, BLOCK_SIZE bsize,
967 foreach_transformed_block_visitor visit, void *arg);
968#endif
969
Yaowu Xuf883b422016-08-30 14:01:10 -0700970void av1_set_contexts(const MACROBLOCKD *xd, struct macroblockd_plane *pd,
Jingning Haneee43152016-12-05 09:58:45 -0800971 int plane, TX_SIZE tx_size, int has_eob, int aoff,
972 int loff);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700973
974#if CONFIG_EXT_INTER
975static INLINE int is_interintra_allowed_bsize(const BLOCK_SIZE bsize) {
David Barkerac37fa32016-12-02 12:30:21 +0000976#if !USE_RECT_INTERINTRA
977 if (block_size_wide[bsize] != block_size_high[bsize]) return 0;
978#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700979 // TODO(debargha): Should this be bsize < BLOCK_LARGEST?
980 return (bsize >= BLOCK_8X8) && (bsize < BLOCK_64X64);
981}
982
983static INLINE int is_interintra_allowed_mode(const PREDICTION_MODE mode) {
984 return (mode >= NEARESTMV) && (mode <= NEWMV);
985}
986
987static INLINE int is_interintra_allowed_ref(const MV_REFERENCE_FRAME rf[2]) {
988 return (rf[0] > INTRA_FRAME) && (rf[1] <= INTRA_FRAME);
989}
990
991static INLINE int is_interintra_allowed(const MB_MODE_INFO *mbmi) {
992 return is_interintra_allowed_bsize(mbmi->sb_type) &&
993 is_interintra_allowed_mode(mbmi->mode) &&
994 is_interintra_allowed_ref(mbmi->ref_frame);
995}
996
997static INLINE int is_interintra_allowed_bsize_group(const int group) {
998 int i;
999 for (i = 0; i < BLOCK_SIZES; i++) {
Urvang Joshicb586f32016-09-20 11:36:33 -07001000 if (size_group_lookup[i] == group &&
1001 is_interintra_allowed_bsize((BLOCK_SIZE)i)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001002 return 1;
Urvang Joshicb586f32016-09-20 11:36:33 -07001003 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001004 }
1005 return 0;
1006}
1007
1008static INLINE int is_interintra_pred(const MB_MODE_INFO *mbmi) {
1009 return (mbmi->ref_frame[1] == INTRA_FRAME) && is_interintra_allowed(mbmi);
1010}
1011#endif // CONFIG_EXT_INTER
1012
Yue Chencb60b182016-10-13 15:18:22 -07001013#if CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
1014static INLINE int is_motion_variation_allowed_bsize(BLOCK_SIZE bsize) {
1015 return (bsize >= BLOCK_8X8);
1016}
1017
Yue Chen69f18e12016-09-08 14:48:15 -07001018static INLINE MOTION_MODE motion_mode_allowed(const MB_MODE_INFO *mbmi) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001019#if CONFIG_EXT_INTER
Yue Chen69f18e12016-09-08 14:48:15 -07001020 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
1021 is_inter_mode(mbmi->mode) && mbmi->ref_frame[1] != INTRA_FRAME) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001022#else
Yue Chen69f18e12016-09-08 14:48:15 -07001023 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
1024 is_inter_mode(mbmi->mode)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001025#endif // CONFIG_EXT_INTER
Yue Chen69f18e12016-09-08 14:48:15 -07001026#if CONFIG_WARPED_MOTION
1027 if (!has_second_ref(mbmi) && mbmi->num_proj_ref[0] >= 3)
1028 return WARPED_CAUSAL;
1029 else
1030#endif // CONFIG_WARPED_MOTION
1031#if CONFIG_MOTION_VAR
1032 return OBMC_CAUSAL;
1033#else
1034 return SIMPLE_TRANSLATION;
1035#endif // CONFIG_MOTION_VAR
1036 } else {
1037 return SIMPLE_TRANSLATION;
1038 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001039}
1040
Yue Chencb60b182016-10-13 15:18:22 -07001041#if CONFIG_MOTION_VAR
Yaowu Xuc27fc142016-08-22 16:08:15 -07001042static INLINE int is_neighbor_overlappable(const MB_MODE_INFO *mbmi) {
1043 return (is_inter_block(mbmi));
1044}
Yue Chencb60b182016-10-13 15:18:22 -07001045#endif // CONFIG_MOTION_VAR
1046#endif // CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
Yaowu Xuc27fc142016-08-22 16:08:15 -07001047
1048#ifdef __cplusplus
1049} // extern "C"
1050#endif
1051
Yaowu Xuf883b422016-08-30 14:01:10 -07001052#endif // AV1_COMMON_BLOCKD_H_