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Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_ENCODER_BLOCK_H_
13#define AV1_ENCODER_BLOCK_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
15#include "av1/common/entropymv.h"
16#include "av1/common/entropy.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070017#include "av1/common/mvref_common.h"
Hui Su1ddf2312017-08-19 15:21:34 -070018#include "av1/encoder/hash.h"
Yushin Cho55104332017-08-14 16:15:43 -070019#if CONFIG_DIST_8X8
20#include "aom/aomcx.h"
21#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070022
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27typedef struct {
28 unsigned int sse;
29 int sum;
30 unsigned int var;
Urvang Joshi454280d2016-10-14 16:51:44 -070031} DIFF;
Yaowu Xuc27fc142016-08-22 16:08:15 -070032
33typedef struct macroblock_plane {
34 DECLARE_ALIGNED(16, int16_t, src_diff[MAX_SB_SQUARE]);
35 tran_low_t *qcoeff;
36 tran_low_t *coeff;
37 uint16_t *eobs;
Angie Chiang74e23072017-03-24 14:54:23 -070038#if CONFIG_LV_MAP
39 uint8_t *txb_entropy_ctx;
40#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070041 struct buf_2d src;
42
43 // Quantizer setings
Monty Montgomery125c0fc2017-10-26 00:44:35 -040044 // These are used/accessed only in the quantization process
45 // RDO does not / must not depend on any of these values
46 // All values below share the coefficient scale/shift used in TX
47 const int16_t *quant_fp_QTX;
48 const int16_t *round_fp_QTX;
49 const int16_t *quant_QTX;
50 const int16_t *quant_shift_QTX;
51 const int16_t *zbin_QTX;
52 const int16_t *round_QTX;
53 const int16_t *dequant_QTX;
Yaowu Xuc27fc142016-08-22 16:08:15 -070054#if CONFIG_NEW_QUANT
55 const cuml_bins_type_nuq *cuml_bins_nuq[QUANT_PROFILES];
Monty Montgomery125c0fc2017-10-26 00:44:35 -040056 const dequant_val_type_nuq *dequant_val_nuq_QTX[QUANT_PROFILES];
Yaowu Xuc27fc142016-08-22 16:08:15 -070057#endif // CONFIG_NEW_QUANT
Yaowu Xuc27fc142016-08-22 16:08:15 -070058} MACROBLOCK_PLANE;
59
hui suc0cf71d2017-07-20 16:38:50 -070060typedef int av1_coeff_cost[PLANE_TYPES][REF_TYPES][COEF_BANDS][COEFF_CONTEXTS]
61 [TAIL_TOKENS];
Yaowu Xuc27fc142016-08-22 16:08:15 -070062
Jingning Handfd72322017-08-09 14:04:12 -070063#if CONFIG_LV_MAP
64typedef struct {
65 int txb_skip_cost[TXB_SKIP_CONTEXTS][2];
Ola Hugosson13892102017-11-06 08:01:44 +010066#if CONFIG_LV_MAP_MULTI
Dake He3fe369c2017-11-16 17:56:44 -080067#if USE_BASE_EOB_ALPHABET
68 int base_eob_cost[SIG_COEF_CONTEXTS_EOB][3];
69#endif
Ola Hugosson13892102017-11-06 08:01:44 +010070 int base_cost[SIG_COEF_CONTEXTS][4];
71#else
Jingning Handfd72322017-08-09 14:04:12 -070072 int nz_map_cost[SIG_COEF_CONTEXTS][2];
Ola Hugosson13892102017-11-06 08:01:44 +010073#endif
Jingning Handfd72322017-08-09 14:04:12 -070074 int eob_cost[EOB_COEF_CONTEXTS][2];
Angie Chiang7ab884e2017-10-18 15:57:12 -070075 int eob_extra_cost[EOB_COEF_CONTEXTS][2];
Jingning Handfd72322017-08-09 14:04:12 -070076 int dc_sign_cost[DC_SIGN_CONTEXTS][2];
Ola Hugosson13892102017-11-06 08:01:44 +010077#if !CONFIG_LV_MAP_MULTI
Jingning Handfd72322017-08-09 14:04:12 -070078 int base_cost[NUM_BASE_LEVELS][COEFF_BASE_CONTEXTS][2];
Ola Hugosson13892102017-11-06 08:01:44 +010079#endif
Angie Chiang26d3e452017-09-29 17:40:02 -070080 int lps_cost[LEVEL_CONTEXTS][COEFF_BASE_RANGE + 1];
Ola Hugossone72a2092017-11-12 09:11:53 +010081#if !CONFIG_LV_MAP_MULTI
Jingning Han87b01b52017-08-31 12:07:20 -070082 int br_cost[BASE_RANGE_SETS][LEVEL_CONTEXTS][2];
Ola Hugossone72a2092017-11-12 09:11:53 +010083#endif
Jingning Handfd72322017-08-09 14:04:12 -070084} LV_MAP_COEFF_COST;
Jingning Hanf5a4d3b2017-08-27 23:01:19 -070085
86typedef struct {
87 tran_low_t tcoeff[MAX_MB_PLANE][MAX_SB_SQUARE];
88 uint16_t eobs[MAX_MB_PLANE][MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
89 uint8_t txb_skip_ctx[MAX_MB_PLANE]
90 [MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
91 int dc_sign_ctx[MAX_MB_PLANE]
92 [MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
93} CB_COEFF_BUFFER;
Jingning Handfd72322017-08-09 14:04:12 -070094#endif
95
Yaowu Xuc27fc142016-08-22 16:08:15 -070096typedef struct {
97 int_mv ref_mvs[MODE_CTX_REF_FRAMES][MAX_MV_REF_CANDIDATES];
98 int16_t mode_context[MODE_CTX_REF_FRAMES];
Angie Chiangf0fbf9d2017-03-15 15:01:22 -070099#if CONFIG_LV_MAP
Angie Chiangc484abe2017-03-20 15:43:11 -0700100 // TODO(angiebird): Reduce the buffer size according to sb_type
Jingning Hanf5a4d3b2017-08-27 23:01:19 -0700101 tran_low_t *tcoeff[MAX_MB_PLANE];
102 uint16_t *eobs[MAX_MB_PLANE];
103 uint8_t *txb_skip_ctx[MAX_MB_PLANE];
104 int *dc_sign_ctx[MAX_MB_PLANE];
Angie Chiangf0fbf9d2017-03-15 15:01:22 -0700105#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700106 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
107 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700108 int16_t compound_mode_context[MODE_CTX_REF_FRAMES];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700109} MB_MODE_INFO_EXT;
110
Alex Converse0fa0f422017-04-24 12:51:14 -0700111typedef struct {
112 int col_min;
113 int col_max;
114 int row_min;
115 int row_max;
116} MvLimits;
117
Yaowu Xuc27fc142016-08-22 16:08:15 -0700118typedef struct {
Hui Su473cf892017-11-08 18:14:31 -0800119 uint8_t best_palette_color_map[MAX_PALETTE_SQUARE];
Hui Su5891f982017-12-18 16:18:23 -0800120 int kmeans_data_buf[2 * MAX_PALETTE_SQUARE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700121} PALETTE_BUFFER;
122
Hui Su1ddf2312017-08-19 15:21:34 -0700123typedef struct {
124 TX_TYPE tx_type;
125 TX_SIZE tx_size;
Hui Su1ddf2312017-08-19 15:21:34 -0700126 TX_SIZE min_tx_size;
127 TX_SIZE inter_tx_size[MAX_MIB_SIZE][MAX_MIB_SIZE];
128 uint8_t blk_skip[MAX_MIB_SIZE * MAX_MIB_SIZE * 8];
Hui Su1ddf2312017-08-19 15:21:34 -0700129#if CONFIG_TXK_SEL
130 TX_TYPE txk_type[MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
131#endif // CONFIG_TXK_SEL
132 RD_STATS rd_stats;
133 uint32_t hash_value;
134} TX_RD_INFO;
135
136#define RD_RECORD_BUFFER_LEN 8
137typedef struct {
138 TX_RD_INFO tx_rd_info[RD_RECORD_BUFFER_LEN]; // Circular buffer.
139 int index_start;
140 int num;
141 CRC_CALCULATOR crc_calculator; // Hash function.
142} TX_RD_RECORD;
143
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700144typedef struct {
145 int64_t dist;
146 int rate;
Hui Su8c2b9132017-12-09 10:40:15 -0800147 uint16_t eob;
Jingning Han45027c62017-12-11 11:47:15 -0800148#if CONFIG_LV_MAP
149 uint16_t entropy_context;
Jingning Hand7e99112017-12-13 09:47:45 -0800150 uint8_t txb_entropy_ctx;
Jingning Han45027c62017-12-11 11:47:15 -0800151#else
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700152 uint8_t entropy_context;
Jingning Han45027c62017-12-11 11:47:15 -0800153#endif
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700154 uint8_t valid;
155 uint8_t fast;
156} TX_SIZE_RD_INFO;
157
158#define TX_SIZE_RD_RECORD_BUFFER_LEN 256
159typedef struct {
160 uint32_t hash_vals[TX_SIZE_RD_RECORD_BUFFER_LEN];
161 TX_SIZE_RD_INFO tx_rd_info[TX_SIZE_RD_RECORD_BUFFER_LEN][TX_TYPES];
162 int index_start;
163 int num;
164} TX_SIZE_RD_RECORD;
165
166typedef struct tx_size_rd_info_node {
167 TX_SIZE_RD_INFO *rd_info_array; // Points to array of size TX_TYPES.
168 struct tx_size_rd_info_node *children[4];
169} TX_SIZE_RD_INFO_NODE;
170
Yaowu Xuc27fc142016-08-22 16:08:15 -0700171typedef struct macroblock MACROBLOCK;
172struct macroblock {
173 struct macroblock_plane plane[MAX_MB_PLANE];
174
Hui Su1ddf2312017-08-19 15:21:34 -0700175 // Save the transform RD search info.
176 TX_RD_RECORD tx_rd_record;
177
Alexander Bokovc5ddf062017-10-17 16:41:46 -0700178 // Also save RD info on the TX size search level for square TX sizes.
179 TX_SIZE_RD_RECORD
180 tx_size_rd_record_8X8[(MAX_MIB_SIZE >> 1) * (MAX_MIB_SIZE >> 1)];
181 TX_SIZE_RD_RECORD
182 tx_size_rd_record_16X16[(MAX_MIB_SIZE >> 2) * (MAX_MIB_SIZE >> 2)];
183 TX_SIZE_RD_RECORD
184 tx_size_rd_record_32X32[(MAX_MIB_SIZE >> 3) * (MAX_MIB_SIZE >> 3)];
185#if CONFIG_TX64X64
186 TX_SIZE_RD_RECORD
187 tx_size_rd_record_64X64[(MAX_MIB_SIZE >> 4) * (MAX_MIB_SIZE >> 4)];
188#endif
189
Yaowu Xuc27fc142016-08-22 16:08:15 -0700190 MACROBLOCKD e_mbd;
191 MB_MODE_INFO_EXT *mbmi_ext;
192 int skip_block;
David Barkerd7d78c82016-10-24 10:55:35 +0100193 int qindex;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700194
195 // The equivalent error at the current rdmult of one whole bit (not one
196 // bitcost unit).
197 int errorperbit;
198 // The equivalend SAD error of one (whole) bit at the current quantizer
199 // for large blocks.
200 int sadperbit16;
201 // The equivalend SAD error of one (whole) bit at the current quantizer
202 // for sub-8x8 blocks.
203 int sadperbit4;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700204 int rdmult;
205 int mb_energy;
206 int *m_search_count_ptr;
207 int *ex_search_count_ptr;
208
Jingning Han9777afc2016-10-20 15:17:43 -0700209 unsigned int txb_split_count;
Jingning Han9777afc2016-10-20 15:17:43 -0700210
Yaowu Xuc27fc142016-08-22 16:08:15 -0700211 // These are set to their default values at the beginning, and then adjusted
212 // further in the encoding process.
213 BLOCK_SIZE min_partition_size;
214 BLOCK_SIZE max_partition_size;
215
216 int mv_best_ref_index[TOTAL_REFS_PER_FRAME];
217 unsigned int max_mv_context[TOTAL_REFS_PER_FRAME];
218 unsigned int source_variance;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700219 unsigned int pred_sse[TOTAL_REFS_PER_FRAME];
220 int pred_mv_sad[TOTAL_REFS_PER_FRAME];
221
Yaowu Xuc27fc142016-08-22 16:08:15 -0700222 int *nmvjointcost;
223 int nmv_vec_cost[NMV_CONTEXTS][MV_JOINTS];
224 int *nmvcost[NMV_CONTEXTS][2];
225 int *nmvcost_hp[NMV_CONTEXTS][2];
226 int **mv_cost_stack[NMV_CONTEXTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700227 int **mvcost;
Alex Conversea127a792017-05-23 15:27:21 -0700228
Yue Chene9638cc2016-10-10 12:37:54 -0700229 int32_t *wsrc_buf;
230 int32_t *mask_buf;
Jingning Hand064cf02017-06-01 10:00:39 -0700231 uint8_t *above_pred_buf;
232 uint8_t *left_pred_buf;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700233
234 PALETTE_BUFFER *palette_buffer;
235
236 // These define limits to motion vector components to prevent them
237 // from extending outside the UMV borders
Alex Converse0fa0f422017-04-24 12:51:14 -0700238 MvLimits mv_limits;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700239
Jingning Han9ca05b72017-01-03 14:41:36 -0800240 uint8_t blk_skip[MAX_MB_PLANE][MAX_MIB_SIZE * MAX_MIB_SIZE * 8];
Jingning Han9ca05b72017-01-03 14:41:36 -0800241 uint8_t blk_skip_drl[MAX_MB_PLANE][MAX_MIB_SIZE * MAX_MIB_SIZE * 8];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700242
243 int skip;
Jingning Han8efdbc82017-02-19 14:40:03 -0800244 int skip_chroma_rd;
Zoe Liu1eed2df2017-10-16 17:13:15 -0700245 int skip_cost[SKIP_CONTEXTS][2];
246
Zoe Liuf40a9572017-10-13 12:37:19 -0700247#if CONFIG_EXT_SKIP
248 int skip_mode; // 0: off; 1: on
249 int skip_mode_cost[SKIP_CONTEXTS][2];
250
251 int64_t skip_mode_rdcost; // -1: Not set
252 int skip_mode_rate;
253 int64_t skip_mode_sse;
254 int64_t skip_mode_dist;
255 MV_REFERENCE_FRAME skip_mode_ref_frame[2];
256 int_mv skip_mode_mv[2];
Zoe Liu104d62e2017-12-07 12:44:45 -0800257#if CONFIG_JNT_COMP
258 int compound_idx;
259#endif // CONFIG_JNT_COMP
Zoe Liuf40a9572017-10-13 12:37:19 -0700260 int skip_mode_index_candidate;
261 int skip_mode_index;
262#endif // CONFIG_EXT_SKIP
263
Jingning Handfd72322017-08-09 14:04:12 -0700264#if CONFIG_LV_MAP
265 LV_MAP_COEFF_COST coeff_costs[TX_SIZES][PLANE_TYPES];
Jingning Hanf5a4d3b2017-08-27 23:01:19 -0700266 uint16_t cb_offset;
Jingning Handfd72322017-08-09 14:04:12 -0700267#endif
268
hui suc0cf71d2017-07-20 16:38:50 -0700269 av1_coeff_cost token_head_costs[TX_SIZES];
270 av1_coeff_cost token_tail_costs[TX_SIZES];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700271
Yue Chenb23d00a2017-07-28 17:01:21 -0700272 // mode costs
Yue Chen170678a2017-10-17 13:43:10 -0700273 int intra_inter_cost[INTRA_INTER_CONTEXTS][2];
274
Yue Chenb23d00a2017-07-28 17:01:21 -0700275 int mbmode_cost[BLOCK_SIZE_GROUPS][INTRA_MODES];
276 int newmv_mode_cost[NEWMV_MODE_CONTEXTS][2];
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700277 int zeromv_mode_cost[GLOBALMV_MODE_CONTEXTS][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700278 int refmv_mode_cost[REFMV_MODE_CONTEXTS][2];
279 int drl_mode_cost0[DRL_MODE_CONTEXTS][2];
280
Yue Chenb23d00a2017-07-28 17:01:21 -0700281 int inter_compound_mode_cost[INTER_MODE_CONTEXTS][INTER_COMPOUND_MODES];
Cheng Chen2ef24ea2017-11-29 12:22:24 -0800282#if CONFIG_JNT_COMP
283 int compound_type_cost[BLOCK_SIZES_ALL][COMPOUND_TYPES - 1];
284#else
Yue Chena4245512017-08-31 11:58:08 -0700285 int compound_type_cost[BLOCK_SIZES_ALL][COMPOUND_TYPES];
Cheng Chen2ef24ea2017-11-29 12:22:24 -0800286#endif // CONFIG_JNT_COMP
Yue Cheneaf128a2017-10-16 17:01:36 -0700287 int interintra_cost[BLOCK_SIZE_GROUPS][2];
288 int wedge_interintra_cost[BLOCK_SIZES_ALL][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700289 int interintra_mode_cost[BLOCK_SIZE_GROUPS][INTERINTRA_MODES];
Yunqing Wang3afbf3f2017-11-21 20:16:18 -0800290#if CONFIG_EXT_WARPED_MOTION
291 int motion_mode_cost[MOTION_MODE_CTX][BLOCK_SIZES_ALL][MOTION_MODES];
292#else
Yue Chenb23d00a2017-07-28 17:01:21 -0700293 int motion_mode_cost[BLOCK_SIZES_ALL][MOTION_MODES];
Yunqing Wang3afbf3f2017-11-21 20:16:18 -0800294#endif // CONFIG_EXT_WARPED_MOTION
Yue Chenb23d00a2017-07-28 17:01:21 -0700295 int motion_mode_cost1[BLOCK_SIZES_ALL][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700296 int intra_uv_mode_cost[INTRA_MODES][UV_INTRA_MODES];
297 int y_mode_costs[INTRA_MODES][INTRA_MODES][INTRA_MODES];
Yue Chen63ce36f2017-10-10 23:37:31 -0700298#if CONFIG_FILTER_INTRA
Yue Chen4eba69b2017-11-09 22:37:35 -0800299 int filter_intra_cost[TX_SIZES_ALL][2];
Yue Chen994dba22017-12-19 15:27:26 -0800300 int filter_intra_mode_cost[FILTER_INTRA_MODES];
Yue Chen63ce36f2017-10-10 23:37:31 -0700301#endif
Yue Chenb23d00a2017-07-28 17:01:21 -0700302 int switchable_interp_costs[SWITCHABLE_FILTER_CONTEXTS][SWITCHABLE_FILTERS];
303#if CONFIG_EXT_PARTITION_TYPES
Sebastien Alaiwana6a486c2017-11-07 17:04:27 +0100304 int partition_cost[PARTITION_CONTEXTS][EXT_PARTITION_TYPES];
Yue Chenb23d00a2017-07-28 17:01:21 -0700305#else
Sebastien Alaiwana6a486c2017-11-07 17:04:27 +0100306 int partition_cost[PARTITION_CONTEXTS][PARTITION_TYPES];
Yue Chenb23d00a2017-07-28 17:01:21 -0700307#endif // CONFIG_EXT_PARTITION_TYPES
Hui Suc1f411b2017-12-19 15:58:28 -0800308 int palette_y_size_cost[PALATTE_BSIZE_CTXS][PALETTE_SIZES];
309 int palette_uv_size_cost[PALATTE_BSIZE_CTXS][PALETTE_SIZES];
Yue Chenb23d00a2017-07-28 17:01:21 -0700310 int palette_y_color_cost[PALETTE_SIZES][PALETTE_COLOR_INDEX_CONTEXTS]
311 [PALETTE_COLORS];
312 int palette_uv_color_cost[PALETTE_SIZES][PALETTE_COLOR_INDEX_CONTEXTS]
313 [PALETTE_COLORS];
Hui Suc1f411b2017-12-19 15:58:28 -0800314 int palette_y_mode_cost[PALATTE_BSIZE_CTXS][PALETTE_Y_MODE_CONTEXTS][2];
Yue Chendab2ca92017-10-16 17:48:48 -0700315 int palette_uv_mode_cost[PALETTE_UV_MODE_CONTEXTS][2];
David Michael Barr38e560c2017-08-16 21:46:37 +0900316#if CONFIG_CFL
317 // The rate associated with each alpha codeword
318 int cfl_cost[CFL_JOINT_SIGNS][CFL_PRED_PLANES][CFL_ALPHABET_SIZE];
319#endif // CONFIG_CFL
Yue Chenb23d00a2017-07-28 17:01:21 -0700320 int tx_size_cost[TX_SIZES - 1][TX_SIZE_CONTEXTS][TX_SIZES];
Yue Chen171c17d2017-10-16 18:08:22 -0700321 int txfm_partition_cost[TXFM_PARTITION_CONTEXTS][2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700322 int inter_tx_type_costs[EXT_TX_SETS_INTER][EXT_TX_SIZES][TX_TYPES];
323 int intra_tx_type_costs[EXT_TX_SETS_INTRA][EXT_TX_SIZES][INTRA_MODES]
324 [TX_TYPES];
Joe Young3ca43bf2017-10-06 15:12:46 -0700325#if CONFIG_EXT_INTRA && CONFIG_EXT_INTRA_MOD
326 int angle_delta_cost[DIRECTIONAL_MODES][2 * MAX_ANGLE_DELTA + 1];
327#endif // CONFIG_EXT_INTRA && CONFIG_EXT_INTRA_MOD
Yue Chenb23d00a2017-07-28 17:01:21 -0700328#if CONFIG_LOOP_RESTORATION
329 int switchable_restore_cost[RESTORE_SWITCHABLE_TYPES];
Debargha Mukherjeebc732ef2017-10-12 12:40:25 -0700330 int wiener_restore_cost[2];
331 int sgrproj_restore_cost[2];
Yue Chenb23d00a2017-07-28 17:01:21 -0700332#endif // CONFIG_LOOP_RESTORATION
Hui Su6c8584f2017-09-14 15:37:02 -0700333#if CONFIG_INTRABC
334 int intrabc_cost[2];
335#endif // CONFIG_INTRABC
Yue Chenb23d00a2017-07-28 17:01:21 -0700336
Yaowu Xuc27fc142016-08-22 16:08:15 -0700337 int optimize;
338
Yaowu Xuc27fc142016-08-22 16:08:15 -0700339 // Used to store sub partition's choices.
340 MV pred_mv[TOTAL_REFS_PER_FRAME];
341
342 // Store the best motion vector during motion search
343 int_mv best_mv;
344 // Store the second best motion vector during full-pixel motion search
345 int_mv second_best_mv;
346
Yaowu Xuc27fc142016-08-22 16:08:15 -0700347 // use default transform and skip transform type search for intra modes
348 int use_default_intra_tx_type;
349 // use default transform and skip transform type search for inter modes
350 int use_default_inter_tx_type;
Yushin Chob7b60c52017-07-14 16:18:52 -0700351#if CONFIG_DIST_8X8
Yushin Cho55104332017-08-14 16:15:43 -0700352 int using_dist_8x8;
353 aom_tune_metric tune_metric;
Yushin Chob7b60c52017-07-14 16:18:52 -0700354#endif // CONFIG_DIST_8X8
Cheng Chen46970612017-10-24 14:53:36 -0700355#if CONFIG_JNT_COMP
356 int comp_idx_cost[COMP_INDEX_CONTEXTS][2];
Cheng Chen2ef24ea2017-11-29 12:22:24 -0800357 int comp_group_idx_cost[COMP_GROUP_IDX_CONTEXTS][2];
Cheng Chen46970612017-10-24 14:53:36 -0700358#endif // CONFIG_JNT_COMP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700359};
360
361#ifdef __cplusplus
362} // extern "C"
363#endif
364
Yaowu Xuf883b422016-08-30 14:01:10 -0700365#endif // AV1_ENCODER_BLOCK_H_