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Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_COMMON_BLOCKD_H_
13#define AV1_COMMON_BLOCKD_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
Yaowu Xuf883b422016-08-30 14:01:10 -070015#include "./aom_config.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070016
Yaowu Xuf883b422016-08-30 14:01:10 -070017#include "aom_dsp/aom_dsp_common.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070018#include "aom_ports/mem.h"
19#include "aom_scale/yv12config.h"
20
21#include "av1/common/common_data.h"
22#include "av1/common/quant_common.h"
23#include "av1/common/entropy.h"
24#include "av1/common/entropymode.h"
25#include "av1/common/mv.h"
26#include "av1/common/scale.h"
27#include "av1/common/seg_common.h"
28#include "av1/common/tile_common.h"
Yushin Cho77bba8d2016-11-04 16:36:56 -070029#if CONFIG_PVQ
30#include "av1/common/pvq.h"
31#include "av1/common/pvq_state.h"
32#include "av1/decoder/decint.h"
33#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070034
35#ifdef __cplusplus
36extern "C" {
37#endif
38
Jingning Hanc41a5492017-02-24 11:18:52 -080039#define SUB8X8_COMP_REF 1
40
Yaowu Xuc27fc142016-08-22 16:08:15 -070041#define MAX_MB_PLANE 3
42
David Barkerac37fa32016-12-02 12:30:21 +000043#if CONFIG_EXT_INTER
44// Should we try rectangular interintra predictions?
David Barker839467f2017-01-19 11:06:15 +000045#define USE_RECT_INTERINTRA 1
Sarah Parkerb9f757c2017-01-06 17:12:24 -080046
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080047#if CONFIG_COMPOUND_SEGMENT
48
49// Set COMPOUND_SEGMENT_TYPE to one of the three
50// 0: Uniform
51// 1: Difference weighted
52#define COMPOUND_SEGMENT_TYPE 1
53
54#if COMPOUND_SEGMENT_TYPE == 0
55#define MAX_SEG_MASK_BITS 1
Sarah Parkerb9f757c2017-01-06 17:12:24 -080056// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
57typedef enum {
58 UNIFORM_45 = 0,
59 UNIFORM_45_INV,
Sarah Parkerb9f757c2017-01-06 17:12:24 -080060 SEG_MASK_TYPES,
61} SEG_MASK_TYPE;
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080062
63#elif COMPOUND_SEGMENT_TYPE == 1
64#define MAX_SEG_MASK_BITS 1
65// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
66typedef enum {
Yaowu Xua93e65e2017-01-24 10:58:48 -080067 DIFFWTD_42 = 0,
68 DIFFWTD_42_INV,
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080069 SEG_MASK_TYPES,
70} SEG_MASK_TYPE;
71
72#endif // COMPOUND_SEGMENT_TYPE
Sarah Parkerb9f757c2017-01-06 17:12:24 -080073#endif // CONFIG_COMPOUND_SEGMENT
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080074#endif // CONFIG_EXT_INTER
David Barkerac37fa32016-12-02 12:30:21 +000075
Yaowu Xuc27fc142016-08-22 16:08:15 -070076typedef enum {
77 KEY_FRAME = 0,
78 INTER_FRAME = 1,
79 FRAME_TYPES,
80} FRAME_TYPE;
81
Yaowu Xuc27fc142016-08-22 16:08:15 -070082static INLINE int is_inter_mode(PREDICTION_MODE mode) {
83#if CONFIG_EXT_INTER
84 return mode >= NEARESTMV && mode <= NEW_NEWMV;
85#else
86 return mode >= NEARESTMV && mode <= NEWMV;
87#endif // CONFIG_EXT_INTER
88}
89
Yushin Cho77bba8d2016-11-04 16:36:56 -070090#if CONFIG_PVQ
91typedef struct PVQ_INFO {
92 int theta[PVQ_MAX_PARTITIONS];
93 int max_theta[PVQ_MAX_PARTITIONS];
94 int qg[PVQ_MAX_PARTITIONS];
95 int k[PVQ_MAX_PARTITIONS];
Yushin Cho48f84db2016-11-07 21:20:17 -080096 od_coeff y[OD_TXSIZE_MAX * OD_TXSIZE_MAX];
Yushin Cho77bba8d2016-11-04 16:36:56 -070097 int nb_bands;
98 int off[PVQ_MAX_PARTITIONS];
99 int size[PVQ_MAX_PARTITIONS];
100 int skip_rest;
101 int skip_dir;
ltrudeaue1c09292017-01-20 15:42:13 -0500102 int bs; // log of the block size minus two,
103 // i.e. equivalent to aom's TX_SIZE
104 // Block skip info, indicating whether DC/AC, is coded.
105 PVQ_SKIP_TYPE ac_dc_coded; // bit0: DC coded, bit1 : AC coded (1 means coded)
Yushin Cho77bba8d2016-11-04 16:36:56 -0700106 tran_low_t dq_dc_residue;
107} PVQ_INFO;
108
109typedef struct PVQ_QUEUE {
110 PVQ_INFO *buf; // buffer for pvq info, stored in encoding order
111 int curr_pos; // curr position to write PVQ_INFO
112 int buf_len; // allocated buffer length
113 int last_pos; // last written position of PVQ_INFO in a tile
114} PVQ_QUEUE;
115#endif
116
David Barkerac37fa32016-12-02 12:30:21 +0000117typedef struct {
118 uint8_t *plane[MAX_MB_PLANE];
119 int stride[MAX_MB_PLANE];
120} BUFFER_SET;
121
Yaowu Xuc27fc142016-08-22 16:08:15 -0700122#if CONFIG_EXT_INTER
123static INLINE int is_inter_singleref_mode(PREDICTION_MODE mode) {
124 return mode >= NEARESTMV && mode <= NEWFROMNEARMV;
125}
126
127static INLINE int is_inter_compound_mode(PREDICTION_MODE mode) {
128 return mode >= NEAREST_NEARESTMV && mode <= NEW_NEWMV;
129}
130
131static INLINE PREDICTION_MODE compound_ref0_mode(PREDICTION_MODE mode) {
132 static PREDICTION_MODE lut[MB_MODE_COUNT] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800133 MB_MODE_COUNT, // DC_PRED
134 MB_MODE_COUNT, // V_PRED
135 MB_MODE_COUNT, // H_PRED
136 MB_MODE_COUNT, // D45_PRED
137 MB_MODE_COUNT, // D135_PRED
138 MB_MODE_COUNT, // D117_PRED
139 MB_MODE_COUNT, // D153_PRED
140 MB_MODE_COUNT, // D207_PRED
141 MB_MODE_COUNT, // D63_PRED
142#if CONFIG_ALT_INTRA
143 MB_MODE_COUNT, // SMOOTH_PRED
144#endif // CONFIG_ALT_INTRA
145 MB_MODE_COUNT, // TM_PRED
146 MB_MODE_COUNT, // NEARESTMV
147 MB_MODE_COUNT, // NEARMV
148 MB_MODE_COUNT, // ZEROMV
149 MB_MODE_COUNT, // NEWMV
150 MB_MODE_COUNT, // NEWFROMNEARMV
151 NEARESTMV, // NEAREST_NEARESTMV
152 NEARESTMV, // NEAREST_NEARMV
153 NEARMV, // NEAR_NEARESTMV
154 NEARMV, // NEAR_NEARMV
155 NEARESTMV, // NEAREST_NEWMV
156 NEWMV, // NEW_NEARESTMV
157 NEARMV, // NEAR_NEWMV
158 NEWMV, // NEW_NEARMV
159 ZEROMV, // ZERO_ZEROMV
160 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700161 };
162 assert(is_inter_compound_mode(mode));
163 return lut[mode];
164}
165
166static INLINE PREDICTION_MODE compound_ref1_mode(PREDICTION_MODE mode) {
167 static PREDICTION_MODE lut[MB_MODE_COUNT] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800168 MB_MODE_COUNT, // DC_PRED
169 MB_MODE_COUNT, // V_PRED
170 MB_MODE_COUNT, // H_PRED
171 MB_MODE_COUNT, // D45_PRED
172 MB_MODE_COUNT, // D135_PRED
173 MB_MODE_COUNT, // D117_PRED
174 MB_MODE_COUNT, // D153_PRED
175 MB_MODE_COUNT, // D207_PRED
176 MB_MODE_COUNT, // D63_PRED
177#if CONFIG_ALT_INTRA
178 MB_MODE_COUNT, // SMOOTH_PRED
179#endif // CONFIG_ALT_INTRA
180 MB_MODE_COUNT, // TM_PRED
181 MB_MODE_COUNT, // NEARESTMV
182 MB_MODE_COUNT, // NEARMV
183 MB_MODE_COUNT, // ZEROMV
184 MB_MODE_COUNT, // NEWMV
185 MB_MODE_COUNT, // NEWFROMNEARMV
186 NEARESTMV, // NEAREST_NEARESTMV
187 NEARMV, // NEAREST_NEARMV
188 NEARESTMV, // NEAR_NEARESTMV
189 NEARMV, // NEAR_NEARMV
190 NEWMV, // NEAREST_NEWMV
191 NEARESTMV, // NEW_NEARESTMV
192 NEWMV, // NEAR_NEWMV
193 NEARMV, // NEW_NEARMV
194 ZEROMV, // ZERO_ZEROMV
195 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700196 };
197 assert(is_inter_compound_mode(mode));
198 return lut[mode];
199}
200
201static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
202 return (mode == NEWMV || mode == NEWFROMNEARMV || mode == NEW_NEWMV ||
203 mode == NEAREST_NEWMV || mode == NEW_NEARESTMV ||
204 mode == NEAR_NEWMV || mode == NEW_NEARMV);
205}
Sarah Parker6fdc8532016-11-16 17:47:13 -0800206
Sarah Parker2e604882017-01-17 17:31:25 -0800207static INLINE int use_masked_motion_search(COMPOUND_TYPE type) {
208 return (type == COMPOUND_WEDGE);
209}
210
Sarah Parker6fdc8532016-11-16 17:47:13 -0800211static INLINE int is_masked_compound_type(COMPOUND_TYPE type) {
Sarah Parker569edda2016-12-14 14:57:38 -0800212#if CONFIG_COMPOUND_SEGMENT
213 return (type == COMPOUND_WEDGE || type == COMPOUND_SEG);
214#else
Sarah Parker6fdc8532016-11-16 17:47:13 -0800215 return (type == COMPOUND_WEDGE);
Sarah Parker569edda2016-12-14 14:57:38 -0800216#endif // CONFIG_COMPOUND_SEGMENT
Sarah Parker6fdc8532016-11-16 17:47:13 -0800217}
Yaowu Xuc27fc142016-08-22 16:08:15 -0700218#else
219
220static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
221 return (mode == NEWMV);
222}
223#endif // CONFIG_EXT_INTER
224
225/* For keyframes, intra block modes are predicted by the (already decoded)
226 modes for the Y blocks to the left and above us; for interframes, there
227 is a single probability table. */
228
229typedef struct {
230 PREDICTION_MODE as_mode;
231 int_mv as_mv[2]; // first, second inter predictor motion vectors
232#if CONFIG_REF_MV
Yaowu Xuf5bbbfa2016-09-26 09:13:38 -0700233 int_mv pred_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700234#endif
235#if CONFIG_EXT_INTER
236 int_mv ref_mv[2];
237#endif // CONFIG_EXT_INTER
238} b_mode_info;
239
240typedef int8_t MV_REFERENCE_FRAME;
241
Urvang Joshib100db72016-10-12 16:28:56 -0700242#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700243typedef struct {
244 // Number of base colors for Y (0) and UV (1)
245 uint8_t palette_size[2];
246// Value of base colors for Y, U, and V
Yaowu Xuf883b422016-08-30 14:01:10 -0700247#if CONFIG_AOM_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700248 uint16_t palette_colors[3 * PALETTE_MAX_SIZE];
249#else
250 uint8_t palette_colors[3 * PALETTE_MAX_SIZE];
Yaowu Xuf883b422016-08-30 14:01:10 -0700251#endif // CONFIG_AOM_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700252 // Only used by encoder to store the color index of the top left pixel.
253 // TODO(huisu): move this to encoder
254 uint8_t palette_first_color_idx[2];
255} PALETTE_MODE_INFO;
Urvang Joshib100db72016-10-12 16:28:56 -0700256#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700257
hui su5db97432016-10-14 16:10:14 -0700258#if CONFIG_FILTER_INTRA
Yue Chen8d8638a2017-02-21 13:28:16 +0800259#define USE_3TAP_INTRA_FILTER 1 // 0: 4-tap; 1: 3-tap
Yaowu Xuc27fc142016-08-22 16:08:15 -0700260typedef struct {
261 // 1: an ext intra mode is used; 0: otherwise.
hui su5db97432016-10-14 16:10:14 -0700262 uint8_t use_filter_intra_mode[PLANE_TYPES];
263 FILTER_INTRA_MODE filter_intra_mode[PLANE_TYPES];
264} FILTER_INTRA_MODE_INFO;
265#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700266
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800267#if CONFIG_VAR_TX
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800268#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800269#define TXB_COEFF_COST_MAP_SIZE (2 * MAX_MIB_SIZE)
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800270#endif
271#endif
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800272
273// TODO(angiebird): Merge RD_COST and RD_STATS
274typedef struct RD_STATS {
275 int rate;
276 int64_t dist;
277 int64_t sse;
278 int skip;
279#if CONFIG_RD_DEBUG
280 int txb_coeff_cost[MAX_MB_PLANE];
Angie Chiang3963d632016-11-10 18:41:40 -0800281#if CONFIG_VAR_TX
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800282 int txb_coeff_cost_map[MAX_MB_PLANE][TXB_COEFF_COST_MAP_SIZE]
283 [TXB_COEFF_COST_MAP_SIZE];
Angie Chiang3963d632016-11-10 18:41:40 -0800284#endif // CONFIG_VAR_TX
285#endif // CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800286} RD_STATS;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800287
Sarah Parker6fdc8532016-11-16 17:47:13 -0800288#if CONFIG_EXT_INTER
289typedef struct {
290 COMPOUND_TYPE type;
291 int wedge_index;
292 int wedge_sign;
Sarah Parker569edda2016-12-14 14:57:38 -0800293#if CONFIG_COMPOUND_SEGMENT
Sarah Parkerb9f757c2017-01-06 17:12:24 -0800294 SEG_MASK_TYPE mask_type;
295 DECLARE_ALIGNED(16, uint8_t, seg_mask[2 * MAX_SB_SQUARE]);
Sarah Parker569edda2016-12-14 14:57:38 -0800296#endif // CONFIG_COMPOUND_SEGMENT
Sarah Parker6fdc8532016-11-16 17:47:13 -0800297} INTERINTER_COMPOUND_DATA;
298#endif // CONFIG_EXT_INTER
299
Yaowu Xuc27fc142016-08-22 16:08:15 -0700300// This structure now relates to 8x8 block regions.
301typedef struct {
302 // Common for both INTER and INTRA blocks
303 BLOCK_SIZE sb_type;
304 PREDICTION_MODE mode;
305 TX_SIZE tx_size;
306#if CONFIG_VAR_TX
307 // TODO(jingning): This effectively assigned a separate entry for each
308 // 8x8 block. Apparently it takes much more space than needed.
309 TX_SIZE inter_tx_size[MAX_MIB_SIZE][MAX_MIB_SIZE];
Jingning Hane67b38a2016-11-04 10:30:00 -0700310 TX_SIZE min_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700311#endif
312 int8_t skip;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700313 int8_t segment_id;
314#if CONFIG_SUPERTX
315 // Minimum of all segment IDs under the current supertx block.
316 int8_t segment_id_supertx;
317#endif // CONFIG_SUPERTX
318 int8_t seg_id_predicted; // valid only when temporal_update is enabled
319
320 // Only for INTRA blocks
321 PREDICTION_MODE uv_mode;
Urvang Joshib100db72016-10-12 16:28:56 -0700322#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700323 PALETTE_MODE_INFO palette_mode_info;
Urvang Joshib100db72016-10-12 16:28:56 -0700324#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700325
326// Only for INTER blocks
327#if CONFIG_DUAL_FILTER
James Zern7b9407a2016-05-18 23:48:05 -0700328 InterpFilter interp_filter[4];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700329#else
James Zern7b9407a2016-05-18 23:48:05 -0700330 InterpFilter interp_filter;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700331#endif
332 MV_REFERENCE_FRAME ref_frame[2];
333 TX_TYPE tx_type;
334
hui su5db97432016-10-14 16:10:14 -0700335#if CONFIG_FILTER_INTRA
336 FILTER_INTRA_MODE_INFO filter_intra_mode_info;
337#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700338#if CONFIG_EXT_INTRA
hui sueda3d762016-12-06 16:58:23 -0800339 // The actual prediction angle is the base angle + (angle_delta * step).
Yaowu Xuc27fc142016-08-22 16:08:15 -0700340 int8_t angle_delta[2];
hui sueda3d762016-12-06 16:58:23 -0800341#if CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700342 // To-Do (huisu): this may be replaced by interp_filter
343 INTRA_FILTER intra_filter;
hui sueda3d762016-12-06 16:58:23 -0800344#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700345#endif // CONFIG_EXT_INTRA
346
347#if CONFIG_EXT_INTER
348 INTERINTRA_MODE interintra_mode;
349 // TODO(debargha): Consolidate these flags
350 int use_wedge_interintra;
351 int interintra_wedge_index;
352 int interintra_wedge_sign;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800353 INTERINTER_COMPOUND_DATA interinter_compound_data;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700354#endif // CONFIG_EXT_INTER
Yue Chencb60b182016-10-13 15:18:22 -0700355 MOTION_MODE motion_mode;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700356 int_mv mv[2];
357 int_mv pred_mv[2];
358#if CONFIG_REF_MV
359 uint8_t ref_mv_idx;
360#endif
361#if CONFIG_EXT_PARTITION_TYPES
362 PARTITION_TYPE partition;
363#endif
364#if CONFIG_NEW_QUANT
365 int dq_off_index;
366 int send_dq_bit;
367#endif // CONFIG_NEW_QUANT
368 /* deringing gain *per-superblock* */
369 int8_t dering_gain;
Arild Fuldseth07441162016-08-15 15:07:52 +0200370#if CONFIG_DELTA_Q
371 int current_q_index;
372#endif
Angie Chiangd4022822016-11-02 18:30:25 -0700373#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800374 RD_STATS rd_stats;
Angie Chiangd4022822016-11-02 18:30:25 -0700375 int mi_row;
376 int mi_col;
377#endif
Yue Chen69f18e12016-09-08 14:48:15 -0700378#if CONFIG_WARPED_MOTION
379 int num_proj_ref[2];
380 WarpedMotionParams wm_params[2];
381#endif // CONFIG_WARPED_MOTION
Ryan Lei9b02b0e2017-01-30 15:52:20 -0800382
383 BOUNDARY_TYPE boundary_info;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700384} MB_MODE_INFO;
385
386typedef struct MODE_INFO {
387 MB_MODE_INFO mbmi;
388 b_mode_info bmi[4];
389} MODE_INFO;
390
391static INLINE PREDICTION_MODE get_y_mode(const MODE_INFO *mi, int block) {
Jingning Hand7d20472016-12-14 11:13:48 -0800392#if CONFIG_CB4X4
393 (void)block;
394 return mi->mbmi.mode;
395#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700396 return mi->mbmi.sb_type < BLOCK_8X8 ? mi->bmi[block].as_mode : mi->mbmi.mode;
Jingning Hand7d20472016-12-14 11:13:48 -0800397#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700398}
399
400static INLINE int is_inter_block(const MB_MODE_INFO *mbmi) {
401 return mbmi->ref_frame[0] > INTRA_FRAME;
402}
403
404static INLINE int has_second_ref(const MB_MODE_INFO *mbmi) {
405 return mbmi->ref_frame[1] > INTRA_FRAME;
406}
407
Yaowu Xuf883b422016-08-30 14:01:10 -0700408PREDICTION_MODE av1_left_block_mode(const MODE_INFO *cur_mi,
409 const MODE_INFO *left_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700410
Yaowu Xuf883b422016-08-30 14:01:10 -0700411PREDICTION_MODE av1_above_block_mode(const MODE_INFO *cur_mi,
412 const MODE_INFO *above_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700413
414enum mv_precision { MV_PRECISION_Q3, MV_PRECISION_Q4 };
415
416struct buf_2d {
417 uint8_t *buf;
418 uint8_t *buf0;
419 int width;
420 int height;
421 int stride;
422};
423
424typedef struct macroblockd_plane {
425 tran_low_t *dqcoeff;
426 PLANE_TYPE plane_type;
427 int subsampling_x;
428 int subsampling_y;
429 struct buf_2d dst;
430 struct buf_2d pre[2];
431 ENTROPY_CONTEXT *above_context;
432 ENTROPY_CONTEXT *left_context;
433 int16_t seg_dequant[MAX_SEGMENTS][2];
434#if CONFIG_NEW_QUANT
clang-format67948d32016-09-07 22:40:40 -0700435 dequant_val_type_nuq seg_dequant_nuq[MAX_SEGMENTS][QUANT_PROFILES]
436 [COEF_BANDS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700437#endif
Urvang Joshib100db72016-10-12 16:28:56 -0700438#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700439 uint8_t *color_index_map;
Urvang Joshib100db72016-10-12 16:28:56 -0700440#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700441
442 // number of 4x4s in current block
443 uint16_t n4_w, n4_h;
444 // log2 of n4_w, n4_h
445 uint8_t n4_wl, n4_hl;
Jingning Hanc47fe6c2016-10-21 16:40:47 -0700446 // block size in pixels
447 uint8_t width, height;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700448
449#if CONFIG_AOM_QM
450 const qm_val_t *seg_iqmatrix[MAX_SEGMENTS][2][TX_SIZES];
451#endif
452 // encoder
453 const int16_t *dequant;
454#if CONFIG_NEW_QUANT
455 const dequant_val_type_nuq *dequant_val_nuq[QUANT_PROFILES];
456#endif // CONFIG_NEW_QUANT
457#if CONFIG_AOM_QM
458 const qm_val_t *seg_qmatrix[MAX_SEGMENTS][2][TX_SIZES];
459#endif
Yushin Cho77bba8d2016-11-04 16:36:56 -0700460
Yushin Cho7a428ba2017-01-12 16:28:49 -0800461#if CONFIG_PVQ || CONFIG_DAALA_DIST
Yushin Cho77bba8d2016-11-04 16:36:56 -0700462 DECLARE_ALIGNED(16, int16_t, pred[MAX_SB_SQUARE]);
463 // PVQ: forward transformed predicted image, a reference for PVQ.
464 tran_low_t *pvq_ref_coeff;
465#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700466} MACROBLOCKD_PLANE;
467
Jingning Han3468df12016-12-05 17:53:16 -0800468#define BLOCK_OFFSET(x, i) \
469 ((x) + (i) * (1 << (tx_size_wide_log2[0] + tx_size_high_log2[0])))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700470
471typedef struct RefBuffer {
472 // TODO(dkovalev): idx is not really required and should be removed, now it
Yaowu Xuf883b422016-08-30 14:01:10 -0700473 // is used in av1_onyxd_if.c
Yaowu Xuc27fc142016-08-22 16:08:15 -0700474 int idx;
475 YV12_BUFFER_CONFIG *buf;
476 struct scale_factors sf;
477} RefBuffer;
478
479typedef struct macroblockd {
480 struct macroblockd_plane plane[MAX_MB_PLANE];
481 uint8_t bmode_blocks_wl;
482 uint8_t bmode_blocks_hl;
483
484 FRAME_COUNTS *counts;
485 TileInfo tile;
486
487 int mi_stride;
488
489 MODE_INFO **mi;
490 MODE_INFO *left_mi;
491 MODE_INFO *above_mi;
492 MB_MODE_INFO *left_mbmi;
493 MB_MODE_INFO *above_mbmi;
494
495 int up_available;
496 int left_available;
497
Yaowu Xuf883b422016-08-30 14:01:10 -0700498 const aom_prob (*partition_probs)[PARTITION_TYPES - 1];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700499
500 /* Distance of MB away from frame edges */
501 int mb_to_left_edge;
502 int mb_to_right_edge;
503 int mb_to_top_edge;
504 int mb_to_bottom_edge;
505
506 FRAME_CONTEXT *fc;
507
508 /* pointers to reference frames */
Urvang Joshi52648442016-10-13 17:27:51 -0700509 const RefBuffer *block_refs[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700510
511 /* pointer to current frame */
512 const YV12_BUFFER_CONFIG *cur_buf;
513
514 ENTROPY_CONTEXT *above_context[MAX_MB_PLANE];
515 ENTROPY_CONTEXT left_context[MAX_MB_PLANE][2 * MAX_MIB_SIZE];
516
517 PARTITION_CONTEXT *above_seg_context;
518 PARTITION_CONTEXT left_seg_context[MAX_MIB_SIZE];
519
520#if CONFIG_VAR_TX
521 TXFM_CONTEXT *above_txfm_context;
522 TXFM_CONTEXT *left_txfm_context;
523 TXFM_CONTEXT left_txfm_context_buffer[MAX_MIB_SIZE];
524
525 TX_SIZE max_tx_size;
526#if CONFIG_SUPERTX
527 TX_SIZE supertx_size;
528#endif
529#endif
530
Jingning Hanff6ee6a2016-12-07 09:55:21 -0800531 // block dimension in the unit of mode_info.
Yaowu Xuc27fc142016-08-22 16:08:15 -0700532 uint8_t n8_w, n8_h;
533
534#if CONFIG_REF_MV
535 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
536 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
537 uint8_t is_sec_rect;
538#endif
539
Yushin Cho77bba8d2016-11-04 16:36:56 -0700540#if CONFIG_PVQ
541 daala_dec_ctx daala_dec;
542#endif
Thomas Daviesf77d4ad2017-01-10 18:55:42 +0000543#if CONFIG_EC_ADAPT
544 FRAME_CONTEXT *tile_ctx;
545#endif
Yaowu Xuf883b422016-08-30 14:01:10 -0700546#if CONFIG_AOM_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700547 /* Bit depth: 8, 10, 12 */
548 int bd;
549#endif
550
Debargha Mukherjee3c42c092016-09-29 09:17:36 -0700551 int qindex[MAX_SEGMENTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700552 int lossless[MAX_SEGMENTS];
553 int corrupted;
554
Yaowu Xuf883b422016-08-30 14:01:10 -0700555 struct aom_internal_error_info *error_info;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700556#if CONFIG_GLOBAL_MOTION
David Barkercf3d0b02016-11-10 10:14:49 +0000557 WarpedMotionParams *global_motion;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700558#endif // CONFIG_GLOBAL_MOTION
Arild Fuldseth07441162016-08-15 15:07:52 +0200559#if CONFIG_DELTA_Q
560 int prev_qindex;
561 int delta_qindex;
562 int current_qindex;
563#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700564} MACROBLOCKD;
565
566static INLINE BLOCK_SIZE get_subsize(BLOCK_SIZE bsize,
567 PARTITION_TYPE partition) {
568 if (partition == PARTITION_INVALID)
Urvang Joshicb586f32016-09-20 11:36:33 -0700569 return BLOCK_INVALID;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700570 else
571 return subsize_lookup[partition][bsize];
572}
573
574static const TX_TYPE intra_mode_to_tx_type_context[INTRA_MODES] = {
575 DCT_DCT, // DC
576 ADST_DCT, // V
577 DCT_ADST, // H
578 DCT_DCT, // D45
579 ADST_ADST, // D135
580 ADST_DCT, // D117
581 DCT_ADST, // D153
582 DCT_ADST, // D207
583 ADST_DCT, // D63
Urvang Joshi6be4a542016-11-03 15:24:05 -0700584#if CONFIG_ALT_INTRA
585 ADST_ADST, // SMOOTH
586#endif // CONFIG_ALT_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700587 ADST_ADST, // TM
588};
589
590#if CONFIG_SUPERTX
591static INLINE int supertx_enabled(const MB_MODE_INFO *mbmi) {
Jingning Han93531242016-12-20 11:54:36 -0800592 TX_SIZE max_tx_size = txsize_sqr_map[mbmi->tx_size];
593 return tx_size_wide[max_tx_size] >
594 AOMMIN(block_size_wide[mbmi->sb_type], block_size_high[mbmi->sb_type]);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700595}
596#endif // CONFIG_SUPERTX
597
Jingning Hanb83e64b2017-03-01 14:52:04 -0800598#define USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4 1
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800599
Jingning Hanb83e64b2017-03-01 14:52:04 -0800600#if CONFIG_EXT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700601#define ALLOW_INTRA_EXT_TX 1
Yaowu Xuc27fc142016-08-22 16:08:15 -0700602
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800603typedef enum {
604 // DCT only
605 EXT_TX_SET_DCTONLY = 0,
606 // DCT + Identity only
607 EXT_TX_SET_DCT_IDTX = 1,
608 // Discrete Trig transforms w/o flip (4) + Identity (1)
609 EXT_TX_SET_DTT4_IDTX = 2,
610 // Discrete Trig transforms w/o flip (4) + Identity (1) + 1D Hor/vert DCT (2)
611 EXT_TX_SET_DTT4_IDTX_1DDCT = 3,
612 // Discrete Trig transforms w/ flip (9) + Identity (1) + 1D Hor/Ver DCT (2)
613 EXT_TX_SET_DTT9_IDTX_1DDCT = 4,
614 // Discrete Trig transforms w/ flip (9) + Identity (1) + 1D Hor/Ver (6)
615 EXT_TX_SET_ALL16 = 5,
616 EXT_TX_SET_TYPES
617} TxSetType;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700618
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800619// Number of transform types in each set type
620static const int num_ext_tx_set[EXT_TX_SET_TYPES] = { 1, 2, 5, 7, 12, 16 };
621
622// Maps intra set index to the set type
623static const int ext_tx_set_type_intra[EXT_TX_SETS_INTRA] = {
624 EXT_TX_SET_DCTONLY, EXT_TX_SET_DTT4_IDTX_1DDCT, EXT_TX_SET_DTT4_IDTX
625};
626
627// Maps inter set index to the set type
628static const int ext_tx_set_type_inter[EXT_TX_SETS_INTER] = {
629 EXT_TX_SET_DCTONLY, EXT_TX_SET_ALL16, EXT_TX_SET_DTT9_IDTX_1DDCT,
630 EXT_TX_SET_DCT_IDTX
631};
632
633// Maps set types above to the indices used for intra
634static const int ext_tx_set_index_intra[EXT_TX_SET_TYPES] = { 0, -1, 2,
635 1, -1, -1 };
636
637// Maps set types above to the indices used for inter
638static const int ext_tx_set_index_inter[EXT_TX_SET_TYPES] = {
639 0, 3, -1, -1, 2, 1
640};
641
642static INLINE TxSetType get_ext_tx_set_type(TX_SIZE tx_size, BLOCK_SIZE bs,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800643 int is_inter, int use_reduced_set) {
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800644 const TX_SIZE tx_size2 = txsize_sqr_up_map[tx_size];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700645 tx_size = txsize_sqr_map[tx_size];
Debargha Mukherjee094c9432017-02-22 10:31:25 -0800646#if CONFIG_CB4X4 && USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4
Jingning Han1a00cff2016-12-28 14:53:14 -0800647 (void)bs;
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800648 if (tx_size > TX_32X32) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -0800649#else
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800650 if (tx_size > TX_32X32 || bs < BLOCK_8X8) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -0800651#endif
Sarah Parker5effe3f2017-02-23 12:49:10 -0800652 if (use_reduced_set)
653 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DTT4_IDTX;
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800654 if (tx_size2 == TX_32X32)
655 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DCTONLY;
656 if (is_inter)
657 return (tx_size == TX_16X16 ? EXT_TX_SET_DTT9_IDTX_1DDCT
658 : EXT_TX_SET_ALL16);
659 else
660 return (tx_size == TX_16X16 ? EXT_TX_SET_DTT4_IDTX
661 : EXT_TX_SET_DTT4_IDTX_1DDCT);
662}
663
664static INLINE int get_ext_tx_set(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800665 int use_reduced_set) {
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800666 const TxSetType set_type =
Sarah Parker5effe3f2017-02-23 12:49:10 -0800667 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800668 return is_inter ? ext_tx_set_index_inter[set_type]
669 : ext_tx_set_index_intra[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700670}
671
clang-format55ce9e02017-02-15 22:27:12 -0800672static const int use_intra_ext_tx_for_txsize[EXT_TX_SETS_INTRA][EXT_TX_SIZES] =
673 {
Jingning Han1a00cff2016-12-28 14:53:14 -0800674#if CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800675 { 1, 1, 1, 1, 1 }, // unused
676 { 0, 1, 1, 0, 0 },
677 { 0, 0, 0, 1, 0 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800678#else
clang-format55ce9e02017-02-15 22:27:12 -0800679 { 1, 1, 1, 1 }, // unused
680 { 1, 1, 0, 0 },
681 { 0, 0, 1, 0 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800682#endif // CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800683 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700684
clang-format55ce9e02017-02-15 22:27:12 -0800685static const int use_inter_ext_tx_for_txsize[EXT_TX_SETS_INTER][EXT_TX_SIZES] =
686 {
Jingning Han1a00cff2016-12-28 14:53:14 -0800687#if CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800688 { 1, 1, 1, 1, 1 }, // unused
689 { 0, 1, 1, 0, 0 },
690 { 0, 0, 0, 1, 0 },
691 { 0, 0, 0, 0, 1 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800692#else
clang-format55ce9e02017-02-15 22:27:12 -0800693 { 1, 1, 1, 1 }, // unused
694 { 1, 1, 0, 0 },
695 { 0, 0, 1, 0 },
696 { 0, 0, 0, 1 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800697#endif // CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800698 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700699
700// Transform types used in each intra set
701static const int ext_tx_used_intra[EXT_TX_SETS_INTRA][TX_TYPES] = {
702 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
703 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0 },
704 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
705};
706
707// Transform types used in each inter set
708static const int ext_tx_used_inter[EXT_TX_SETS_INTER][TX_TYPES] = {
709 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
710 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
711 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
712 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
713};
714
715// 1D Transforms used in inter set, this needs to be changed if
716// ext_tx_used_inter is changed
717static const int ext_tx_used_inter_1D[EXT_TX_SETS_INTER][TX_TYPES_1D] = {
718 { 1, 0, 0, 0 }, { 1, 1, 1, 1 }, { 1, 1, 1, 1 }, { 1, 0, 0, 1 },
719};
720
Sarah Parkere68a3e42017-02-16 14:03:24 -0800721static INLINE int get_ext_tx_types(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800722 int use_reduced_set) {
723 const int set_type =
724 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800725 return num_ext_tx_set[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700726}
727
728#if CONFIG_RECT_TX
729static INLINE int is_rect_tx_allowed_bsize(BLOCK_SIZE bsize) {
730 static const char LUT[BLOCK_SIZES] = {
Jingning Hanf4e097b2017-01-20 09:23:58 -0800731#if CONFIG_CB4X4
732 0, // BLOCK_2X2
733 0, // BLOCK_2X4
734 0, // BLOCK_4X2
735#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700736 0, // BLOCK_4X4
737 1, // BLOCK_4X8
738 1, // BLOCK_8X4
739 0, // BLOCK_8X8
740 1, // BLOCK_8X16
741 1, // BLOCK_16X8
742 0, // BLOCK_16X16
743 1, // BLOCK_16X32
744 1, // BLOCK_32X16
745 0, // BLOCK_32X32
746 0, // BLOCK_32X64
747 0, // BLOCK_64X32
748 0, // BLOCK_64X64
749#if CONFIG_EXT_PARTITION
750 0, // BLOCK_64X128
751 0, // BLOCK_128X64
752 0, // BLOCK_128X128
753#endif // CONFIG_EXT_PARTITION
754 };
755
756 return LUT[bsize];
757}
758
Yue Chen49587a72016-09-28 17:09:47 -0700759static INLINE int is_rect_tx_allowed(const MACROBLOCKD *xd,
760 const MB_MODE_INFO *mbmi) {
Urvang Joshifeb925f2016-12-05 10:37:29 -0800761 return is_rect_tx_allowed_bsize(mbmi->sb_type) &&
Yue Chen49587a72016-09-28 17:09:47 -0700762 !xd->lossless[mbmi->segment_id];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700763}
764
765static INLINE int is_rect_tx(TX_SIZE tx_size) { return tx_size >= TX_SIZES; }
766#endif // CONFIG_RECT_TX
767#endif // CONFIG_EXT_TX
768
769static INLINE TX_SIZE tx_size_from_tx_mode(BLOCK_SIZE bsize, TX_MODE tx_mode,
770 int is_inter) {
771 const TX_SIZE largest_tx_size = tx_mode_to_biggest_tx_size[tx_mode];
Urvang Joshifeb925f2016-12-05 10:37:29 -0800772#if CONFIG_VAR_TX || (CONFIG_EXT_TX && CONFIG_RECT_TX)
773 const TX_SIZE max_rect_tx_size = max_txsize_rect_lookup[bsize];
Jingning Han70e5f3f2016-11-09 17:03:07 -0800774#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700775 const TX_SIZE max_tx_size = max_txsize_lookup[bsize];
Urvang Joshifeb925f2016-12-05 10:37:29 -0800776#endif // CONFIG_VAR_TX || (CONFIG_EXT_TX && CONFIG_RECT_TX)
777 (void)is_inter;
778#if CONFIG_VAR_TX
779#if CONFIG_CB4X4
780 if (bsize == BLOCK_4X4)
781 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
782#else
783 if (bsize < BLOCK_8X8)
784 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
Jingning Han70e5f3f2016-11-09 17:03:07 -0800785#endif
Urvang Joshifeb925f2016-12-05 10:37:29 -0800786 if (txsize_sqr_map[max_rect_tx_size] <= largest_tx_size)
787 return max_rect_tx_size;
788 else
789 return largest_tx_size;
790#elif CONFIG_EXT_TX && CONFIG_RECT_TX
791 if (txsize_sqr_up_map[max_rect_tx_size] <= largest_tx_size) {
792 return max_rect_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700793 } else {
Urvang Joshifeb925f2016-12-05 10:37:29 -0800794 return largest_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700795 }
796#else
Yaowu Xuf883b422016-08-30 14:01:10 -0700797 return AOMMIN(max_tx_size, largest_tx_size);
Urvang Joshifeb925f2016-12-05 10:37:29 -0800798#endif // CONFIG_VAR_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700799}
800
hui su5db97432016-10-14 16:10:14 -0700801#if CONFIG_EXT_INTRA
hui su45dc5972016-12-08 17:42:50 -0800802#define MAX_ANGLE_DELTA_UV 2
803#define ANGLE_STEP_UV 4
804
805static const uint8_t av1_angle_step_y[TX_SIZES] = {
806 0, 4, 3, 3,
807};
808static const uint8_t av1_max_angle_delta_y[TX_SIZES] = {
809 0, 2, 3, 3,
810};
811
hui su5db97432016-10-14 16:10:14 -0700812extern const int16_t dr_intra_derivative[90];
813static const uint8_t mode_to_angle_map[INTRA_MODES] = {
814 0, 90, 180, 45, 135, 111, 157, 203, 67, 0,
815};
816
hui su45dc5972016-12-08 17:42:50 -0800817static INLINE int av1_get_angle_step(BLOCK_SIZE sb_type, int plane) {
818 const TX_SIZE max_tx_size = max_txsize_lookup[sb_type];
819 return plane ? ANGLE_STEP_UV : av1_angle_step_y[max_tx_size];
820}
821
822static INLINE int av1_get_max_angle_delta(BLOCK_SIZE sb_type, int plane) {
823 const TX_SIZE max_tx_size = max_txsize_lookup[sb_type];
824 return plane ? MAX_ANGLE_DELTA_UV : av1_max_angle_delta_y[max_tx_size];
825}
826
hui sueda3d762016-12-06 16:58:23 -0800827#if CONFIG_INTRA_INTERP
hui su5db97432016-10-14 16:10:14 -0700828// Returns whether filter selection is needed for a given
829// intra prediction angle.
Yaowu Xuf883b422016-08-30 14:01:10 -0700830int av1_is_intra_filter_switchable(int angle);
hui sueda3d762016-12-06 16:58:23 -0800831#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700832#endif // CONFIG_EXT_INTRA
833
834#if CONFIG_EXT_TILE
835#define FIXED_TX_TYPE 1
836#else
837#define FIXED_TX_TYPE 0
838#endif
839
840static INLINE TX_TYPE get_default_tx_type(PLANE_TYPE plane_type,
841 const MACROBLOCKD *xd, int block_idx,
842 TX_SIZE tx_size) {
843 const MB_MODE_INFO *const mbmi = &xd->mi[0]->mbmi;
844
845 if (is_inter_block(mbmi) || plane_type != PLANE_TYPE_Y ||
846 xd->lossless[mbmi->segment_id] || tx_size >= TX_32X32)
847 return DCT_DCT;
848
849 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
850 ? get_y_mode(xd->mi[0], block_idx)
851 : mbmi->uv_mode];
852}
853
854static INLINE TX_TYPE get_tx_type(PLANE_TYPE plane_type, const MACROBLOCKD *xd,
855 int block_idx, TX_SIZE tx_size) {
856 const MODE_INFO *const mi = xd->mi[0];
857 const MB_MODE_INFO *const mbmi = &mi->mbmi;
858
859 if (FIXED_TX_TYPE)
860 return get_default_tx_type(plane_type, xd, block_idx, tx_size);
861
Yaowu Xuc27fc142016-08-22 16:08:15 -0700862#if CONFIG_EXT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700863 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] > TX_32X32 ||
864 (txsize_sqr_map[tx_size] >= TX_32X32 && !is_inter_block(mbmi)))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700865 return DCT_DCT;
Jingning Han8260d8b2016-12-28 13:48:43 -0800866 if (mbmi->sb_type >= BLOCK_8X8 || CONFIG_CB4X4) {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700867 if (plane_type == PLANE_TYPE_Y) {
868#if !ALLOW_INTRA_EXT_TX
869 if (is_inter_block(mbmi))
870#endif // ALLOW_INTRA_EXT_TX
871 return mbmi->tx_type;
872 }
Jingning Han1a00cff2016-12-28 14:53:14 -0800873
874 if (is_inter_block(mbmi)) {
875// UV Inter only
876#if CONFIG_CB4X4
877 if (tx_size < TX_4X4) return DCT_DCT;
878#endif
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800879 return (mbmi->tx_type == IDTX && txsize_sqr_map[tx_size] >= TX_32X32)
Yaowu Xuc27fc142016-08-22 16:08:15 -0700880 ? DCT_DCT
881 : mbmi->tx_type;
Jingning Han1a00cff2016-12-28 14:53:14 -0800882 }
Yaowu Xuc27fc142016-08-22 16:08:15 -0700883 }
884
Jingning Han8260d8b2016-12-28 13:48:43 -0800885#if CONFIG_CB4X4
Jingning Han1a00cff2016-12-28 14:53:14 -0800886 if (tx_size < TX_4X4)
887 return DCT_DCT;
888 else
889 return intra_mode_to_tx_type_context[mbmi->uv_mode];
Jingning Han8260d8b2016-12-28 13:48:43 -0800890#endif
891
Yaowu Xuc27fc142016-08-22 16:08:15 -0700892 // Sub8x8-Inter/Intra OR UV-Intra
893 if (is_inter_block(mbmi)) // Sub8x8-Inter
894 return DCT_DCT;
895 else // Sub8x8 Intra OR UV-Intra
896 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
897 ? get_y_mode(mi, block_idx)
898 : mbmi->uv_mode];
899#else // CONFIG_EXT_TX
900 (void)block_idx;
901 if (plane_type != PLANE_TYPE_Y || xd->lossless[mbmi->segment_id] ||
902 txsize_sqr_map[tx_size] >= TX_32X32)
903 return DCT_DCT;
904 return mbmi->tx_type;
905#endif // CONFIG_EXT_TX
906}
907
Yaowu Xuf883b422016-08-30 14:01:10 -0700908void av1_setup_block_planes(MACROBLOCKD *xd, int ss_x, int ss_y);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700909
Jingning Han4e1737a2016-10-25 16:05:02 -0700910static INLINE int tx_size_to_depth(const TX_SIZE tx_size) {
911 return (int)(tx_size - TX_4X4);
912}
913
914static INLINE TX_SIZE depth_to_tx_size(const int depth) {
915 return (TX_SIZE)(depth + TX_4X4);
916}
917
Yaowu Xuc27fc142016-08-22 16:08:15 -0700918static INLINE TX_SIZE get_uv_tx_size(const MB_MODE_INFO *mbmi,
919 const struct macroblockd_plane *pd) {
Debargha Mukherjee2f123402016-08-30 17:43:38 -0700920 TX_SIZE uv_txsize;
Jingning Han93531242016-12-20 11:54:36 -0800921#if CONFIG_CB4X4
922 assert(mbmi->tx_size > TX_2X2);
923#endif
924
Yaowu Xuc27fc142016-08-22 16:08:15 -0700925#if CONFIG_SUPERTX
926 if (supertx_enabled(mbmi))
927 return uvsupertx_size_lookup[txsize_sqr_map[mbmi->tx_size]]
928 [pd->subsampling_x][pd->subsampling_y];
929#endif // CONFIG_SUPERTX
Jingning Hancabd9892016-12-01 12:28:42 -0800930
Debargha Mukherjee2f123402016-08-30 17:43:38 -0700931 uv_txsize = uv_txsize_lookup[mbmi->sb_type][mbmi->tx_size][pd->subsampling_x]
932 [pd->subsampling_y];
Jingning Han31b6a4f2017-02-23 11:05:53 -0800933#if CONFIG_CB4X4 && !CONFIG_CHROMA_2X2
Jingning Han18c53c82017-02-17 14:49:57 -0800934 uv_txsize = AOMMAX(uv_txsize, TX_4X4);
935#endif
Debargha Mukherjee2f123402016-08-30 17:43:38 -0700936 assert(uv_txsize != TX_INVALID);
937 return uv_txsize;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700938}
939
Angie Chiang7fcfee42017-02-24 15:51:03 -0800940static INLINE TX_SIZE get_tx_size(int plane, const MACROBLOCKD *xd) {
Angie Chiang80b82262017-02-24 11:39:47 -0800941 const MB_MODE_INFO *mbmi = &xd->mi[0]->mbmi;
942 const MACROBLOCKD_PLANE *pd = &xd->plane[plane];
943 const TX_SIZE tx_size = plane ? get_uv_tx_size(mbmi, pd) : mbmi->tx_size;
Angie Chiang80b82262017-02-24 11:39:47 -0800944 return tx_size;
945}
946
Yaowu Xuc27fc142016-08-22 16:08:15 -0700947static INLINE BLOCK_SIZE
948get_plane_block_size(BLOCK_SIZE bsize, const struct macroblockd_plane *pd) {
949 return ss_size_lookup[bsize][pd->subsampling_x][pd->subsampling_y];
950}
951
952static INLINE void reset_skip_context(MACROBLOCKD *xd, BLOCK_SIZE bsize) {
953 int i;
954 for (i = 0; i < MAX_MB_PLANE; i++) {
955 struct macroblockd_plane *const pd = &xd->plane[i];
956 const BLOCK_SIZE plane_bsize = get_plane_block_size(bsize, pd);
Jingning Hanb49004d2016-12-05 09:37:29 -0800957 const int txs_wide = block_size_wide[plane_bsize] >> tx_size_wide_log2[0];
958 const int txs_high = block_size_high[plane_bsize] >> tx_size_high_log2[0];
959 memset(pd->above_context, 0, sizeof(ENTROPY_CONTEXT) * txs_wide);
960 memset(pd->left_context, 0, sizeof(ENTROPY_CONTEXT) * txs_high);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700961 }
962}
963
964typedef void (*foreach_transformed_block_visitor)(int plane, int block,
965 int blk_row, int blk_col,
966 BLOCK_SIZE plane_bsize,
967 TX_SIZE tx_size, void *arg);
968
Yaowu Xuf883b422016-08-30 14:01:10 -0700969void av1_foreach_transformed_block_in_plane(
Yaowu Xuc27fc142016-08-22 16:08:15 -0700970 const MACROBLOCKD *const xd, BLOCK_SIZE bsize, int plane,
971 foreach_transformed_block_visitor visit, void *arg);
972
Yushin Cho7a428ba2017-01-12 16:28:49 -0800973#if CONFIG_DAALA_DIST
974void av1_foreach_8x8_transformed_block_in_plane(
975 const MACROBLOCKD *const xd, BLOCK_SIZE bsize, int plane,
976 foreach_transformed_block_visitor visit,
977 foreach_transformed_block_visitor mi_visit, void *arg);
978#endif
979
iole moccagattaf25a4cf2016-11-11 23:57:57 -0800980#if CONFIG_COEF_INTERLEAVE
981static INLINE int get_max_4x4_size(int num_4x4, int mb_to_edge,
982 int subsampling) {
983 return num_4x4 + (mb_to_edge >= 0 ? 0 : mb_to_edge >> (5 + subsampling));
984}
985
986void av1_foreach_transformed_block_interleave(
987 const MACROBLOCKD *const xd, BLOCK_SIZE bsize,
988 foreach_transformed_block_visitor visit, void *arg);
989#endif
990
Yaowu Xuf883b422016-08-30 14:01:10 -0700991void av1_set_contexts(const MACROBLOCKD *xd, struct macroblockd_plane *pd,
Jingning Haneee43152016-12-05 09:58:45 -0800992 int plane, TX_SIZE tx_size, int has_eob, int aoff,
993 int loff);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700994
995#if CONFIG_EXT_INTER
996static INLINE int is_interintra_allowed_bsize(const BLOCK_SIZE bsize) {
David Barkerac37fa32016-12-02 12:30:21 +0000997#if !USE_RECT_INTERINTRA
998 if (block_size_wide[bsize] != block_size_high[bsize]) return 0;
999#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -07001000 // TODO(debargha): Should this be bsize < BLOCK_LARGEST?
1001 return (bsize >= BLOCK_8X8) && (bsize < BLOCK_64X64);
1002}
1003
1004static INLINE int is_interintra_allowed_mode(const PREDICTION_MODE mode) {
1005 return (mode >= NEARESTMV) && (mode <= NEWMV);
1006}
1007
1008static INLINE int is_interintra_allowed_ref(const MV_REFERENCE_FRAME rf[2]) {
1009 return (rf[0] > INTRA_FRAME) && (rf[1] <= INTRA_FRAME);
1010}
1011
1012static INLINE int is_interintra_allowed(const MB_MODE_INFO *mbmi) {
1013 return is_interintra_allowed_bsize(mbmi->sb_type) &&
1014 is_interintra_allowed_mode(mbmi->mode) &&
1015 is_interintra_allowed_ref(mbmi->ref_frame);
1016}
1017
1018static INLINE int is_interintra_allowed_bsize_group(const int group) {
1019 int i;
1020 for (i = 0; i < BLOCK_SIZES; i++) {
Urvang Joshicb586f32016-09-20 11:36:33 -07001021 if (size_group_lookup[i] == group &&
1022 is_interintra_allowed_bsize((BLOCK_SIZE)i)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001023 return 1;
Urvang Joshicb586f32016-09-20 11:36:33 -07001024 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001025 }
1026 return 0;
1027}
1028
1029static INLINE int is_interintra_pred(const MB_MODE_INFO *mbmi) {
1030 return (mbmi->ref_frame[1] == INTRA_FRAME) && is_interintra_allowed(mbmi);
1031}
1032#endif // CONFIG_EXT_INTER
1033
Yue Chencb60b182016-10-13 15:18:22 -07001034#if CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
1035static INLINE int is_motion_variation_allowed_bsize(BLOCK_SIZE bsize) {
1036 return (bsize >= BLOCK_8X8);
1037}
1038
Yue Chen69f18e12016-09-08 14:48:15 -07001039static INLINE MOTION_MODE motion_mode_allowed(const MB_MODE_INFO *mbmi) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001040#if CONFIG_EXT_INTER
Yue Chen69f18e12016-09-08 14:48:15 -07001041 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
1042 is_inter_mode(mbmi->mode) && mbmi->ref_frame[1] != INTRA_FRAME) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001043#else
Yue Chen69f18e12016-09-08 14:48:15 -07001044 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
1045 is_inter_mode(mbmi->mode)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001046#endif // CONFIG_EXT_INTER
Yue Chen69f18e12016-09-08 14:48:15 -07001047#if CONFIG_WARPED_MOTION
1048 if (!has_second_ref(mbmi) && mbmi->num_proj_ref[0] >= 3)
1049 return WARPED_CAUSAL;
1050 else
1051#endif // CONFIG_WARPED_MOTION
1052#if CONFIG_MOTION_VAR
1053 return OBMC_CAUSAL;
1054#else
1055 return SIMPLE_TRANSLATION;
1056#endif // CONFIG_MOTION_VAR
1057 } else {
1058 return SIMPLE_TRANSLATION;
1059 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001060}
1061
Yue Chencb60b182016-10-13 15:18:22 -07001062#if CONFIG_MOTION_VAR
Yaowu Xuc27fc142016-08-22 16:08:15 -07001063static INLINE int is_neighbor_overlappable(const MB_MODE_INFO *mbmi) {
1064 return (is_inter_block(mbmi));
1065}
Yue Chencb60b182016-10-13 15:18:22 -07001066#endif // CONFIG_MOTION_VAR
1067#endif // CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
Yaowu Xuc27fc142016-08-22 16:08:15 -07001068
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001069// Returns sub-sampled dimensions of the given block.
1070// The output values for 'rows_within_bounds' and 'cols_within_bounds' will
1071// differ from 'height' and 'width' when part of the block is outside the right
1072// and/or bottom image boundary.
1073static INLINE void av1_get_block_dimensions(BLOCK_SIZE bsize, int plane,
1074 const MACROBLOCKD *xd, int *width,
1075 int *height,
1076 int *rows_within_bounds,
1077 int *cols_within_bounds) {
1078 const int block_height = block_size_high[bsize];
1079 const int block_width = block_size_wide[bsize];
1080 const int block_rows = (xd->mb_to_bottom_edge >= 0)
1081 ? block_height
1082 : (xd->mb_to_bottom_edge >> 3) + block_height;
1083 const int block_cols = (xd->mb_to_right_edge >= 0)
1084 ? block_width
1085 : (xd->mb_to_right_edge >> 3) + block_width;
1086 const struct macroblockd_plane *const pd = &xd->plane[plane];
1087 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_x == 0));
1088 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_y == 0));
1089 assert(block_width >= block_cols);
1090 assert(block_height >= block_rows);
1091 if (width) *width = block_width >> pd->subsampling_x;
1092 if (height) *height = block_height >> pd->subsampling_y;
1093 if (rows_within_bounds) *rows_within_bounds = block_rows >> pd->subsampling_y;
1094 if (cols_within_bounds) *cols_within_bounds = block_cols >> pd->subsampling_x;
1095}
1096
Yue Chen19e7aa82016-11-30 14:05:39 -08001097#if CONFIG_GLOBAL_MOTION
1098static INLINE int is_nontrans_global_motion(const MACROBLOCKD *xd) {
1099 const MODE_INFO *mi = xd->mi[0];
1100 const MB_MODE_INFO *const mbmi = &mi->mbmi;
1101 int ref;
1102#if CONFIG_CB4X4
1103 const int unify_bsize = 1;
1104#else
1105 const int unify_bsize = 0;
1106#endif
1107
1108 // First check if all modes are ZEROMV
1109 if (mbmi->sb_type >= BLOCK_8X8 || unify_bsize) {
1110#if CONFIG_EXT_INTER
1111 if (mbmi->mode != ZEROMV && mbmi->mode != ZERO_ZEROMV) return 0;
1112#else
1113 if (mbmi->mode != ZEROMV) return 0;
1114#endif // CONFIG_EXT_INTER
1115 } else {
1116#if CONFIG_EXT_INTER
1117 if (mi->bmi[0].as_mode != ZEROMV || mi->bmi[1].as_mode != ZEROMV ||
1118 mi->bmi[2].as_mode != ZEROMV || mi->bmi[3].as_mode != ZEROMV ||
1119 mi->bmi[0].as_mode != ZERO_ZEROMV ||
1120 mi->bmi[1].as_mode != ZERO_ZEROMV ||
1121 mi->bmi[2].as_mode != ZERO_ZEROMV || mi->bmi[3].as_mode != ZERO_ZEROMV)
1122 return 0;
1123#else
1124 if (mi->bmi[0].as_mode != ZEROMV || mi->bmi[1].as_mode != ZEROMV ||
1125 mi->bmi[2].as_mode != ZEROMV || mi->bmi[3].as_mode != ZEROMV)
1126 return 0;
1127#endif // CONFIG_EXT_INTER
1128 }
1129 // Now check if all global motion is non translational
1130 for (ref = 0; ref < 1 + has_second_ref(mbmi); ++ref) {
1131 if (xd->global_motion[mbmi->ref_frame[ref]].wmtype <= TRANSLATION) return 0;
1132 }
1133 return 1;
1134}
1135#endif // CONFIG_GLOBAL_MOTION
1136
Luc Trudeau005feb62017-02-22 13:34:01 -05001137static INLINE PLANE_TYPE get_plane_type(const int plane) {
1138 return (plane == 0) ? PLANE_TYPE_Y : PLANE_TYPE_UV;
1139}
1140
Yaowu Xuc27fc142016-08-22 16:08:15 -07001141#ifdef __cplusplus
1142} // extern "C"
1143#endif
1144
Yaowu Xuf883b422016-08-30 14:01:10 -07001145#endif // AV1_COMMON_BLOCKD_H_