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Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_COMMON_BLOCKD_H_
13#define AV1_COMMON_BLOCKD_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
Yaowu Xuf883b422016-08-30 14:01:10 -070015#include "./aom_config.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070016
Yaowu Xuf883b422016-08-30 14:01:10 -070017#include "aom_dsp/aom_dsp_common.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070018#include "aom_ports/mem.h"
19#include "aom_scale/yv12config.h"
20
21#include "av1/common/common_data.h"
22#include "av1/common/quant_common.h"
23#include "av1/common/entropy.h"
24#include "av1/common/entropymode.h"
25#include "av1/common/mv.h"
26#include "av1/common/scale.h"
27#include "av1/common/seg_common.h"
28#include "av1/common/tile_common.h"
Yushin Cho77bba8d2016-11-04 16:36:56 -070029#if CONFIG_PVQ
30#include "av1/common/pvq.h"
31#include "av1/common/pvq_state.h"
32#include "av1/decoder/decint.h"
33#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070034
35#ifdef __cplusplus
36extern "C" {
37#endif
38
Jingning Hanc41a5492017-02-24 11:18:52 -080039#define SUB8X8_COMP_REF 1
40
Yaowu Xuc27fc142016-08-22 16:08:15 -070041#define MAX_MB_PLANE 3
42
David Barkerac37fa32016-12-02 12:30:21 +000043#if CONFIG_EXT_INTER
Sarah Parkerb9f757c2017-01-06 17:12:24 -080044
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080045#if CONFIG_COMPOUND_SEGMENT
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080046// Set COMPOUND_SEGMENT_TYPE to one of the three
47// 0: Uniform
48// 1: Difference weighted
49#define COMPOUND_SEGMENT_TYPE 1
50
51#if COMPOUND_SEGMENT_TYPE == 0
52#define MAX_SEG_MASK_BITS 1
Sarah Parkerb9f757c2017-01-06 17:12:24 -080053// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
54typedef enum {
55 UNIFORM_45 = 0,
56 UNIFORM_45_INV,
Sarah Parkerb9f757c2017-01-06 17:12:24 -080057 SEG_MASK_TYPES,
58} SEG_MASK_TYPE;
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080059
60#elif COMPOUND_SEGMENT_TYPE == 1
61#define MAX_SEG_MASK_BITS 1
62// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
63typedef enum {
Yaowu Xua93e65e2017-01-24 10:58:48 -080064 DIFFWTD_42 = 0,
65 DIFFWTD_42_INV,
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080066 SEG_MASK_TYPES,
67} SEG_MASK_TYPE;
68
69#endif // COMPOUND_SEGMENT_TYPE
Sarah Parkerb9f757c2017-01-06 17:12:24 -080070#endif // CONFIG_COMPOUND_SEGMENT
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080071#endif // CONFIG_EXT_INTER
David Barkerac37fa32016-12-02 12:30:21 +000072
Yaowu Xuc27fc142016-08-22 16:08:15 -070073typedef enum {
74 KEY_FRAME = 0,
75 INTER_FRAME = 1,
76 FRAME_TYPES,
77} FRAME_TYPE;
78
Yaowu Xuc27fc142016-08-22 16:08:15 -070079static INLINE int is_inter_mode(PREDICTION_MODE mode) {
80#if CONFIG_EXT_INTER
81 return mode >= NEARESTMV && mode <= NEW_NEWMV;
82#else
83 return mode >= NEARESTMV && mode <= NEWMV;
84#endif // CONFIG_EXT_INTER
85}
86
Yushin Cho77bba8d2016-11-04 16:36:56 -070087#if CONFIG_PVQ
88typedef struct PVQ_INFO {
89 int theta[PVQ_MAX_PARTITIONS];
90 int max_theta[PVQ_MAX_PARTITIONS];
91 int qg[PVQ_MAX_PARTITIONS];
92 int k[PVQ_MAX_PARTITIONS];
Yushin Cho48f84db2016-11-07 21:20:17 -080093 od_coeff y[OD_TXSIZE_MAX * OD_TXSIZE_MAX];
Yushin Cho77bba8d2016-11-04 16:36:56 -070094 int nb_bands;
95 int off[PVQ_MAX_PARTITIONS];
96 int size[PVQ_MAX_PARTITIONS];
97 int skip_rest;
98 int skip_dir;
ltrudeaue1c09292017-01-20 15:42:13 -050099 int bs; // log of the block size minus two,
100 // i.e. equivalent to aom's TX_SIZE
101 // Block skip info, indicating whether DC/AC, is coded.
102 PVQ_SKIP_TYPE ac_dc_coded; // bit0: DC coded, bit1 : AC coded (1 means coded)
Yushin Cho77bba8d2016-11-04 16:36:56 -0700103 tran_low_t dq_dc_residue;
104} PVQ_INFO;
105
106typedef struct PVQ_QUEUE {
107 PVQ_INFO *buf; // buffer for pvq info, stored in encoding order
108 int curr_pos; // curr position to write PVQ_INFO
109 int buf_len; // allocated buffer length
110 int last_pos; // last written position of PVQ_INFO in a tile
111} PVQ_QUEUE;
112#endif
113
David Barkerac37fa32016-12-02 12:30:21 +0000114typedef struct {
115 uint8_t *plane[MAX_MB_PLANE];
116 int stride[MAX_MB_PLANE];
117} BUFFER_SET;
118
Yaowu Xuc27fc142016-08-22 16:08:15 -0700119#if CONFIG_EXT_INTER
120static INLINE int is_inter_singleref_mode(PREDICTION_MODE mode) {
121 return mode >= NEARESTMV && mode <= NEWFROMNEARMV;
122}
123
124static INLINE int is_inter_compound_mode(PREDICTION_MODE mode) {
125 return mode >= NEAREST_NEARESTMV && mode <= NEW_NEWMV;
126}
127
128static INLINE PREDICTION_MODE compound_ref0_mode(PREDICTION_MODE mode) {
129 static PREDICTION_MODE lut[MB_MODE_COUNT] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800130 MB_MODE_COUNT, // DC_PRED
131 MB_MODE_COUNT, // V_PRED
132 MB_MODE_COUNT, // H_PRED
133 MB_MODE_COUNT, // D45_PRED
134 MB_MODE_COUNT, // D135_PRED
135 MB_MODE_COUNT, // D117_PRED
136 MB_MODE_COUNT, // D153_PRED
137 MB_MODE_COUNT, // D207_PRED
138 MB_MODE_COUNT, // D63_PRED
139#if CONFIG_ALT_INTRA
140 MB_MODE_COUNT, // SMOOTH_PRED
141#endif // CONFIG_ALT_INTRA
142 MB_MODE_COUNT, // TM_PRED
143 MB_MODE_COUNT, // NEARESTMV
144 MB_MODE_COUNT, // NEARMV
145 MB_MODE_COUNT, // ZEROMV
146 MB_MODE_COUNT, // NEWMV
147 MB_MODE_COUNT, // NEWFROMNEARMV
148 NEARESTMV, // NEAREST_NEARESTMV
149 NEARESTMV, // NEAREST_NEARMV
150 NEARMV, // NEAR_NEARESTMV
151 NEARMV, // NEAR_NEARMV
152 NEARESTMV, // NEAREST_NEWMV
153 NEWMV, // NEW_NEARESTMV
154 NEARMV, // NEAR_NEWMV
155 NEWMV, // NEW_NEARMV
156 ZEROMV, // ZERO_ZEROMV
157 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700158 };
159 assert(is_inter_compound_mode(mode));
160 return lut[mode];
161}
162
163static INLINE PREDICTION_MODE compound_ref1_mode(PREDICTION_MODE mode) {
164 static PREDICTION_MODE lut[MB_MODE_COUNT] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800165 MB_MODE_COUNT, // DC_PRED
166 MB_MODE_COUNT, // V_PRED
167 MB_MODE_COUNT, // H_PRED
168 MB_MODE_COUNT, // D45_PRED
169 MB_MODE_COUNT, // D135_PRED
170 MB_MODE_COUNT, // D117_PRED
171 MB_MODE_COUNT, // D153_PRED
172 MB_MODE_COUNT, // D207_PRED
173 MB_MODE_COUNT, // D63_PRED
174#if CONFIG_ALT_INTRA
175 MB_MODE_COUNT, // SMOOTH_PRED
176#endif // CONFIG_ALT_INTRA
177 MB_MODE_COUNT, // TM_PRED
178 MB_MODE_COUNT, // NEARESTMV
179 MB_MODE_COUNT, // NEARMV
180 MB_MODE_COUNT, // ZEROMV
181 MB_MODE_COUNT, // NEWMV
182 MB_MODE_COUNT, // NEWFROMNEARMV
183 NEARESTMV, // NEAREST_NEARESTMV
184 NEARMV, // NEAREST_NEARMV
185 NEARESTMV, // NEAR_NEARESTMV
186 NEARMV, // NEAR_NEARMV
187 NEWMV, // NEAREST_NEWMV
188 NEARESTMV, // NEW_NEARESTMV
189 NEWMV, // NEAR_NEWMV
190 NEARMV, // NEW_NEARMV
191 ZEROMV, // ZERO_ZEROMV
192 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700193 };
194 assert(is_inter_compound_mode(mode));
195 return lut[mode];
196}
197
198static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
199 return (mode == NEWMV || mode == NEWFROMNEARMV || mode == NEW_NEWMV ||
200 mode == NEAREST_NEWMV || mode == NEW_NEARESTMV ||
201 mode == NEAR_NEWMV || mode == NEW_NEARMV);
202}
Sarah Parker6fdc8532016-11-16 17:47:13 -0800203
Sarah Parker2e604882017-01-17 17:31:25 -0800204static INLINE int use_masked_motion_search(COMPOUND_TYPE type) {
205 return (type == COMPOUND_WEDGE);
206}
207
Sarah Parker6fdc8532016-11-16 17:47:13 -0800208static INLINE int is_masked_compound_type(COMPOUND_TYPE type) {
Sarah Parker569edda2016-12-14 14:57:38 -0800209#if CONFIG_COMPOUND_SEGMENT
210 return (type == COMPOUND_WEDGE || type == COMPOUND_SEG);
211#else
Sarah Parker6fdc8532016-11-16 17:47:13 -0800212 return (type == COMPOUND_WEDGE);
Sarah Parker569edda2016-12-14 14:57:38 -0800213#endif // CONFIG_COMPOUND_SEGMENT
Sarah Parker6fdc8532016-11-16 17:47:13 -0800214}
Yaowu Xuc27fc142016-08-22 16:08:15 -0700215#else
216
217static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
218 return (mode == NEWMV);
219}
220#endif // CONFIG_EXT_INTER
221
222/* For keyframes, intra block modes are predicted by the (already decoded)
223 modes for the Y blocks to the left and above us; for interframes, there
224 is a single probability table. */
225
226typedef struct {
227 PREDICTION_MODE as_mode;
228 int_mv as_mv[2]; // first, second inter predictor motion vectors
229#if CONFIG_REF_MV
Yaowu Xuf5bbbfa2016-09-26 09:13:38 -0700230 int_mv pred_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700231#endif
232#if CONFIG_EXT_INTER
233 int_mv ref_mv[2];
234#endif // CONFIG_EXT_INTER
235} b_mode_info;
236
237typedef int8_t MV_REFERENCE_FRAME;
238
Urvang Joshib100db72016-10-12 16:28:56 -0700239#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700240typedef struct {
241 // Number of base colors for Y (0) and UV (1)
242 uint8_t palette_size[2];
243// Value of base colors for Y, U, and V
Yaowu Xuf883b422016-08-30 14:01:10 -0700244#if CONFIG_AOM_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700245 uint16_t palette_colors[3 * PALETTE_MAX_SIZE];
246#else
247 uint8_t palette_colors[3 * PALETTE_MAX_SIZE];
Yaowu Xuf883b422016-08-30 14:01:10 -0700248#endif // CONFIG_AOM_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700249 // Only used by encoder to store the color index of the top left pixel.
250 // TODO(huisu): move this to encoder
251 uint8_t palette_first_color_idx[2];
252} PALETTE_MODE_INFO;
Urvang Joshib100db72016-10-12 16:28:56 -0700253#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700254
hui su5db97432016-10-14 16:10:14 -0700255#if CONFIG_FILTER_INTRA
Yue Chen8d8638a2017-02-21 13:28:16 +0800256#define USE_3TAP_INTRA_FILTER 1 // 0: 4-tap; 1: 3-tap
Yaowu Xuc27fc142016-08-22 16:08:15 -0700257typedef struct {
258 // 1: an ext intra mode is used; 0: otherwise.
hui su5db97432016-10-14 16:10:14 -0700259 uint8_t use_filter_intra_mode[PLANE_TYPES];
260 FILTER_INTRA_MODE filter_intra_mode[PLANE_TYPES];
261} FILTER_INTRA_MODE_INFO;
262#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700263
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800264#if CONFIG_VAR_TX
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800265#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800266#define TXB_COEFF_COST_MAP_SIZE (2 * MAX_MIB_SIZE)
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800267#endif
268#endif
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800269
270// TODO(angiebird): Merge RD_COST and RD_STATS
271typedef struct RD_STATS {
272 int rate;
273 int64_t dist;
274 int64_t sse;
275 int skip;
276#if CONFIG_RD_DEBUG
277 int txb_coeff_cost[MAX_MB_PLANE];
Angie Chiang3963d632016-11-10 18:41:40 -0800278#if CONFIG_VAR_TX
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800279 int txb_coeff_cost_map[MAX_MB_PLANE][TXB_COEFF_COST_MAP_SIZE]
280 [TXB_COEFF_COST_MAP_SIZE];
Angie Chiang3963d632016-11-10 18:41:40 -0800281#endif // CONFIG_VAR_TX
282#endif // CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800283} RD_STATS;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800284
Sarah Parker6fdc8532016-11-16 17:47:13 -0800285#if CONFIG_EXT_INTER
286typedef struct {
287 COMPOUND_TYPE type;
288 int wedge_index;
289 int wedge_sign;
Sarah Parker569edda2016-12-14 14:57:38 -0800290#if CONFIG_COMPOUND_SEGMENT
Sarah Parkerb9f757c2017-01-06 17:12:24 -0800291 SEG_MASK_TYPE mask_type;
292 DECLARE_ALIGNED(16, uint8_t, seg_mask[2 * MAX_SB_SQUARE]);
Sarah Parker569edda2016-12-14 14:57:38 -0800293#endif // CONFIG_COMPOUND_SEGMENT
Sarah Parker6fdc8532016-11-16 17:47:13 -0800294} INTERINTER_COMPOUND_DATA;
295#endif // CONFIG_EXT_INTER
296
Yaowu Xuc27fc142016-08-22 16:08:15 -0700297// This structure now relates to 8x8 block regions.
298typedef struct {
299 // Common for both INTER and INTRA blocks
300 BLOCK_SIZE sb_type;
301 PREDICTION_MODE mode;
302 TX_SIZE tx_size;
303#if CONFIG_VAR_TX
304 // TODO(jingning): This effectively assigned a separate entry for each
305 // 8x8 block. Apparently it takes much more space than needed.
306 TX_SIZE inter_tx_size[MAX_MIB_SIZE][MAX_MIB_SIZE];
Jingning Hane67b38a2016-11-04 10:30:00 -0700307 TX_SIZE min_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700308#endif
309 int8_t skip;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700310 int8_t segment_id;
311#if CONFIG_SUPERTX
312 // Minimum of all segment IDs under the current supertx block.
313 int8_t segment_id_supertx;
314#endif // CONFIG_SUPERTX
315 int8_t seg_id_predicted; // valid only when temporal_update is enabled
316
317 // Only for INTRA blocks
318 PREDICTION_MODE uv_mode;
Urvang Joshib100db72016-10-12 16:28:56 -0700319#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700320 PALETTE_MODE_INFO palette_mode_info;
Urvang Joshib100db72016-10-12 16:28:56 -0700321#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700322
323// Only for INTER blocks
324#if CONFIG_DUAL_FILTER
James Zern7b9407a2016-05-18 23:48:05 -0700325 InterpFilter interp_filter[4];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700326#else
James Zern7b9407a2016-05-18 23:48:05 -0700327 InterpFilter interp_filter;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700328#endif
329 MV_REFERENCE_FRAME ref_frame[2];
330 TX_TYPE tx_type;
331
hui su5db97432016-10-14 16:10:14 -0700332#if CONFIG_FILTER_INTRA
333 FILTER_INTRA_MODE_INFO filter_intra_mode_info;
334#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700335#if CONFIG_EXT_INTRA
hui sueda3d762016-12-06 16:58:23 -0800336 // The actual prediction angle is the base angle + (angle_delta * step).
Yaowu Xuc27fc142016-08-22 16:08:15 -0700337 int8_t angle_delta[2];
hui sueda3d762016-12-06 16:58:23 -0800338#if CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700339 // To-Do (huisu): this may be replaced by interp_filter
340 INTRA_FILTER intra_filter;
hui sueda3d762016-12-06 16:58:23 -0800341#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700342#endif // CONFIG_EXT_INTRA
343
344#if CONFIG_EXT_INTER
345 INTERINTRA_MODE interintra_mode;
346 // TODO(debargha): Consolidate these flags
347 int use_wedge_interintra;
348 int interintra_wedge_index;
349 int interintra_wedge_sign;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800350 INTERINTER_COMPOUND_DATA interinter_compound_data;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700351#endif // CONFIG_EXT_INTER
Yue Chencb60b182016-10-13 15:18:22 -0700352 MOTION_MODE motion_mode;
Yue Chen5329a2b2017-02-28 17:33:00 +0800353#if CONFIG_MOTION_VAR
354 int overlappable_neighbors[2];
355#endif // CONFIG_MOTION_VAR
Yaowu Xuc27fc142016-08-22 16:08:15 -0700356 int_mv mv[2];
357 int_mv pred_mv[2];
358#if CONFIG_REF_MV
359 uint8_t ref_mv_idx;
360#endif
361#if CONFIG_EXT_PARTITION_TYPES
362 PARTITION_TYPE partition;
363#endif
364#if CONFIG_NEW_QUANT
365 int dq_off_index;
366 int send_dq_bit;
367#endif // CONFIG_NEW_QUANT
368 /* deringing gain *per-superblock* */
Jean-Marc Valin5f5c1322017-03-21 16:20:21 -0400369 int8_t cdef_strength;
Arild Fuldseth07441162016-08-15 15:07:52 +0200370#if CONFIG_DELTA_Q
371 int current_q_index;
372#endif
Angie Chiangd4022822016-11-02 18:30:25 -0700373#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800374 RD_STATS rd_stats;
Angie Chiangd4022822016-11-02 18:30:25 -0700375 int mi_row;
376 int mi_col;
377#endif
Yue Chen69f18e12016-09-08 14:48:15 -0700378#if CONFIG_WARPED_MOTION
379 int num_proj_ref[2];
380 WarpedMotionParams wm_params[2];
381#endif // CONFIG_WARPED_MOTION
Ryan Lei9b02b0e2017-01-30 15:52:20 -0800382
383 BOUNDARY_TYPE boundary_info;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700384} MB_MODE_INFO;
385
386typedef struct MODE_INFO {
387 MB_MODE_INFO mbmi;
388 b_mode_info bmi[4];
389} MODE_INFO;
390
391static INLINE PREDICTION_MODE get_y_mode(const MODE_INFO *mi, int block) {
Jingning Hand7d20472016-12-14 11:13:48 -0800392#if CONFIG_CB4X4
393 (void)block;
394 return mi->mbmi.mode;
395#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700396 return mi->mbmi.sb_type < BLOCK_8X8 ? mi->bmi[block].as_mode : mi->mbmi.mode;
Jingning Hand7d20472016-12-14 11:13:48 -0800397#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700398}
399
400static INLINE int is_inter_block(const MB_MODE_INFO *mbmi) {
401 return mbmi->ref_frame[0] > INTRA_FRAME;
402}
403
404static INLINE int has_second_ref(const MB_MODE_INFO *mbmi) {
405 return mbmi->ref_frame[1] > INTRA_FRAME;
406}
407
Yaowu Xuf883b422016-08-30 14:01:10 -0700408PREDICTION_MODE av1_left_block_mode(const MODE_INFO *cur_mi,
409 const MODE_INFO *left_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700410
Yaowu Xuf883b422016-08-30 14:01:10 -0700411PREDICTION_MODE av1_above_block_mode(const MODE_INFO *cur_mi,
412 const MODE_INFO *above_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700413
Sarah Parker19234cc2017-03-10 16:43:25 -0800414#if CONFIG_GLOBAL_MOTION
415static INLINE int is_global_mv_block(const MODE_INFO *mi, int block,
416 TransformationType type) {
417 PREDICTION_MODE mode = get_y_mode(mi, block);
418#if GLOBAL_SUB8X8_USED
419 const int block_size_allowed = 1;
420#else
421 const BLOCK_SIZE bsize = mi->mbmi.sb_type;
422 const int block_size_allowed = (bsize >= BLOCK_8X8);
423#endif // GLOBAL_SUB8X8_USED
424#if CONFIG_EXT_INTER
425 return (mode == ZEROMV || mode == ZERO_ZEROMV) && type > TRANSLATION &&
426 block_size_allowed;
427#else
428 return mode == ZEROMV && type > TRANSLATION && block_size_allowed;
429#endif // CONFIG_EXT_INTER
430}
431#endif // CONFIG_GLOBAL_MOTION
432
Yaowu Xuc27fc142016-08-22 16:08:15 -0700433enum mv_precision { MV_PRECISION_Q3, MV_PRECISION_Q4 };
434
435struct buf_2d {
436 uint8_t *buf;
437 uint8_t *buf0;
438 int width;
439 int height;
440 int stride;
441};
442
443typedef struct macroblockd_plane {
444 tran_low_t *dqcoeff;
445 PLANE_TYPE plane_type;
446 int subsampling_x;
447 int subsampling_y;
448 struct buf_2d dst;
449 struct buf_2d pre[2];
450 ENTROPY_CONTEXT *above_context;
451 ENTROPY_CONTEXT *left_context;
452 int16_t seg_dequant[MAX_SEGMENTS][2];
453#if CONFIG_NEW_QUANT
clang-format67948d32016-09-07 22:40:40 -0700454 dequant_val_type_nuq seg_dequant_nuq[MAX_SEGMENTS][QUANT_PROFILES]
455 [COEF_BANDS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700456#endif
Urvang Joshib100db72016-10-12 16:28:56 -0700457#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700458 uint8_t *color_index_map;
Urvang Joshib100db72016-10-12 16:28:56 -0700459#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700460
461 // number of 4x4s in current block
462 uint16_t n4_w, n4_h;
463 // log2 of n4_w, n4_h
464 uint8_t n4_wl, n4_hl;
Jingning Hanc47fe6c2016-10-21 16:40:47 -0700465 // block size in pixels
466 uint8_t width, height;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700467
468#if CONFIG_AOM_QM
469 const qm_val_t *seg_iqmatrix[MAX_SEGMENTS][2][TX_SIZES];
470#endif
471 // encoder
472 const int16_t *dequant;
473#if CONFIG_NEW_QUANT
474 const dequant_val_type_nuq *dequant_val_nuq[QUANT_PROFILES];
475#endif // CONFIG_NEW_QUANT
476#if CONFIG_AOM_QM
477 const qm_val_t *seg_qmatrix[MAX_SEGMENTS][2][TX_SIZES];
478#endif
Yushin Cho77bba8d2016-11-04 16:36:56 -0700479
Yushin Cho7a428ba2017-01-12 16:28:49 -0800480#if CONFIG_PVQ || CONFIG_DAALA_DIST
Yushin Cho77bba8d2016-11-04 16:36:56 -0700481 DECLARE_ALIGNED(16, int16_t, pred[MAX_SB_SQUARE]);
482 // PVQ: forward transformed predicted image, a reference for PVQ.
483 tran_low_t *pvq_ref_coeff;
484#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700485} MACROBLOCKD_PLANE;
486
Jingning Han3468df12016-12-05 17:53:16 -0800487#define BLOCK_OFFSET(x, i) \
488 ((x) + (i) * (1 << (tx_size_wide_log2[0] + tx_size_high_log2[0])))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700489
490typedef struct RefBuffer {
491 // TODO(dkovalev): idx is not really required and should be removed, now it
Yaowu Xuf883b422016-08-30 14:01:10 -0700492 // is used in av1_onyxd_if.c
Yaowu Xuc27fc142016-08-22 16:08:15 -0700493 int idx;
494 YV12_BUFFER_CONFIG *buf;
495 struct scale_factors sf;
496} RefBuffer;
497
498typedef struct macroblockd {
499 struct macroblockd_plane plane[MAX_MB_PLANE];
500 uint8_t bmode_blocks_wl;
501 uint8_t bmode_blocks_hl;
502
503 FRAME_COUNTS *counts;
504 TileInfo tile;
505
506 int mi_stride;
507
508 MODE_INFO **mi;
509 MODE_INFO *left_mi;
510 MODE_INFO *above_mi;
511 MB_MODE_INFO *left_mbmi;
512 MB_MODE_INFO *above_mbmi;
513
514 int up_available;
515 int left_available;
516
Yaowu Xuf883b422016-08-30 14:01:10 -0700517 const aom_prob (*partition_probs)[PARTITION_TYPES - 1];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700518
519 /* Distance of MB away from frame edges */
520 int mb_to_left_edge;
521 int mb_to_right_edge;
522 int mb_to_top_edge;
523 int mb_to_bottom_edge;
524
525 FRAME_CONTEXT *fc;
526
527 /* pointers to reference frames */
Urvang Joshi52648442016-10-13 17:27:51 -0700528 const RefBuffer *block_refs[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700529
530 /* pointer to current frame */
531 const YV12_BUFFER_CONFIG *cur_buf;
532
533 ENTROPY_CONTEXT *above_context[MAX_MB_PLANE];
534 ENTROPY_CONTEXT left_context[MAX_MB_PLANE][2 * MAX_MIB_SIZE];
535
536 PARTITION_CONTEXT *above_seg_context;
537 PARTITION_CONTEXT left_seg_context[MAX_MIB_SIZE];
538
539#if CONFIG_VAR_TX
540 TXFM_CONTEXT *above_txfm_context;
541 TXFM_CONTEXT *left_txfm_context;
542 TXFM_CONTEXT left_txfm_context_buffer[MAX_MIB_SIZE];
543
544 TX_SIZE max_tx_size;
545#if CONFIG_SUPERTX
546 TX_SIZE supertx_size;
547#endif
548#endif
549
Jingning Hanff6ee6a2016-12-07 09:55:21 -0800550 // block dimension in the unit of mode_info.
Yaowu Xuc27fc142016-08-22 16:08:15 -0700551 uint8_t n8_w, n8_h;
552
553#if CONFIG_REF_MV
554 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
555 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
556 uint8_t is_sec_rect;
557#endif
558
Yushin Cho77bba8d2016-11-04 16:36:56 -0700559#if CONFIG_PVQ
560 daala_dec_ctx daala_dec;
561#endif
Thomas Daviesf77d4ad2017-01-10 18:55:42 +0000562#if CONFIG_EC_ADAPT
563 FRAME_CONTEXT *tile_ctx;
564#endif
Yaowu Xuf883b422016-08-30 14:01:10 -0700565#if CONFIG_AOM_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700566 /* Bit depth: 8, 10, 12 */
567 int bd;
568#endif
569
Debargha Mukherjee3c42c092016-09-29 09:17:36 -0700570 int qindex[MAX_SEGMENTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700571 int lossless[MAX_SEGMENTS];
572 int corrupted;
573
Yaowu Xuf883b422016-08-30 14:01:10 -0700574 struct aom_internal_error_info *error_info;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700575#if CONFIG_GLOBAL_MOTION
David Barkercf3d0b02016-11-10 10:14:49 +0000576 WarpedMotionParams *global_motion;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700577#endif // CONFIG_GLOBAL_MOTION
Arild Fuldseth07441162016-08-15 15:07:52 +0200578#if CONFIG_DELTA_Q
579 int prev_qindex;
580 int delta_qindex;
581 int current_qindex;
582#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700583} MACROBLOCKD;
584
585static INLINE BLOCK_SIZE get_subsize(BLOCK_SIZE bsize,
586 PARTITION_TYPE partition) {
587 if (partition == PARTITION_INVALID)
Urvang Joshicb586f32016-09-20 11:36:33 -0700588 return BLOCK_INVALID;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700589 else
590 return subsize_lookup[partition][bsize];
591}
592
593static const TX_TYPE intra_mode_to_tx_type_context[INTRA_MODES] = {
594 DCT_DCT, // DC
595 ADST_DCT, // V
596 DCT_ADST, // H
597 DCT_DCT, // D45
598 ADST_ADST, // D135
599 ADST_DCT, // D117
600 DCT_ADST, // D153
601 DCT_ADST, // D207
602 ADST_DCT, // D63
Urvang Joshi6be4a542016-11-03 15:24:05 -0700603#if CONFIG_ALT_INTRA
604 ADST_ADST, // SMOOTH
605#endif // CONFIG_ALT_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700606 ADST_ADST, // TM
607};
608
609#if CONFIG_SUPERTX
610static INLINE int supertx_enabled(const MB_MODE_INFO *mbmi) {
Jingning Han93531242016-12-20 11:54:36 -0800611 TX_SIZE max_tx_size = txsize_sqr_map[mbmi->tx_size];
612 return tx_size_wide[max_tx_size] >
613 AOMMIN(block_size_wide[mbmi->sb_type], block_size_high[mbmi->sb_type]);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700614}
615#endif // CONFIG_SUPERTX
616
Jingning Hanb83e64b2017-03-01 14:52:04 -0800617#define USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4 1
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800618
Sarah Parker076437f2017-03-14 17:39:53 -0700619#if CONFIG_RECT_TX
Sarah Parker076437f2017-03-14 17:39:53 -0700620static INLINE int is_rect_tx(TX_SIZE tx_size) { return tx_size >= TX_SIZES; }
621#endif // CONFIG_RECT_TX
622
Jingning Hanb83e64b2017-03-01 14:52:04 -0800623#if CONFIG_EXT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700624#define ALLOW_INTRA_EXT_TX 1
Yaowu Xuc27fc142016-08-22 16:08:15 -0700625
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800626typedef enum {
627 // DCT only
628 EXT_TX_SET_DCTONLY = 0,
629 // DCT + Identity only
630 EXT_TX_SET_DCT_IDTX = 1,
631 // Discrete Trig transforms w/o flip (4) + Identity (1)
632 EXT_TX_SET_DTT4_IDTX = 2,
633 // Discrete Trig transforms w/o flip (4) + Identity (1) + 1D Hor/vert DCT (2)
634 EXT_TX_SET_DTT4_IDTX_1DDCT = 3,
635 // Discrete Trig transforms w/ flip (9) + Identity (1) + 1D Hor/Ver DCT (2)
636 EXT_TX_SET_DTT9_IDTX_1DDCT = 4,
637 // Discrete Trig transforms w/ flip (9) + Identity (1) + 1D Hor/Ver (6)
638 EXT_TX_SET_ALL16 = 5,
639 EXT_TX_SET_TYPES
640} TxSetType;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700641
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800642// Number of transform types in each set type
643static const int num_ext_tx_set[EXT_TX_SET_TYPES] = { 1, 2, 5, 7, 12, 16 };
644
645// Maps intra set index to the set type
646static const int ext_tx_set_type_intra[EXT_TX_SETS_INTRA] = {
647 EXT_TX_SET_DCTONLY, EXT_TX_SET_DTT4_IDTX_1DDCT, EXT_TX_SET_DTT4_IDTX
648};
649
650// Maps inter set index to the set type
651static const int ext_tx_set_type_inter[EXT_TX_SETS_INTER] = {
652 EXT_TX_SET_DCTONLY, EXT_TX_SET_ALL16, EXT_TX_SET_DTT9_IDTX_1DDCT,
653 EXT_TX_SET_DCT_IDTX
654};
655
656// Maps set types above to the indices used for intra
657static const int ext_tx_set_index_intra[EXT_TX_SET_TYPES] = { 0, -1, 2,
658 1, -1, -1 };
659
660// Maps set types above to the indices used for inter
661static const int ext_tx_set_index_inter[EXT_TX_SET_TYPES] = {
662 0, 3, -1, -1, 2, 1
663};
664
665static INLINE TxSetType get_ext_tx_set_type(TX_SIZE tx_size, BLOCK_SIZE bs,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800666 int is_inter, int use_reduced_set) {
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800667 const TX_SIZE tx_size2 = txsize_sqr_up_map[tx_size];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700668 tx_size = txsize_sqr_map[tx_size];
Debargha Mukherjee094c9432017-02-22 10:31:25 -0800669#if CONFIG_CB4X4 && USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4
Jingning Han1a00cff2016-12-28 14:53:14 -0800670 (void)bs;
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800671 if (tx_size > TX_32X32) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -0800672#else
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800673 if (tx_size > TX_32X32 || bs < BLOCK_8X8) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -0800674#endif
Sarah Parker5effe3f2017-02-23 12:49:10 -0800675 if (use_reduced_set)
676 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DTT4_IDTX;
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800677 if (tx_size2 == TX_32X32)
678 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DCTONLY;
679 if (is_inter)
680 return (tx_size == TX_16X16 ? EXT_TX_SET_DTT9_IDTX_1DDCT
681 : EXT_TX_SET_ALL16);
682 else
683 return (tx_size == TX_16X16 ? EXT_TX_SET_DTT4_IDTX
684 : EXT_TX_SET_DTT4_IDTX_1DDCT);
685}
686
687static INLINE int get_ext_tx_set(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800688 int use_reduced_set) {
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800689 const TxSetType set_type =
Sarah Parker5effe3f2017-02-23 12:49:10 -0800690 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800691 return is_inter ? ext_tx_set_index_inter[set_type]
692 : ext_tx_set_index_intra[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700693}
694
clang-format55ce9e02017-02-15 22:27:12 -0800695static const int use_intra_ext_tx_for_txsize[EXT_TX_SETS_INTRA][EXT_TX_SIZES] =
696 {
Jingning Han1a00cff2016-12-28 14:53:14 -0800697#if CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800698 { 1, 1, 1, 1, 1 }, // unused
699 { 0, 1, 1, 0, 0 },
700 { 0, 0, 0, 1, 0 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800701#else
clang-format55ce9e02017-02-15 22:27:12 -0800702 { 1, 1, 1, 1 }, // unused
703 { 1, 1, 0, 0 },
704 { 0, 0, 1, 0 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800705#endif // CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800706 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700707
clang-format55ce9e02017-02-15 22:27:12 -0800708static const int use_inter_ext_tx_for_txsize[EXT_TX_SETS_INTER][EXT_TX_SIZES] =
709 {
Jingning Han1a00cff2016-12-28 14:53:14 -0800710#if CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800711 { 1, 1, 1, 1, 1 }, // unused
712 { 0, 1, 1, 0, 0 },
713 { 0, 0, 0, 1, 0 },
714 { 0, 0, 0, 0, 1 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800715#else
clang-format55ce9e02017-02-15 22:27:12 -0800716 { 1, 1, 1, 1 }, // unused
717 { 1, 1, 0, 0 },
718 { 0, 0, 1, 0 },
719 { 0, 0, 0, 1 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800720#endif // CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800721 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700722
723// Transform types used in each intra set
724static const int ext_tx_used_intra[EXT_TX_SETS_INTRA][TX_TYPES] = {
725 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
726 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0 },
727 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
728};
729
Thomas Daviesb1bedf52017-03-17 14:03:28 +0000730// Numbers of transform types used in each intra set
731static const int ext_tx_cnt_intra[EXT_TX_SETS_INTRA] = { 1, 7, 5 };
732
Yaowu Xuc27fc142016-08-22 16:08:15 -0700733// Transform types used in each inter set
734static const int ext_tx_used_inter[EXT_TX_SETS_INTER][TX_TYPES] = {
735 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
736 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
737 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
738 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
739};
740
Thomas Daviesb1bedf52017-03-17 14:03:28 +0000741// Numbers of transform types used in each inter set
742static const int ext_tx_cnt_inter[EXT_TX_SETS_INTER] = { 1, 16, 12, 2 };
743
Yaowu Xuc27fc142016-08-22 16:08:15 -0700744// 1D Transforms used in inter set, this needs to be changed if
745// ext_tx_used_inter is changed
746static const int ext_tx_used_inter_1D[EXT_TX_SETS_INTER][TX_TYPES_1D] = {
747 { 1, 0, 0, 0 }, { 1, 1, 1, 1 }, { 1, 1, 1, 1 }, { 1, 0, 0, 1 },
748};
749
Sarah Parkere68a3e42017-02-16 14:03:24 -0800750static INLINE int get_ext_tx_types(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800751 int use_reduced_set) {
752 const int set_type =
753 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800754 return num_ext_tx_set[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700755}
756
757#if CONFIG_RECT_TX
758static INLINE int is_rect_tx_allowed_bsize(BLOCK_SIZE bsize) {
759 static const char LUT[BLOCK_SIZES] = {
Jingning Hanf4e097b2017-01-20 09:23:58 -0800760#if CONFIG_CB4X4
761 0, // BLOCK_2X2
762 0, // BLOCK_2X4
763 0, // BLOCK_4X2
764#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700765 0, // BLOCK_4X4
766 1, // BLOCK_4X8
767 1, // BLOCK_8X4
768 0, // BLOCK_8X8
769 1, // BLOCK_8X16
770 1, // BLOCK_16X8
771 0, // BLOCK_16X16
772 1, // BLOCK_16X32
773 1, // BLOCK_32X16
774 0, // BLOCK_32X32
775 0, // BLOCK_32X64
776 0, // BLOCK_64X32
777 0, // BLOCK_64X64
778#if CONFIG_EXT_PARTITION
779 0, // BLOCK_64X128
780 0, // BLOCK_128X64
781 0, // BLOCK_128X128
782#endif // CONFIG_EXT_PARTITION
783 };
784
785 return LUT[bsize];
786}
787
Yue Chen49587a72016-09-28 17:09:47 -0700788static INLINE int is_rect_tx_allowed(const MACROBLOCKD *xd,
789 const MB_MODE_INFO *mbmi) {
Urvang Joshifeb925f2016-12-05 10:37:29 -0800790 return is_rect_tx_allowed_bsize(mbmi->sb_type) &&
Yue Chen49587a72016-09-28 17:09:47 -0700791 !xd->lossless[mbmi->segment_id];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700792}
Yaowu Xuc27fc142016-08-22 16:08:15 -0700793#endif // CONFIG_RECT_TX
794#endif // CONFIG_EXT_TX
795
796static INLINE TX_SIZE tx_size_from_tx_mode(BLOCK_SIZE bsize, TX_MODE tx_mode,
797 int is_inter) {
798 const TX_SIZE largest_tx_size = tx_mode_to_biggest_tx_size[tx_mode];
Debargha Mukherjee428bbb22017-03-17 07:30:24 -0700799#if (CONFIG_VAR_TX || CONFIG_EXT_TX) && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -0800800 const TX_SIZE max_rect_tx_size = max_txsize_rect_lookup[bsize];
Jingning Han70e5f3f2016-11-09 17:03:07 -0800801#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700802 const TX_SIZE max_tx_size = max_txsize_lookup[bsize];
Debargha Mukherjee428bbb22017-03-17 07:30:24 -0700803#endif // (CONFIG_VAR_TX || CONFIG_EXT_TX) && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -0800804 (void)is_inter;
Debargha Mukherjee428bbb22017-03-17 07:30:24 -0700805#if CONFIG_VAR_TX && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -0800806#if CONFIG_CB4X4
807 if (bsize == BLOCK_4X4)
808 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
809#else
810 if (bsize < BLOCK_8X8)
811 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
Jingning Han70e5f3f2016-11-09 17:03:07 -0800812#endif
Urvang Joshifeb925f2016-12-05 10:37:29 -0800813 if (txsize_sqr_map[max_rect_tx_size] <= largest_tx_size)
814 return max_rect_tx_size;
815 else
816 return largest_tx_size;
817#elif CONFIG_EXT_TX && CONFIG_RECT_TX
818 if (txsize_sqr_up_map[max_rect_tx_size] <= largest_tx_size) {
819 return max_rect_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700820 } else {
Urvang Joshifeb925f2016-12-05 10:37:29 -0800821 return largest_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700822 }
823#else
Yaowu Xuf883b422016-08-30 14:01:10 -0700824 return AOMMIN(max_tx_size, largest_tx_size);
Debargha Mukherjee428bbb22017-03-17 07:30:24 -0700825#endif // CONFIG_VAR_TX && CONFIG_RECT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700826}
827
hui su5db97432016-10-14 16:10:14 -0700828#if CONFIG_EXT_INTRA
hui su45dc5972016-12-08 17:42:50 -0800829#define MAX_ANGLE_DELTA_UV 2
830#define ANGLE_STEP_UV 4
831
832static const uint8_t av1_angle_step_y[TX_SIZES] = {
833 0, 4, 3, 3,
834};
835static const uint8_t av1_max_angle_delta_y[TX_SIZES] = {
836 0, 2, 3, 3,
837};
838
hui su5db97432016-10-14 16:10:14 -0700839extern const int16_t dr_intra_derivative[90];
840static const uint8_t mode_to_angle_map[INTRA_MODES] = {
841 0, 90, 180, 45, 135, 111, 157, 203, 67, 0,
842};
843
hui su45dc5972016-12-08 17:42:50 -0800844static INLINE int av1_get_angle_step(BLOCK_SIZE sb_type, int plane) {
845 const TX_SIZE max_tx_size = max_txsize_lookup[sb_type];
846 return plane ? ANGLE_STEP_UV : av1_angle_step_y[max_tx_size];
847}
848
849static INLINE int av1_get_max_angle_delta(BLOCK_SIZE sb_type, int plane) {
850 const TX_SIZE max_tx_size = max_txsize_lookup[sb_type];
851 return plane ? MAX_ANGLE_DELTA_UV : av1_max_angle_delta_y[max_tx_size];
852}
853
hui sueda3d762016-12-06 16:58:23 -0800854#if CONFIG_INTRA_INTERP
hui su5db97432016-10-14 16:10:14 -0700855// Returns whether filter selection is needed for a given
856// intra prediction angle.
Yaowu Xuf883b422016-08-30 14:01:10 -0700857int av1_is_intra_filter_switchable(int angle);
hui sueda3d762016-12-06 16:58:23 -0800858#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700859#endif // CONFIG_EXT_INTRA
860
861#if CONFIG_EXT_TILE
862#define FIXED_TX_TYPE 1
863#else
864#define FIXED_TX_TYPE 0
865#endif
866
867static INLINE TX_TYPE get_default_tx_type(PLANE_TYPE plane_type,
868 const MACROBLOCKD *xd, int block_idx,
869 TX_SIZE tx_size) {
870 const MB_MODE_INFO *const mbmi = &xd->mi[0]->mbmi;
871
872 if (is_inter_block(mbmi) || plane_type != PLANE_TYPE_Y ||
873 xd->lossless[mbmi->segment_id] || tx_size >= TX_32X32)
874 return DCT_DCT;
875
876 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
877 ? get_y_mode(xd->mi[0], block_idx)
878 : mbmi->uv_mode];
879}
880
881static INLINE TX_TYPE get_tx_type(PLANE_TYPE plane_type, const MACROBLOCKD *xd,
882 int block_idx, TX_SIZE tx_size) {
883 const MODE_INFO *const mi = xd->mi[0];
884 const MB_MODE_INFO *const mbmi = &mi->mbmi;
885
886 if (FIXED_TX_TYPE)
887 return get_default_tx_type(plane_type, xd, block_idx, tx_size);
888
Yaowu Xuc27fc142016-08-22 16:08:15 -0700889#if CONFIG_EXT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700890 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] > TX_32X32 ||
891 (txsize_sqr_map[tx_size] >= TX_32X32 && !is_inter_block(mbmi)))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700892 return DCT_DCT;
Jingning Han8260d8b2016-12-28 13:48:43 -0800893 if (mbmi->sb_type >= BLOCK_8X8 || CONFIG_CB4X4) {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700894 if (plane_type == PLANE_TYPE_Y) {
895#if !ALLOW_INTRA_EXT_TX
896 if (is_inter_block(mbmi))
897#endif // ALLOW_INTRA_EXT_TX
898 return mbmi->tx_type;
899 }
Jingning Han1a00cff2016-12-28 14:53:14 -0800900
901 if (is_inter_block(mbmi)) {
902// UV Inter only
903#if CONFIG_CB4X4
904 if (tx_size < TX_4X4) return DCT_DCT;
905#endif
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800906 return (mbmi->tx_type == IDTX && txsize_sqr_map[tx_size] >= TX_32X32)
Yaowu Xuc27fc142016-08-22 16:08:15 -0700907 ? DCT_DCT
908 : mbmi->tx_type;
Jingning Han1a00cff2016-12-28 14:53:14 -0800909 }
Yaowu Xuc27fc142016-08-22 16:08:15 -0700910 }
911
Jingning Han8260d8b2016-12-28 13:48:43 -0800912#if CONFIG_CB4X4
Jingning Han1a00cff2016-12-28 14:53:14 -0800913 if (tx_size < TX_4X4)
914 return DCT_DCT;
915 else
916 return intra_mode_to_tx_type_context[mbmi->uv_mode];
Jingning Han8260d8b2016-12-28 13:48:43 -0800917#endif
918
Yaowu Xuc27fc142016-08-22 16:08:15 -0700919 // Sub8x8-Inter/Intra OR UV-Intra
920 if (is_inter_block(mbmi)) // Sub8x8-Inter
921 return DCT_DCT;
922 else // Sub8x8 Intra OR UV-Intra
923 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
924 ? get_y_mode(mi, block_idx)
925 : mbmi->uv_mode];
926#else // CONFIG_EXT_TX
927 (void)block_idx;
928 if (plane_type != PLANE_TYPE_Y || xd->lossless[mbmi->segment_id] ||
929 txsize_sqr_map[tx_size] >= TX_32X32)
930 return DCT_DCT;
931 return mbmi->tx_type;
932#endif // CONFIG_EXT_TX
933}
934
Yaowu Xuf883b422016-08-30 14:01:10 -0700935void av1_setup_block_planes(MACROBLOCKD *xd, int ss_x, int ss_y);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700936
Jingning Han4e1737a2016-10-25 16:05:02 -0700937static INLINE int tx_size_to_depth(const TX_SIZE tx_size) {
938 return (int)(tx_size - TX_4X4);
939}
940
941static INLINE TX_SIZE depth_to_tx_size(const int depth) {
942 return (TX_SIZE)(depth + TX_4X4);
943}
944
Yaowu Xuc27fc142016-08-22 16:08:15 -0700945static INLINE TX_SIZE get_uv_tx_size(const MB_MODE_INFO *mbmi,
946 const struct macroblockd_plane *pd) {
Debargha Mukherjee2f123402016-08-30 17:43:38 -0700947 TX_SIZE uv_txsize;
Jingning Han93531242016-12-20 11:54:36 -0800948#if CONFIG_CB4X4
949 assert(mbmi->tx_size > TX_2X2);
950#endif
951
Yaowu Xuc27fc142016-08-22 16:08:15 -0700952#if CONFIG_SUPERTX
953 if (supertx_enabled(mbmi))
954 return uvsupertx_size_lookup[txsize_sqr_map[mbmi->tx_size]]
955 [pd->subsampling_x][pd->subsampling_y];
956#endif // CONFIG_SUPERTX
Jingning Hancabd9892016-12-01 12:28:42 -0800957
Debargha Mukherjee2f123402016-08-30 17:43:38 -0700958 uv_txsize = uv_txsize_lookup[mbmi->sb_type][mbmi->tx_size][pd->subsampling_x]
959 [pd->subsampling_y];
Jingning Han31b6a4f2017-02-23 11:05:53 -0800960#if CONFIG_CB4X4 && !CONFIG_CHROMA_2X2
Jingning Han18c53c82017-02-17 14:49:57 -0800961 uv_txsize = AOMMAX(uv_txsize, TX_4X4);
962#endif
Debargha Mukherjee2f123402016-08-30 17:43:38 -0700963 assert(uv_txsize != TX_INVALID);
964 return uv_txsize;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700965}
966
Angie Chiang7fcfee42017-02-24 15:51:03 -0800967static INLINE TX_SIZE get_tx_size(int plane, const MACROBLOCKD *xd) {
Angie Chiang80b82262017-02-24 11:39:47 -0800968 const MB_MODE_INFO *mbmi = &xd->mi[0]->mbmi;
969 const MACROBLOCKD_PLANE *pd = &xd->plane[plane];
970 const TX_SIZE tx_size = plane ? get_uv_tx_size(mbmi, pd) : mbmi->tx_size;
Angie Chiang80b82262017-02-24 11:39:47 -0800971 return tx_size;
972}
973
Yaowu Xuc27fc142016-08-22 16:08:15 -0700974static INLINE BLOCK_SIZE
975get_plane_block_size(BLOCK_SIZE bsize, const struct macroblockd_plane *pd) {
976 return ss_size_lookup[bsize][pd->subsampling_x][pd->subsampling_y];
977}
978
979static INLINE void reset_skip_context(MACROBLOCKD *xd, BLOCK_SIZE bsize) {
980 int i;
981 for (i = 0; i < MAX_MB_PLANE; i++) {
982 struct macroblockd_plane *const pd = &xd->plane[i];
983 const BLOCK_SIZE plane_bsize = get_plane_block_size(bsize, pd);
Jingning Hanb49004d2016-12-05 09:37:29 -0800984 const int txs_wide = block_size_wide[plane_bsize] >> tx_size_wide_log2[0];
985 const int txs_high = block_size_high[plane_bsize] >> tx_size_high_log2[0];
986 memset(pd->above_context, 0, sizeof(ENTROPY_CONTEXT) * txs_wide);
987 memset(pd->left_context, 0, sizeof(ENTROPY_CONTEXT) * txs_high);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700988 }
989}
990
991typedef void (*foreach_transformed_block_visitor)(int plane, int block,
992 int blk_row, int blk_col,
993 BLOCK_SIZE plane_bsize,
994 TX_SIZE tx_size, void *arg);
995
Yaowu Xuf883b422016-08-30 14:01:10 -0700996void av1_foreach_transformed_block_in_plane(
Yaowu Xuc27fc142016-08-22 16:08:15 -0700997 const MACROBLOCKD *const xd, BLOCK_SIZE bsize, int plane,
998 foreach_transformed_block_visitor visit, void *arg);
999
Angie Chiang0397eda2017-03-15 16:57:14 -07001000#if CONFIG_LV_MAP
1001void av1_foreach_transformed_block(const MACROBLOCKD *const xd,
1002 BLOCK_SIZE bsize,
1003 foreach_transformed_block_visitor visit,
1004 void *arg);
1005#endif
1006
Yushin Cho7a428ba2017-01-12 16:28:49 -08001007#if CONFIG_DAALA_DIST
1008void av1_foreach_8x8_transformed_block_in_plane(
1009 const MACROBLOCKD *const xd, BLOCK_SIZE bsize, int plane,
1010 foreach_transformed_block_visitor visit,
1011 foreach_transformed_block_visitor mi_visit, void *arg);
1012#endif
1013
iole moccagattaf25a4cf2016-11-11 23:57:57 -08001014#if CONFIG_COEF_INTERLEAVE
1015static INLINE int get_max_4x4_size(int num_4x4, int mb_to_edge,
1016 int subsampling) {
1017 return num_4x4 + (mb_to_edge >= 0 ? 0 : mb_to_edge >> (5 + subsampling));
1018}
1019
1020void av1_foreach_transformed_block_interleave(
1021 const MACROBLOCKD *const xd, BLOCK_SIZE bsize,
1022 foreach_transformed_block_visitor visit, void *arg);
1023#endif
1024
Yaowu Xuf883b422016-08-30 14:01:10 -07001025void av1_set_contexts(const MACROBLOCKD *xd, struct macroblockd_plane *pd,
Jingning Haneee43152016-12-05 09:58:45 -08001026 int plane, TX_SIZE tx_size, int has_eob, int aoff,
1027 int loff);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001028
1029#if CONFIG_EXT_INTER
1030static INLINE int is_interintra_allowed_bsize(const BLOCK_SIZE bsize) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001031#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001032 // TODO(debargha): Should this be bsize < BLOCK_LARGEST?
1033 return (bsize >= BLOCK_8X8) && (bsize < BLOCK_64X64);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001034#else
1035 (void)bsize;
1036 return 0;
1037#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001038}
1039
1040static INLINE int is_interintra_allowed_mode(const PREDICTION_MODE mode) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001041#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001042 return (mode >= NEARESTMV) && (mode <= NEWMV);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001043#else
1044 (void)mode;
1045 return 0;
1046#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001047}
1048
1049static INLINE int is_interintra_allowed_ref(const MV_REFERENCE_FRAME rf[2]) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001050#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001051 return (rf[0] > INTRA_FRAME) && (rf[1] <= INTRA_FRAME);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001052#else
1053 (void)rf;
1054 return 0;
1055#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001056}
1057
1058static INLINE int is_interintra_allowed(const MB_MODE_INFO *mbmi) {
1059 return is_interintra_allowed_bsize(mbmi->sb_type) &&
1060 is_interintra_allowed_mode(mbmi->mode) &&
1061 is_interintra_allowed_ref(mbmi->ref_frame);
1062}
1063
1064static INLINE int is_interintra_allowed_bsize_group(const int group) {
1065 int i;
1066 for (i = 0; i < BLOCK_SIZES; i++) {
Urvang Joshicb586f32016-09-20 11:36:33 -07001067 if (size_group_lookup[i] == group &&
1068 is_interintra_allowed_bsize((BLOCK_SIZE)i)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001069 return 1;
Urvang Joshicb586f32016-09-20 11:36:33 -07001070 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001071 }
1072 return 0;
1073}
1074
1075static INLINE int is_interintra_pred(const MB_MODE_INFO *mbmi) {
1076 return (mbmi->ref_frame[1] == INTRA_FRAME) && is_interintra_allowed(mbmi);
1077}
1078#endif // CONFIG_EXT_INTER
1079
Yue Chencb60b182016-10-13 15:18:22 -07001080#if CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
1081static INLINE int is_motion_variation_allowed_bsize(BLOCK_SIZE bsize) {
1082 return (bsize >= BLOCK_8X8);
1083}
1084
Yue Chen5329a2b2017-02-28 17:33:00 +08001085#if CONFIG_MOTION_VAR
Yue Chen1bd42be2017-03-15 18:07:04 -07001086// input: log2 of length, 0(4), 1(8), ...
1087static const int max_neighbor_obmc[6] = { 0, 1, 2, 3, 4, 4 };
1088
Yue Chen5329a2b2017-02-28 17:33:00 +08001089static INLINE int check_num_overlappable_neighbors(const MB_MODE_INFO *mbmi) {
Yue Chen1bd42be2017-03-15 18:07:04 -07001090 return !(mbmi->overlappable_neighbors[0] == 0 &&
1091 mbmi->overlappable_neighbors[1] == 0);
Yue Chen5329a2b2017-02-28 17:33:00 +08001092}
1093#endif
1094
Sarah Parker19234cc2017-03-10 16:43:25 -08001095static INLINE MOTION_MODE motion_mode_allowed(
1096#if CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1097 int block, const WarpedMotionParams *gm_params,
1098#endif // CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1099 const MODE_INFO *mi) {
1100 const MB_MODE_INFO *mbmi = &mi->mbmi;
1101#if CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1102 const TransformationType gm_type = gm_params[mbmi->ref_frame[0]].wmtype;
1103 if (is_global_mv_block(mi, block, gm_type)) return SIMPLE_TRANSLATION;
1104#endif // CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
Yaowu Xuc27fc142016-08-22 16:08:15 -07001105#if CONFIG_EXT_INTER
Yue Chen69f18e12016-09-08 14:48:15 -07001106 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
1107 is_inter_mode(mbmi->mode) && mbmi->ref_frame[1] != INTRA_FRAME) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001108#else
Yue Chen69f18e12016-09-08 14:48:15 -07001109 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
1110 is_inter_mode(mbmi->mode)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001111#endif // CONFIG_EXT_INTER
Yue Chen5329a2b2017-02-28 17:33:00 +08001112#if CONFIG_MOTION_VAR
1113 if (!check_num_overlappable_neighbors(mbmi)) return SIMPLE_TRANSLATION;
1114#endif
Yue Chen69f18e12016-09-08 14:48:15 -07001115#if CONFIG_WARPED_MOTION
1116 if (!has_second_ref(mbmi) && mbmi->num_proj_ref[0] >= 3)
1117 return WARPED_CAUSAL;
1118 else
1119#endif // CONFIG_WARPED_MOTION
1120#if CONFIG_MOTION_VAR
1121 return OBMC_CAUSAL;
1122#else
1123 return SIMPLE_TRANSLATION;
1124#endif // CONFIG_MOTION_VAR
1125 } else {
1126 return SIMPLE_TRANSLATION;
1127 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001128}
1129
Sarah Parker19234cc2017-03-10 16:43:25 -08001130static INLINE void assert_motion_mode_valid(MOTION_MODE mode,
1131#if CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1132 int block,
1133 const WarpedMotionParams *gm_params,
1134#endif // CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1135 const MODE_INFO *mi) {
1136 const MOTION_MODE last_motion_mode_allowed = motion_mode_allowed(
1137#if CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1138 block, gm_params,
1139#endif // CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1140 mi);
1141 // Check that the input mode is not illegal
1142 if (last_motion_mode_allowed < mode)
1143 assert(0 && "Illegal motion mode selected");
1144}
1145
Yue Chencb60b182016-10-13 15:18:22 -07001146#if CONFIG_MOTION_VAR
Yaowu Xuc27fc142016-08-22 16:08:15 -07001147static INLINE int is_neighbor_overlappable(const MB_MODE_INFO *mbmi) {
1148 return (is_inter_block(mbmi));
1149}
Yue Chencb60b182016-10-13 15:18:22 -07001150#endif // CONFIG_MOTION_VAR
1151#endif // CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
Yaowu Xuc27fc142016-08-22 16:08:15 -07001152
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001153// Returns sub-sampled dimensions of the given block.
1154// The output values for 'rows_within_bounds' and 'cols_within_bounds' will
1155// differ from 'height' and 'width' when part of the block is outside the right
1156// and/or bottom image boundary.
1157static INLINE void av1_get_block_dimensions(BLOCK_SIZE bsize, int plane,
1158 const MACROBLOCKD *xd, int *width,
1159 int *height,
1160 int *rows_within_bounds,
1161 int *cols_within_bounds) {
1162 const int block_height = block_size_high[bsize];
1163 const int block_width = block_size_wide[bsize];
1164 const int block_rows = (xd->mb_to_bottom_edge >= 0)
1165 ? block_height
1166 : (xd->mb_to_bottom_edge >> 3) + block_height;
1167 const int block_cols = (xd->mb_to_right_edge >= 0)
1168 ? block_width
1169 : (xd->mb_to_right_edge >> 3) + block_width;
1170 const struct macroblockd_plane *const pd = &xd->plane[plane];
1171 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_x == 0));
1172 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_y == 0));
1173 assert(block_width >= block_cols);
1174 assert(block_height >= block_rows);
1175 if (width) *width = block_width >> pd->subsampling_x;
1176 if (height) *height = block_height >> pd->subsampling_y;
1177 if (rows_within_bounds) *rows_within_bounds = block_rows >> pd->subsampling_y;
1178 if (cols_within_bounds) *cols_within_bounds = block_cols >> pd->subsampling_x;
1179}
1180
Yue Chen19e7aa82016-11-30 14:05:39 -08001181#if CONFIG_GLOBAL_MOTION
1182static INLINE int is_nontrans_global_motion(const MACROBLOCKD *xd) {
1183 const MODE_INFO *mi = xd->mi[0];
1184 const MB_MODE_INFO *const mbmi = &mi->mbmi;
1185 int ref;
1186#if CONFIG_CB4X4
1187 const int unify_bsize = 1;
1188#else
1189 const int unify_bsize = 0;
1190#endif
1191
1192 // First check if all modes are ZEROMV
1193 if (mbmi->sb_type >= BLOCK_8X8 || unify_bsize) {
1194#if CONFIG_EXT_INTER
1195 if (mbmi->mode != ZEROMV && mbmi->mode != ZERO_ZEROMV) return 0;
1196#else
1197 if (mbmi->mode != ZEROMV) return 0;
1198#endif // CONFIG_EXT_INTER
1199 } else {
Debargha Mukherjeefebb59c2017-03-02 12:23:45 -08001200#if !GLOBAL_SUB8X8_USED
1201 return 0;
1202#endif // !GLOBAL_SUB8X8_USED
Yue Chen19e7aa82016-11-30 14:05:39 -08001203#if CONFIG_EXT_INTER
1204 if (mi->bmi[0].as_mode != ZEROMV || mi->bmi[1].as_mode != ZEROMV ||
1205 mi->bmi[2].as_mode != ZEROMV || mi->bmi[3].as_mode != ZEROMV ||
1206 mi->bmi[0].as_mode != ZERO_ZEROMV ||
1207 mi->bmi[1].as_mode != ZERO_ZEROMV ||
1208 mi->bmi[2].as_mode != ZERO_ZEROMV || mi->bmi[3].as_mode != ZERO_ZEROMV)
1209 return 0;
1210#else
1211 if (mi->bmi[0].as_mode != ZEROMV || mi->bmi[1].as_mode != ZEROMV ||
1212 mi->bmi[2].as_mode != ZEROMV || mi->bmi[3].as_mode != ZEROMV)
1213 return 0;
1214#endif // CONFIG_EXT_INTER
1215 }
1216 // Now check if all global motion is non translational
1217 for (ref = 0; ref < 1 + has_second_ref(mbmi); ++ref) {
1218 if (xd->global_motion[mbmi->ref_frame[ref]].wmtype <= TRANSLATION) return 0;
1219 }
1220 return 1;
1221}
1222#endif // CONFIG_GLOBAL_MOTION
1223
Luc Trudeau005feb62017-02-22 13:34:01 -05001224static INLINE PLANE_TYPE get_plane_type(const int plane) {
1225 return (plane == 0) ? PLANE_TYPE_Y : PLANE_TYPE_UV;
1226}
1227
Yaowu Xuc27fc142016-08-22 16:08:15 -07001228#ifdef __cplusplus
1229} // extern "C"
1230#endif
1231
Yaowu Xuf883b422016-08-30 14:01:10 -07001232#endif // AV1_COMMON_BLOCKD_H_