blob: 08dc4bda40a7b2a4977232736137c81ca33ddb8d [file] [log] [blame]
Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_COMMON_BLOCKD_H_
13#define AV1_COMMON_BLOCKD_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
Tom Finegan60e653d2018-05-22 11:34:58 -070015#include "config/aom_config.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070016
Yaowu Xuf883b422016-08-30 14:01:10 -070017#include "aom_dsp/aom_dsp_common.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070018#include "aom_ports/mem.h"
19#include "aom_scale/yv12config.h"
20
21#include "av1/common/common_data.h"
22#include "av1/common/quant_common.h"
23#include "av1/common/entropy.h"
24#include "av1/common/entropymode.h"
25#include "av1/common/mv.h"
26#include "av1/common/scale.h"
27#include "av1/common/seg_common.h"
28#include "av1/common/tile_common.h"
Yushin Chod0b77ac2017-10-20 17:33:16 -070029
Yaowu Xuc27fc142016-08-22 16:08:15 -070030#ifdef __cplusplus
31extern "C" {
32#endif
33
Debargha Mukherjee6cf2b462018-01-12 15:53:50 -080034#define USE_B_QUANT_NO_TRELLIS 1
Debargha Mukherjee6cf2b462018-01-12 15:53:50 -080035
Yaowu Xuc27fc142016-08-22 16:08:15 -070036#define MAX_MB_PLANE 3
37
Sarah Parker5b4df2b2018-04-02 14:48:25 -070038#define MAX_DIFFWTD_MASK_BITS 1
Yaowu Xuf35f5272017-05-10 08:00:02 -070039
Sarah Parker5b4df2b2018-04-02 14:48:25 -070040// DIFFWTD_MASK_TYPES should not surpass 1 << MAX_DIFFWTD_MASK_BITS
Wan-Teh Changd0c9dcd2018-07-23 10:31:44 -070041typedef enum ATTRIBUTE_PACKED {
Sarah Parker7bb84f32017-05-09 15:17:46 -070042 DIFFWTD_38 = 0,
43 DIFFWTD_38_INV,
Sarah Parker5b4df2b2018-04-02 14:48:25 -070044 DIFFWTD_MASK_TYPES,
45} DIFFWTD_MASK_TYPE;
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080046
Wan-Teh Changd0c9dcd2018-07-23 10:31:44 -070047typedef enum ATTRIBUTE_PACKED {
Yaowu Xuc27fc142016-08-22 16:08:15 -070048 KEY_FRAME = 0,
49 INTER_FRAME = 1,
Soo-Chul Han65c00ae2017-09-07 13:12:35 -040050 INTRA_ONLY_FRAME = 2, // replaces intra-only
51 S_FRAME = 3,
Yaowu Xuc27fc142016-08-22 16:08:15 -070052 FRAME_TYPES,
53} FRAME_TYPE;
54
Debargha Mukherjee0f248c42017-09-07 12:40:18 -070055static INLINE int is_comp_ref_allowed(BLOCK_SIZE bsize) {
Debargha Mukherjee0f248c42017-09-07 12:40:18 -070056 return AOMMIN(block_size_wide[bsize], block_size_high[bsize]) >= 8;
Debargha Mukherjee0f248c42017-09-07 12:40:18 -070057}
58
Yaowu Xuc27fc142016-08-22 16:08:15 -070059static INLINE int is_inter_mode(PREDICTION_MODE mode) {
chiyotsaiccdf78f2018-07-13 16:49:51 -070060 return mode >= INTER_MODE_START && mode < INTER_MODE_END;
Yaowu Xuc27fc142016-08-22 16:08:15 -070061}
62
David Barkerac37fa32016-12-02 12:30:21 +000063typedef struct {
64 uint8_t *plane[MAX_MB_PLANE];
65 int stride[MAX_MB_PLANE];
66} BUFFER_SET;
67
Yaowu Xuc27fc142016-08-22 16:08:15 -070068static INLINE int is_inter_singleref_mode(PREDICTION_MODE mode) {
chiyotsaiccdf78f2018-07-13 16:49:51 -070069 return mode >= SINGLE_INTER_MODE_START && mode < SINGLE_INTER_MODE_END;
Yaowu Xuc27fc142016-08-22 16:08:15 -070070}
Zoe Liu85b66462017-04-20 14:28:19 -070071static INLINE int is_inter_compound_mode(PREDICTION_MODE mode) {
chiyotsaiccdf78f2018-07-13 16:49:51 -070072 return mode >= COMP_INTER_MODE_START && mode < COMP_INTER_MODE_END;
Zoe Liu85b66462017-04-20 14:28:19 -070073}
Yaowu Xuc27fc142016-08-22 16:08:15 -070074
75static INLINE PREDICTION_MODE compound_ref0_mode(PREDICTION_MODE mode) {
Urvang Joshi5a9ea002017-05-22 15:25:18 -070076 static PREDICTION_MODE lut[] = {
Urvang Joshi102245d2016-11-28 13:05:36 -080077 MB_MODE_COUNT, // DC_PRED
78 MB_MODE_COUNT, // V_PRED
79 MB_MODE_COUNT, // H_PRED
80 MB_MODE_COUNT, // D45_PRED
81 MB_MODE_COUNT, // D135_PRED
Hui Su439bcb52018-02-21 10:52:16 -080082 MB_MODE_COUNT, // D113_PRED
83 MB_MODE_COUNT, // D157_PRED
84 MB_MODE_COUNT, // D203_PRED
85 MB_MODE_COUNT, // D67_PRED
Urvang Joshi102245d2016-11-28 13:05:36 -080086 MB_MODE_COUNT, // SMOOTH_PRED
Urvang Joshi5a9ea002017-05-22 15:25:18 -070087 MB_MODE_COUNT, // SMOOTH_V_PRED
88 MB_MODE_COUNT, // SMOOTH_H_PRED
Urvang Joshi96d1c0a2017-10-10 13:15:32 -070089 MB_MODE_COUNT, // PAETH_PRED
Urvang Joshi102245d2016-11-28 13:05:36 -080090 MB_MODE_COUNT, // NEARESTMV
91 MB_MODE_COUNT, // NEARMV
Sarah Parker2b9ec2e2017-10-30 17:34:08 -070092 MB_MODE_COUNT, // GLOBALMV
Urvang Joshi102245d2016-11-28 13:05:36 -080093 MB_MODE_COUNT, // NEWMV
Sebastien Alaiwan34d55662017-11-15 09:36:03 +010094 NEARESTMV, // NEAREST_NEARESTMV
95 NEARMV, // NEAR_NEARMV
96 NEARESTMV, // NEAREST_NEWMV
97 NEWMV, // NEW_NEARESTMV
98 NEARMV, // NEAR_NEWMV
99 NEWMV, // NEW_NEARMV
100 GLOBALMV, // GLOBAL_GLOBALMV
101 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700102 };
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700103 assert(NELEMENTS(lut) == MB_MODE_COUNT);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700104 assert(is_inter_compound_mode(mode));
105 return lut[mode];
106}
107
108static INLINE PREDICTION_MODE compound_ref1_mode(PREDICTION_MODE mode) {
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700109 static PREDICTION_MODE lut[] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800110 MB_MODE_COUNT, // DC_PRED
111 MB_MODE_COUNT, // V_PRED
112 MB_MODE_COUNT, // H_PRED
113 MB_MODE_COUNT, // D45_PRED
114 MB_MODE_COUNT, // D135_PRED
Hui Su439bcb52018-02-21 10:52:16 -0800115 MB_MODE_COUNT, // D113_PRED
116 MB_MODE_COUNT, // D157_PRED
117 MB_MODE_COUNT, // D203_PRED
118 MB_MODE_COUNT, // D67_PRED
Urvang Joshi102245d2016-11-28 13:05:36 -0800119 MB_MODE_COUNT, // SMOOTH_PRED
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700120 MB_MODE_COUNT, // SMOOTH_V_PRED
121 MB_MODE_COUNT, // SMOOTH_H_PRED
Urvang Joshi96d1c0a2017-10-10 13:15:32 -0700122 MB_MODE_COUNT, // PAETH_PRED
Urvang Joshi102245d2016-11-28 13:05:36 -0800123 MB_MODE_COUNT, // NEARESTMV
124 MB_MODE_COUNT, // NEARMV
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700125 MB_MODE_COUNT, // GLOBALMV
Urvang Joshi102245d2016-11-28 13:05:36 -0800126 MB_MODE_COUNT, // NEWMV
Sebastien Alaiwan34d55662017-11-15 09:36:03 +0100127 NEARESTMV, // NEAREST_NEARESTMV
128 NEARMV, // NEAR_NEARMV
129 NEWMV, // NEAREST_NEWMV
130 NEARESTMV, // NEW_NEARESTMV
131 NEWMV, // NEAR_NEWMV
132 NEARMV, // NEW_NEARMV
133 GLOBALMV, // GLOBAL_GLOBALMV
134 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700135 };
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700136 assert(NELEMENTS(lut) == MB_MODE_COUNT);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700137 assert(is_inter_compound_mode(mode));
138 return lut[mode];
139}
140
David Barker3dfba992017-04-03 16:10:09 +0100141static INLINE int have_nearmv_in_inter_mode(PREDICTION_MODE mode) {
Debargha Mukherjeebb6e1342017-04-17 16:05:04 -0700142 return (mode == NEARMV || mode == NEAR_NEARMV || mode == NEAR_NEWMV ||
143 mode == NEW_NEARMV);
David Barker3dfba992017-04-03 16:10:09 +0100144}
145
Yaowu Xuc27fc142016-08-22 16:08:15 -0700146static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700147 return (mode == NEWMV || mode == NEW_NEWMV || mode == NEAREST_NEWMV ||
148 mode == NEW_NEARESTMV || mode == NEAR_NEWMV || mode == NEW_NEARMV);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700149}
Sarah Parker6fdc8532016-11-16 17:47:13 -0800150
Sarah Parker6fdc8532016-11-16 17:47:13 -0800151static INLINE int is_masked_compound_type(COMPOUND_TYPE type) {
Sarah Parker5b4df2b2018-04-02 14:48:25 -0700152 return (type == COMPOUND_WEDGE || type == COMPOUND_DIFFWTD);
Sarah Parker6fdc8532016-11-16 17:47:13 -0800153}
Zoe Liu85b66462017-04-20 14:28:19 -0700154
Yaowu Xuc27fc142016-08-22 16:08:15 -0700155/* For keyframes, intra block modes are predicted by the (already decoded)
156 modes for the Y blocks to the left and above us; for interframes, there
157 is a single probability table. */
158
Yaowu Xuc27fc142016-08-22 16:08:15 -0700159typedef int8_t MV_REFERENCE_FRAME;
160
161typedef struct {
162 // Number of base colors for Y (0) and UV (1)
163 uint8_t palette_size[2];
hui sufa4ff852017-05-15 12:20:50 -0700164 // Value of base colors for Y, U, and V
Yaowu Xuc27fc142016-08-22 16:08:15 -0700165 uint16_t palette_colors[3 * PALETTE_MAX_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700166} PALETTE_MODE_INFO;
167
Yaowu Xuc27fc142016-08-22 16:08:15 -0700168typedef struct {
Yue Chenb0571872017-12-18 18:12:59 -0800169 uint8_t use_filter_intra;
170 FILTER_INTRA_MODE filter_intra_mode;
hui su5db97432016-10-14 16:10:14 -0700171} FILTER_INTRA_MODE_INFO;
Yue Chen57b8ff62017-10-10 23:37:31 -0700172
173static const PREDICTION_MODE fimode_to_intradir[FILTER_INTRA_MODES] = {
Hui Su69ae7b82018-02-20 20:10:51 -0800174 DC_PRED, V_PRED, H_PRED, D157_PRED, DC_PRED
Yue Chen57b8ff62017-10-10 23:37:31 -0700175};
Yaowu Xuc27fc142016-08-22 16:08:15 -0700176
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800177#if CONFIG_RD_DEBUG
Jingning Hanf32f6782018-02-15 09:29:15 -0800178#define TXB_COEFF_COST_MAP_SIZE (MAX_MIB_SIZE)
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800179#endif
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800180
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800181typedef struct RD_STATS {
182 int rate;
183 int64_t dist;
Angie Chiang7bbd3b12017-04-26 11:06:09 -0700184 // Please be careful of using rdcost, it's not guaranteed to be set all the
185 // time.
186 // TODO(angiebird): Create a set of functions to manipulate the RD_STATS. In
187 // these functions, make sure rdcost is always up-to-date according to
188 // rate/dist.
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700189 int64_t rdcost;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800190 int64_t sse;
Angie Chiang7bbd3b12017-04-26 11:06:09 -0700191 int skip; // sse should equal to dist when skip == 1
Jingning Han3bce7542017-07-25 10:53:57 -0700192 int64_t ref_rdcost;
193 int zero_rate;
Jingning Han1a7f0a82017-07-27 09:48:05 -0700194 uint8_t invalid_rate;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800195#if CONFIG_RD_DEBUG
196 int txb_coeff_cost[MAX_MB_PLANE];
197 int txb_coeff_cost_map[MAX_MB_PLANE][TXB_COEFF_COST_MAP_SIZE]
198 [TXB_COEFF_COST_MAP_SIZE];
Angie Chiang3963d632016-11-10 18:41:40 -0800199#endif // CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800200} RD_STATS;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800201
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000202// This struct is used to group function args that are commonly
203// sent together in functions related to interinter compound modes
Sarah Parker6fdc8532016-11-16 17:47:13 -0800204typedef struct {
Sarah Parker6fdc8532016-11-16 17:47:13 -0800205 int wedge_index;
206 int wedge_sign;
Sarah Parker5b4df2b2018-04-02 14:48:25 -0700207 DIFFWTD_MASK_TYPE mask_type;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000208 uint8_t *seg_mask;
Peng Bin42b77702018-06-01 11:09:54 +0800209 COMPOUND_TYPE type;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800210} INTERINTER_COMPOUND_DATA;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800211
Hui Su7167d952018-02-01 16:33:12 -0800212#define INTER_TX_SIZE_BUF_LEN 16
Hui Sude1a5db2018-02-22 15:44:49 -0800213#define TXK_TYPE_BUF_LEN 64
Hui Su7167d952018-02-01 16:33:12 -0800214// This structure now relates to 4x4 block regions.
Luc Trudeauf5334002017-04-25 12:21:26 -0400215typedef struct MB_MODE_INFO {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700216 // Common for both INTER and INTRA blocks
217 BLOCK_SIZE sb_type;
218 PREDICTION_MODE mode;
219 TX_SIZE tx_size;
Hui Su7167d952018-02-01 16:33:12 -0800220 uint8_t inter_tx_size[INTER_TX_SIZE_BUF_LEN];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700221 int8_t skip;
Zoe Liuf704a1c2017-10-02 16:55:59 -0700222 int8_t skip_mode;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700223 int8_t segment_id;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700224 int8_t seg_id_predicted; // valid only when temporal_update is enabled
225
226 // Only for INTRA blocks
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400227 UV_PREDICTION_MODE uv_mode;
Urvang Joshic6300aa2017-06-01 14:46:23 -0700228
Yaowu Xuc27fc142016-08-22 16:08:15 -0700229 PALETTE_MODE_INFO palette_mode_info;
Alex Converse28744302017-04-13 14:46:22 -0700230 uint8_t use_intrabc;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700231
Rupert Swarbrick27e90292017-09-28 17:46:50 +0100232 // Only for INTER blocks
233 InterpFilters interp_filters;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700234 MV_REFERENCE_FRAME ref_frame[2];
Hui Su56393b32018-02-27 10:34:27 -0800235
Hui Sude1a5db2018-02-22 15:44:49 -0800236 TX_TYPE txk_type[TXK_TYPE_BUF_LEN];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700237
hui su5db97432016-10-14 16:10:14 -0700238 FILTER_INTRA_MODE_INFO filter_intra_mode_info;
Yue Chen69d9aef2018-02-26 17:49:59 -0800239
hui sueda3d762016-12-06 16:58:23 -0800240 // The actual prediction angle is the base angle + (angle_delta * step).
Luc Trudeau7bb3a4f2018-02-12 09:59:21 -0500241 int8_t angle_delta[PLANE_TYPES];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700242
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000243 // interintra members
Yaowu Xuc27fc142016-08-22 16:08:15 -0700244 INTERINTRA_MODE interintra_mode;
245 // TODO(debargha): Consolidate these flags
246 int use_wedge_interintra;
247 int interintra_wedge_index;
248 int interintra_wedge_sign;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000249 // interinter members
Peng Bin42b77702018-06-01 11:09:54 +0800250 INTERINTER_COMPOUND_DATA interinter_comp;
Yue Chencb60b182016-10-13 15:18:22 -0700251 MOTION_MODE motion_mode;
Yue Chen5329a2b2017-02-28 17:33:00 +0800252 int overlappable_neighbors[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700253 int_mv mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700254 uint8_t ref_mv_idx;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700255 PARTITION_TYPE partition;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700256 /* deringing gain *per-superblock* */
Jean-Marc Valin5f5c1322017-03-21 16:20:21 -0400257 int8_t cdef_strength;
Wan-Teh Chang413f5ef2018-06-05 17:36:03 -0700258 int current_qindex;
259 int delta_lf_from_base;
260 int delta_lf[FRAME_LF_COUNT];
Angie Chiangd4022822016-11-02 18:30:25 -0700261#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800262 RD_STATS rd_stats;
Angie Chiangd4022822016-11-02 18:30:25 -0700263 int mi_row;
264 int mi_col;
265#endif
Peng Bina2bad5a2018-07-26 16:04:30 +0800266 int num_proj_ref;
267 WarpedMotionParams wm_params;
Ryan Lei9b02b0e2017-01-30 15:52:20 -0800268
Luc Trudeauf5334002017-04-25 12:21:26 -0400269 // Index of the alpha Cb and alpha Cr combination
Luc Trudeaua9bd85f2017-05-11 14:37:56 -0400270 int cfl_alpha_idx;
David Michael Barrf6eaa152017-07-19 19:42:28 +0900271 // Joint sign of alpha Cb and alpha Cr
272 int cfl_alpha_signs;
Luc Trudeauf5334002017-04-25 12:21:26 -0400273
Cheng Chenca6958c2017-10-10 14:00:50 -0700274 int compound_idx;
Cheng Chen33a13d92017-11-28 16:49:59 -0800275 int comp_group_idx;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700276} MB_MODE_INFO;
277
Alex Converse28744302017-04-13 14:46:22 -0700278static INLINE int is_intrabc_block(const MB_MODE_INFO *mbmi) {
279 return mbmi->use_intrabc;
280}
Alex Converse28744302017-04-13 14:46:22 -0700281
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400282static INLINE PREDICTION_MODE get_uv_mode(UV_PREDICTION_MODE mode) {
Luc Trudeau5d5078e2017-12-13 16:43:16 -0500283 assert(mode < UV_INTRA_MODES);
Luc Trudeau2f052ee2018-01-16 14:43:06 -0500284 static const PREDICTION_MODE uv2y[] = {
Urvang Joshib7301cd2017-11-09 15:08:56 -0800285 DC_PRED, // UV_DC_PRED
286 V_PRED, // UV_V_PRED
287 H_PRED, // UV_H_PRED
288 D45_PRED, // UV_D45_PRED
289 D135_PRED, // UV_D135_PRED
Hui Su69ae7b82018-02-20 20:10:51 -0800290 D113_PRED, // UV_D113_PRED
291 D157_PRED, // UV_D157_PRED
292 D203_PRED, // UV_D203_PRED
293 D67_PRED, // UV_D67_PRED
Urvang Joshib7301cd2017-11-09 15:08:56 -0800294 SMOOTH_PRED, // UV_SMOOTH_PRED
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400295 SMOOTH_V_PRED, // UV_SMOOTH_V_PRED
296 SMOOTH_H_PRED, // UV_SMOOTH_H_PRED
Urvang Joshi96d1c0a2017-10-10 13:15:32 -0700297 PAETH_PRED, // UV_PAETH_PRED
Luc Trudeau2f052ee2018-01-16 14:43:06 -0500298 DC_PRED, // UV_CFL_PRED
299 INTRA_INVALID, // UV_INTRA_MODES
300 INTRA_INVALID, // UV_MODE_INVALID
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400301 };
302 return uv2y[mode];
303}
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400304
Yaowu Xuc27fc142016-08-22 16:08:15 -0700305static INLINE int is_inter_block(const MB_MODE_INFO *mbmi) {
Hui Su293f2812018-02-26 14:41:18 -0800306 return is_intrabc_block(mbmi) || mbmi->ref_frame[0] > INTRA_FRAME;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700307}
308
309static INLINE int has_second_ref(const MB_MODE_INFO *mbmi) {
310 return mbmi->ref_frame[1] > INTRA_FRAME;
311}
312
Zoe Liuc082bbc2017-05-17 13:31:37 -0700313static INLINE int has_uni_comp_refs(const MB_MODE_INFO *mbmi) {
314 return has_second_ref(mbmi) && (!((mbmi->ref_frame[0] >= BWDREF_FRAME) ^
315 (mbmi->ref_frame[1] >= BWDREF_FRAME)));
316}
317
318static INLINE MV_REFERENCE_FRAME comp_ref0(int ref_idx) {
319 static const MV_REFERENCE_FRAME lut[] = {
Zoe Liu057f97b2018-01-24 13:45:25 -0800320 LAST_FRAME, // LAST_LAST2_FRAMES,
321 LAST_FRAME, // LAST_LAST3_FRAMES,
322 LAST_FRAME, // LAST_GOLDEN_FRAMES,
323 BWDREF_FRAME, // BWDREF_ALTREF_FRAMES,
324 LAST2_FRAME, // LAST2_LAST3_FRAMES
325 LAST2_FRAME, // LAST2_GOLDEN_FRAMES,
326 LAST3_FRAME, // LAST3_GOLDEN_FRAMES,
327 BWDREF_FRAME, // BWDREF_ALTREF2_FRAMES,
328 ALTREF2_FRAME, // ALTREF2_ALTREF_FRAMES,
Zoe Liuc082bbc2017-05-17 13:31:37 -0700329 };
Zoe Liu057f97b2018-01-24 13:45:25 -0800330 assert(NELEMENTS(lut) == TOTAL_UNIDIR_COMP_REFS);
Zoe Liuc082bbc2017-05-17 13:31:37 -0700331 return lut[ref_idx];
332}
333
334static INLINE MV_REFERENCE_FRAME comp_ref1(int ref_idx) {
335 static const MV_REFERENCE_FRAME lut[] = {
Zoe Liu057f97b2018-01-24 13:45:25 -0800336 LAST2_FRAME, // LAST_LAST2_FRAMES,
337 LAST3_FRAME, // LAST_LAST3_FRAMES,
338 GOLDEN_FRAME, // LAST_GOLDEN_FRAMES,
339 ALTREF_FRAME, // BWDREF_ALTREF_FRAMES,
340 LAST3_FRAME, // LAST2_LAST3_FRAMES
341 GOLDEN_FRAME, // LAST2_GOLDEN_FRAMES,
342 GOLDEN_FRAME, // LAST3_GOLDEN_FRAMES,
343 ALTREF2_FRAME, // BWDREF_ALTREF2_FRAMES,
344 ALTREF_FRAME, // ALTREF2_ALTREF_FRAMES,
Zoe Liuc082bbc2017-05-17 13:31:37 -0700345 };
Zoe Liu057f97b2018-01-24 13:45:25 -0800346 assert(NELEMENTS(lut) == TOTAL_UNIDIR_COMP_REFS);
Zoe Liuc082bbc2017-05-17 13:31:37 -0700347 return lut[ref_idx];
348}
Zoe Liuc082bbc2017-05-17 13:31:37 -0700349
Yue Chen53b53f02018-03-29 14:31:23 -0700350PREDICTION_MODE av1_left_block_mode(const MB_MODE_INFO *left_mi);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700351
Yue Chen53b53f02018-03-29 14:31:23 -0700352PREDICTION_MODE av1_above_block_mode(const MB_MODE_INFO *above_mi);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700353
Yue Chen53b53f02018-03-29 14:31:23 -0700354static INLINE int is_global_mv_block(const MB_MODE_INFO *const mbmi,
Sarah Parker19234cc2017-03-10 16:43:25 -0800355 TransformationType type) {
Luc Trudeau2eb9b842017-12-13 11:19:16 -0500356 const PREDICTION_MODE mode = mbmi->mode;
Luc Trudeau2eb9b842017-12-13 11:19:16 -0500357 const BLOCK_SIZE bsize = mbmi->sb_type;
Debargha Mukherjeec17a4432017-08-28 22:22:45 -0700358 const int block_size_allowed =
359 AOMMIN(block_size_wide[bsize], block_size_high[bsize]) >= 8;
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700360 return (mode == GLOBALMV || mode == GLOBAL_GLOBALMV) && type > TRANSLATION &&
Sarah Parker19234cc2017-03-10 16:43:25 -0800361 block_size_allowed;
Sarah Parker19234cc2017-03-10 16:43:25 -0800362}
Sarah Parker19234cc2017-03-10 16:43:25 -0800363
Angie Chiang5b5f4df2017-12-06 10:41:12 -0800364#if CONFIG_MISMATCH_DEBUG
365static INLINE void mi_to_pixel_loc(int *pixel_c, int *pixel_r, int mi_col,
366 int mi_row, int tx_blk_col, int tx_blk_row,
367 int subsampling_x, int subsampling_y) {
368 *pixel_c = ((mi_col >> subsampling_x) << MI_SIZE_LOG2) +
369 (tx_blk_col << tx_size_wide_log2[0]);
370 *pixel_r = ((mi_row >> subsampling_y) << MI_SIZE_LOG2) +
371 (tx_blk_row << tx_size_high_log2[0]);
372}
373#endif
374
Wan-Teh Changd0c9dcd2018-07-23 10:31:44 -0700375enum ATTRIBUTE_PACKED mv_precision { MV_PRECISION_Q3, MV_PRECISION_Q4 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700376
377struct buf_2d {
378 uint8_t *buf;
379 uint8_t *buf0;
380 int width;
381 int height;
382 int stride;
383};
384
Deepa K G610c9b82018-06-19 12:47:01 +0530385typedef struct eob_info {
386 uint16_t eob;
387 uint16_t max_scan_line;
388} eob_info;
389
390typedef struct {
391 DECLARE_ALIGNED(32, tran_low_t, dqcoeff[MAX_MB_PLANE][MAX_SB_SQUARE]);
392 eob_info eob_data[MAX_MB_PLANE]
393 [MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
Deepa K G99f7ddb2018-06-20 11:21:21 +0530394 DECLARE_ALIGNED(16, uint8_t, color_index_map[2][MAX_SB_SQUARE]);
Deepa K G610c9b82018-06-19 12:47:01 +0530395} CB_BUFFER;
396
Yaowu Xuc27fc142016-08-22 16:08:15 -0700397typedef struct macroblockd_plane {
398 tran_low_t *dqcoeff;
Deepa K G610c9b82018-06-19 12:47:01 +0530399 tran_low_t *dqcoeff_block;
400 eob_info *eob_data;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700401 PLANE_TYPE plane_type;
402 int subsampling_x;
403 int subsampling_y;
404 struct buf_2d dst;
405 struct buf_2d pre[2];
406 ENTROPY_CONTEXT *above_context;
407 ENTROPY_CONTEXT *left_context;
Monty Montgomery125c0fc2017-10-26 00:44:35 -0400408
409 // The dequantizers below are true dequntizers used only in the
410 // dequantization process. They have the same coefficient
411 // shift/scale as TX.
412 int16_t seg_dequant_QTX[MAX_SEGMENTS][2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700413 uint8_t *color_index_map;
414
Jingning Hanc47fe6c2016-10-21 16:40:47 -0700415 // block size in pixels
416 uint8_t width, height;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700417
Thomas Daviesdd3cf832017-10-20 15:49:57 +0100418 qm_val_t *seg_iqmatrix[MAX_SEGMENTS][TX_SIZES_ALL];
419 qm_val_t *seg_qmatrix[MAX_SEGMENTS][TX_SIZES_ALL];
Monty Montgomery125c0fc2017-10-26 00:44:35 -0400420
421 // the 'dequantizers' below are not literal dequantizer values.
422 // They're used by encoder RDO to generate ad-hoc lambda values.
423 // They use a hardwired Q3 coeff shift and do not necessarily match
424 // the TX scale in use.
425 const int16_t *dequant_Q3;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700426} MACROBLOCKD_PLANE;
427
Jingning Han3468df12016-12-05 17:53:16 -0800428#define BLOCK_OFFSET(x, i) \
429 ((x) + (i) * (1 << (tx_size_wide_log2[0] + tx_size_high_log2[0])))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700430
431typedef struct RefBuffer {
Yaowu Xu0eb6b6c2018-03-28 12:44:57 -0700432 int idx; // frame buf idx
Zoe Liub57fee02018-02-15 17:41:41 -0800433 int map_idx; // frame map idx
Yaowu Xuc27fc142016-08-22 16:08:15 -0700434 YV12_BUFFER_CONFIG *buf;
435 struct scale_factors sf;
436} RefBuffer;
437
Rupert Swarbrick6c545212017-09-01 17:17:25 +0100438typedef struct {
439 DECLARE_ALIGNED(16, InterpKernel, vfilter);
440 DECLARE_ALIGNED(16, InterpKernel, hfilter);
441} WienerInfo;
442
443typedef struct {
444 int ep;
445 int xqd[2];
446} SgrprojInfo;
Rupert Swarbrick6c545212017-09-01 17:17:25 +0100447
Hui Su9fa96232017-10-23 15:46:04 -0700448#if CONFIG_DEBUG
Luc Trudeau03b7e7d2017-09-19 13:20:52 -0400449#define CFL_SUB8X8_VAL_MI_SIZE (4)
450#define CFL_SUB8X8_VAL_MI_SQUARE \
451 (CFL_SUB8X8_VAL_MI_SIZE * CFL_SUB8X8_VAL_MI_SIZE)
Hui Su9fa96232017-10-23 15:46:04 -0700452#endif // CONFIG_DEBUG
Luc Trudeaue425f472017-12-08 14:48:46 -0500453#define CFL_MAX_BLOCK_SIZE (BLOCK_32X32)
Luc Trudeau467205a2017-12-12 23:23:47 -0500454#define CFL_BUF_LINE (32)
Luc Trudeau365f73b2017-12-23 00:07:29 -0500455#define CFL_BUF_LINE_I128 (CFL_BUF_LINE >> 3)
456#define CFL_BUF_LINE_I256 (CFL_BUF_LINE >> 4)
Luc Trudeau467205a2017-12-12 23:23:47 -0500457#define CFL_BUF_SQUARE (CFL_BUF_LINE * CFL_BUF_LINE)
David Michael Barr5b2021e2017-08-17 18:12:39 +0900458typedef struct cfl_ctx {
Luc Trudeau8a192112018-05-09 22:38:28 -0400459 // Q3 reconstructed luma pixels (only Q2 is required, but Q3 is used to avoid
460 // shifts)
Luc Trudeau1f431172018-05-10 11:37:23 -0400461 uint16_t recon_buf_q3[CFL_BUF_SQUARE];
Luc Trudeau8a192112018-05-09 22:38:28 -0400462 // Q3 AC contributions (reconstructed luma pixels - tx block avg)
463 int16_t ac_buf_q3[CFL_BUF_SQUARE];
Luc Trudeau467205a2017-12-12 23:23:47 -0500464
465 // Cache the DC_PRED when performing RDO, so it does not have to be recomputed
466 // for every scaling parameter
467 int dc_pred_is_cached[CFL_PRED_PLANES];
468 // The DC_PRED cache is disable when decoding
469 int use_dc_pred_cache;
470 // Only cache the first row of the DC_PRED
471 int16_t dc_pred_cache[CFL_PRED_PLANES][CFL_BUF_LINE];
David Michael Barr5b2021e2017-08-17 18:12:39 +0900472
Luc Trudeau4e26d662017-09-11 13:08:40 -0400473 // Height and width currently used in the CfL prediction buffer.
474 int buf_height, buf_width;
David Michael Barr5b2021e2017-08-17 18:12:39 +0900475
David Michael Barr5b2021e2017-08-17 18:12:39 +0900476 int are_parameters_computed;
477
478 // Chroma subsampling
479 int subsampling_x, subsampling_y;
480
David Michael Barr5b2021e2017-08-17 18:12:39 +0900481 int mi_row, mi_col;
482
483 // Whether the reconstructed luma pixels need to be stored
484 int store_y;
485
David Michael Barr1f8d0952017-10-11 17:46:39 +0900486#if CONFIG_DEBUG
487 int rate;
488#endif // CONFIG_DEBUG
489
David Michael Barr5b2021e2017-08-17 18:12:39 +0900490 int is_chroma_reference;
David Michael Barr5b2021e2017-08-17 18:12:39 +0900491} CFL_CTX;
David Michael Barr5b2021e2017-08-17 18:12:39 +0900492
Cheng Chenf78632e2017-10-20 15:30:51 -0700493typedef struct jnt_comp_params {
Cheng Chen8263f802017-11-14 15:50:00 -0800494 int use_jnt_comp_avg;
Cheng Chenf78632e2017-10-20 15:30:51 -0700495 int fwd_offset;
496 int bck_offset;
497} JNT_COMP_PARAMS;
Cheng Chenf78632e2017-10-20 15:30:51 -0700498
Yaowu Xuc27fc142016-08-22 16:08:15 -0700499typedef struct macroblockd {
500 struct macroblockd_plane plane[MAX_MB_PLANE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700501
Yaowu Xuc27fc142016-08-22 16:08:15 -0700502 TileInfo tile;
503
504 int mi_stride;
505
Yue Chen53b53f02018-03-29 14:31:23 -0700506 MB_MODE_INFO **mi;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700507 MB_MODE_INFO *left_mbmi;
508 MB_MODE_INFO *above_mbmi;
David Barkerd3afdb92018-02-14 15:45:58 +0000509 MB_MODE_INFO *chroma_left_mbmi;
510 MB_MODE_INFO *chroma_above_mbmi;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700511
512 int up_available;
513 int left_available;
Jingning Han3da18d62017-05-02 12:43:58 -0700514 int chroma_up_available;
515 int chroma_left_available;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700516
Rupert Swarbrick57486c52017-08-14 10:53:49 +0100517 /* Distance of MB away from frame edges in subpixels (1/8th pixel) */
Yaowu Xuc27fc142016-08-22 16:08:15 -0700518 int mb_to_left_edge;
519 int mb_to_right_edge;
520 int mb_to_top_edge;
521 int mb_to_bottom_edge;
522
Yaowu Xuc27fc142016-08-22 16:08:15 -0700523 /* pointers to reference frames */
Urvang Joshi52648442016-10-13 17:27:51 -0700524 const RefBuffer *block_refs[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700525
526 /* pointer to current frame */
527 const YV12_BUFFER_CONFIG *cur_buf;
528
529 ENTROPY_CONTEXT *above_context[MAX_MB_PLANE];
Wan-Teh Chang733de9b2018-05-02 16:36:19 -0700530 ENTROPY_CONTEXT left_context[MAX_MB_PLANE][MAX_MIB_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700531
532 PARTITION_CONTEXT *above_seg_context;
533 PARTITION_CONTEXT left_seg_context[MAX_MIB_SIZE];
534
Yaowu Xuc27fc142016-08-22 16:08:15 -0700535 TXFM_CONTEXT *above_txfm_context;
536 TXFM_CONTEXT *left_txfm_context;
Wan-Teh Chang733de9b2018-05-02 16:36:19 -0700537 TXFM_CONTEXT left_txfm_context_buffer[MAX_MIB_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700538
Rupert Swarbrick6c545212017-09-01 17:17:25 +0100539 WienerInfo wiener_info[MAX_MB_PLANE];
540 SgrprojInfo sgrproj_info[MAX_MB_PLANE];
Rupert Swarbrick6c545212017-09-01 17:17:25 +0100541
Jingning Hanff6ee6a2016-12-07 09:55:21 -0800542 // block dimension in the unit of mode_info.
Yaowu Xuc27fc142016-08-22 16:08:15 -0700543 uint8_t n8_w, n8_h;
544
Yaowu Xuc27fc142016-08-22 16:08:15 -0700545 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
546 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
547 uint8_t is_sec_rect;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700548
Zoe Liufa8bad12018-01-23 14:32:31 -0800549 // Counts of each reference frame in the above and left neighboring blocks.
550 // NOTE: Take into account both single and comp references.
Zoe Liu27deb382018-03-27 15:13:56 -0700551 uint8_t neighbors_ref_counts[REF_FRAMES];
Zoe Liufa8bad12018-01-23 14:32:31 -0800552
Thomas Daviesf77d4ad2017-01-10 18:55:42 +0000553 FRAME_CONTEXT *tile_ctx;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700554 /* Bit depth: 8, 10, 12 */
555 int bd;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700556
Debargha Mukherjee3c42c092016-09-29 09:17:36 -0700557 int qindex[MAX_SEGMENTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700558 int lossless[MAX_SEGMENTS];
559 int corrupted;
RogerZhou10a03802017-10-26 11:49:48 -0700560 int cur_frame_force_integer_mv;
Yaowu Xu45295c32018-03-29 12:06:10 -0700561 // same with that in AV1_COMMON
Yaowu Xuf883b422016-08-30 14:01:10 -0700562 struct aom_internal_error_info *error_info;
Luc Trudeauf3bf8b12017-12-08 14:38:41 -0500563 const WarpedMotionParams *global_motion;
Arild Fuldseth07441162016-08-15 15:07:52 +0200564 int delta_qindex;
565 int current_qindex;
Fangwen Fu231fe422017-04-24 17:52:29 -0700566 // Since actual frame level loop filtering level value is not available
567 // at the beginning of the tile (only available during actual filtering)
568 // at encoder side.we record the delta_lf (against the frame level loop
569 // filtering level) and code the delta between previous superblock's delta
570 // lf and current delta lf. It is equivalent to the delta between previous
571 // superblock's actual lf and current lf.
Wan-Teh Chang413f5ef2018-06-05 17:36:03 -0700572 int delta_lf_from_base;
Cheng Chena97394f2017-09-27 15:05:14 -0700573 // For this experiment, we have four frame filter levels for different plane
574 // and direction. So, to support the per superblock update, we need to add
575 // a few more params as below.
576 // 0: delta loop filter level for y plane vertical
577 // 1: delta loop filter level for y plane horizontal
578 // 2: delta loop filter level for u plane
579 // 3: delta loop filter level for v plane
580 // To make it consistent with the reference to each filter level in segment,
581 // we need to -1, since
582 // SEG_LVL_ALT_LF_Y_V = 1;
583 // SEG_LVL_ALT_LF_Y_H = 2;
584 // SEG_LVL_ALT_LF_U = 3;
585 // SEG_LVL_ALT_LF_V = 4;
Wan-Teh Chang413f5ef2018-06-05 17:36:03 -0700586 int delta_lf[FRAME_LF_COUNT];
Cherma Rajan A35610232018-04-18 18:19:12 +0530587 int cdef_preset[4];
Luc Trudeauf8164152017-04-11 16:20:51 -0400588
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000589 DECLARE_ALIGNED(16, uint8_t, seg_mask[2 * MAX_SB_SQUARE]);
Ravi Chaudhary4e7b6f02018-06-08 19:36:56 +0530590 uint8_t *mc_buf[2];
Luc Trudeau1e84af52017-11-25 15:00:28 -0500591 CFL_CTX cfl;
Cheng Chenf78632e2017-10-20 15:30:51 -0700592
Cheng Chenf78632e2017-10-20 15:30:51 -0700593 JNT_COMP_PARAMS jcp_param;
Deepa K G610c9b82018-06-19 12:47:01 +0530594
595 uint16_t cb_offset[MAX_MB_PLANE];
596 uint16_t txb_offset[MAX_MB_PLANE];
Deepa K G99f7ddb2018-06-20 11:21:21 +0530597 uint16_t color_index_map_offset[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700598} MACROBLOCKD;
599
Yi Luo51281092017-06-26 16:36:15 -0700600static INLINE int get_bitdepth_data_path_index(const MACROBLOCKD *xd) {
601 return xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH ? 1 : 0;
602}
603
Peng Bin9ccfcd62018-06-21 11:10:11 +0800604static INLINE uint8_t *get_buf_by_bd(const MACROBLOCKD *xd, uint8_t *buf16) {
605 return (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH)
606 ? CONVERT_TO_BYTEPTR(buf16)
607 : buf16;
608}
609
Cheng Chen82b4fa12018-05-02 18:43:17 -0700610static INLINE int get_sqr_bsize_idx(BLOCK_SIZE bsize) {
611 switch (bsize) {
612 case BLOCK_4X4: return 0;
613 case BLOCK_8X8: return 1;
614 case BLOCK_16X16: return 2;
615 case BLOCK_32X32: return 3;
616 case BLOCK_64X64: return 4;
617 case BLOCK_128X128: return 5;
618 default: return SQR_BLOCK_SIZES;
619 }
620}
621
Wan-Teh Chang3a539222018-08-03 12:33:28 -0700622// For a square block size 'bsize', returns the size of the sub-blocks used by
623// the given partition type. If the partition produces sub-blocks of different
624// sizes, then the function returns the largest sub-block size.
625// Implements the Partition_Subsize lookup table in the spec (Section 9.3.
626// Conversion tables).
Cheng Chen82b4fa12018-05-02 18:43:17 -0700627// Note: the input block size should be square.
628// Otherwise it's considered invalid.
629static INLINE BLOCK_SIZE get_partition_subsize(BLOCK_SIZE bsize,
630 PARTITION_TYPE partition) {
631 if (partition == PARTITION_INVALID) {
Urvang Joshicb586f32016-09-20 11:36:33 -0700632 return BLOCK_INVALID;
Cheng Chen82b4fa12018-05-02 18:43:17 -0700633 } else {
634 const int sqr_bsize_idx = get_sqr_bsize_idx(bsize);
635 return sqr_bsize_idx >= SQR_BLOCK_SIZES
636 ? BLOCK_INVALID
637 : subsize_lookup[partition][sqr_bsize_idx];
638 }
Yaowu Xuc27fc142016-08-22 16:08:15 -0700639}
640
Luc Trudeau6e691312018-04-11 13:03:16 -0400641static TX_TYPE intra_mode_to_tx_type(const MB_MODE_INFO *mbmi,
642 PLANE_TYPE plane_type) {
643 static const TX_TYPE _intra_mode_to_tx_type[INTRA_MODES] = {
Luc Trudeau9cea9932017-12-13 21:14:13 -0500644 DCT_DCT, // DC
645 ADST_DCT, // V
646 DCT_ADST, // H
647 DCT_DCT, // D45
648 ADST_ADST, // D135
649 ADST_DCT, // D117
650 DCT_ADST, // D153
651 DCT_ADST, // D207
652 ADST_DCT, // D63
653 ADST_ADST, // SMOOTH
654 ADST_DCT, // SMOOTH_V
655 DCT_ADST, // SMOOTH_H
656 ADST_ADST, // PAETH
657 };
Luc Trudeau6e691312018-04-11 13:03:16 -0400658 const PREDICTION_MODE mode =
659 (plane_type == PLANE_TYPE_Y) ? mbmi->mode : get_uv_mode(mbmi->uv_mode);
660 assert(mode < INTRA_MODES);
661 return _intra_mode_to_tx_type[mode];
Luc Trudeau9cea9932017-12-13 21:14:13 -0500662}
Yaowu Xuc27fc142016-08-22 16:08:15 -0700663
Sarah Parker076437f2017-03-14 17:39:53 -0700664static INLINE int is_rect_tx(TX_SIZE tx_size) { return tx_size >= TX_SIZES; }
Sarah Parker076437f2017-03-14 17:39:53 -0700665
Rupert Swarbrickfcff0b22017-10-05 09:26:04 +0100666static INLINE int block_signals_txsize(BLOCK_SIZE bsize) {
Rupert Swarbrickfcff0b22017-10-05 09:26:04 +0100667 return bsize > BLOCK_4X4;
Rupert Swarbrickfcff0b22017-10-05 09:26:04 +0100668}
669
Hui Suddbcde22017-09-18 17:22:02 -0700670// Number of transform types in each set type
671static const int av1_num_ext_tx_set[EXT_TX_SET_TYPES] = {
Hui Su2254c362018-04-10 11:22:38 -0700672 1, 2, 5, 7, 12, 16,
Hui Suddbcde22017-09-18 17:22:02 -0700673};
674
Hui Suddbcde22017-09-18 17:22:02 -0700675static const int av1_ext_tx_used[EXT_TX_SET_TYPES][TX_TYPES] = {
Johann6b41d4d2018-02-08 14:32:53 -0800676 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
677 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
678 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
679 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0 },
Johann6b41d4d2018-02-08 14:32:53 -0800680 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
681 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800682};
683
Peng Bin6b312ac2018-07-12 11:27:58 +0800684static const uint16_t av1_ext_tx_used_flag[EXT_TX_SET_TYPES] = {
685 0x0001, // 0000 0000 0000 0001
686 0x0201, // 0000 0010 0000 0001
687 0x020F, // 0000 0010 0000 1111
688 0x0E0F, // 0000 1110 0000 1111
689 0x0FFF, // 0000 1111 1111 1111
690 0xFFFF, // 1111 1111 1111 1111
691};
692
Hui Su2254c362018-04-10 11:22:38 -0700693static INLINE TxSetType av1_get_ext_tx_set_type(TX_SIZE tx_size, int is_inter,
694 int use_reduced_set) {
Yue Chen56e226e2017-05-02 16:21:40 -0700695 const TX_SIZE tx_size_sqr_up = txsize_sqr_up_map[tx_size];
Debargha Mukherjee570423c2017-10-01 00:35:20 -0700696 if (tx_size_sqr_up > TX_32X32) return EXT_TX_SET_DCTONLY;
Yue Chen56e226e2017-05-02 16:21:40 -0700697 if (tx_size_sqr_up == TX_32X32)
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800698 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DCTONLY;
Sarah Parkerc7fa12c2018-01-29 14:48:46 -0800699 if (use_reduced_set)
700 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DTT4_IDTX;
Hui Su2254c362018-04-10 11:22:38 -0700701 const TX_SIZE tx_size_sqr = txsize_sqr_map[tx_size];
Hui Su3e509e32018-01-29 11:42:46 -0800702 if (is_inter) {
703 return (tx_size_sqr == TX_16X16 ? EXT_TX_SET_DTT9_IDTX_1DDCT
Sarah Parkercec7ba12017-11-03 16:46:09 -0700704 : EXT_TX_SET_ALL16);
Hui Su3e509e32018-01-29 11:42:46 -0800705 } else {
706 return (tx_size_sqr == TX_16X16 ? EXT_TX_SET_DTT4_IDTX
Yue Chen56e226e2017-05-02 16:21:40 -0700707 : EXT_TX_SET_DTT4_IDTX_1DDCT);
Hui Su3e509e32018-01-29 11:42:46 -0800708 }
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800709}
710
Hui Su4a9be2a2017-09-19 14:41:49 -0700711// Maps tx set types to the indices.
712static const int ext_tx_set_index[2][EXT_TX_SET_TYPES] = {
Johann6b41d4d2018-02-08 14:32:53 -0800713 { // Intra
Hui Su2254c362018-04-10 11:22:38 -0700714 0, -1, 2, 1, -1, -1 },
Johann6b41d4d2018-02-08 14:32:53 -0800715 { // Inter
Hui Su2254c362018-04-10 11:22:38 -0700716 0, 3, -1, -1, 2, 1 },
Hui Su4a9be2a2017-09-19 14:41:49 -0700717};
718
Jingning Han47eb2322018-03-19 16:33:48 -0700719static INLINE int get_ext_tx_set(TX_SIZE tx_size, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800720 int use_reduced_set) {
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800721 const TxSetType set_type =
Hui Su2254c362018-04-10 11:22:38 -0700722 av1_get_ext_tx_set_type(tx_size, is_inter, use_reduced_set);
Hui Su4a9be2a2017-09-19 14:41:49 -0700723 return ext_tx_set_index[is_inter][set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700724}
725
Jingning Hana689cab2018-03-19 16:40:42 -0700726static INLINE int get_ext_tx_types(TX_SIZE tx_size, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800727 int use_reduced_set) {
Hui Su2254c362018-04-10 11:22:38 -0700728 const int set_type =
729 av1_get_ext_tx_set_type(tx_size, is_inter, use_reduced_set);
Hui Suddbcde22017-09-18 17:22:02 -0700730 return av1_num_ext_tx_set[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700731}
732
Debargha Mukherjee3ebb0d02017-12-14 05:05:18 -0800733#define TXSIZEMAX(t1, t2) (tx_size_2d[(t1)] >= tx_size_2d[(t2)] ? (t1) : (t2))
734#define TXSIZEMIN(t1, t2) (tx_size_2d[(t1)] <= tx_size_2d[(t2)] ? (t1) : (t2))
735
Yaowu Xu25ff26a2018-02-26 11:20:10 -0800736static INLINE TX_SIZE tx_size_from_tx_mode(BLOCK_SIZE bsize, TX_MODE tx_mode) {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700737 const TX_SIZE largest_tx_size = tx_mode_to_biggest_tx_size[tx_mode];
Urvang Joshidd0376f2018-05-02 16:37:25 -0700738 const TX_SIZE max_rect_tx_size = max_txsize_rect_lookup[bsize];
Urvang Joshifeb925f2016-12-05 10:37:29 -0800739 if (bsize == BLOCK_4X4)
740 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
Urvang Joshifeb925f2016-12-05 10:37:29 -0800741 if (txsize_sqr_map[max_rect_tx_size] <= largest_tx_size)
742 return max_rect_tx_size;
743 else
744 return largest_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700745}
746
hui su5db97432016-10-14 16:10:14 -0700747extern const int16_t dr_intra_derivative[90];
hui su02c79742017-05-16 17:19:04 -0700748static const uint8_t mode_to_angle_map[] = {
Urvang Joshib7301cd2017-11-09 15:08:56 -0800749 0, 90, 180, 45, 135, 113, 157, 203, 67, 0, 0, 0, 0,
hui su5db97432016-10-14 16:10:14 -0700750};
Yaowu Xuc27fc142016-08-22 16:08:15 -0700751
Angie Chiang752ccce2017-04-09 13:41:13 -0700752// Converts block_index for given transform size to index of the block in raster
753// order.
754static INLINE int av1_block_index_to_raster_order(TX_SIZE tx_size,
755 int block_idx) {
756 // For transform size 4x8, the possible block_idx values are 0 & 2, because
757 // block_idx values are incremented in steps of size 'tx_width_unit x
758 // tx_height_unit'. But, for this transform size, block_idx = 2 corresponds to
759 // block number 1 in raster order, inside an 8x8 MI block.
760 // For any other transform size, the two indices are equivalent.
761 return (tx_size == TX_4X8 && block_idx == 2) ? 1 : block_idx;
762}
763
764// Inverse of above function.
765// Note: only implemented for transform sizes 4x4, 4x8 and 8x4 right now.
766static INLINE int av1_raster_order_to_block_index(TX_SIZE tx_size,
767 int raster_order) {
768 assert(tx_size == TX_4X4 || tx_size == TX_4X8 || tx_size == TX_8X4);
769 // We ensure that block indices are 0 & 2 if tx size is 4x8 or 8x4.
770 return (tx_size == TX_4X4) ? raster_order : (raster_order > 0) ? 2 : 0;
771}
772
Yaowu Xuc27fc142016-08-22 16:08:15 -0700773static INLINE TX_TYPE get_default_tx_type(PLANE_TYPE plane_type,
Luc Trudeau2eb9b842017-12-13 11:19:16 -0500774 const MACROBLOCKD *xd,
Yaowu Xuc27fc142016-08-22 16:08:15 -0700775 TX_SIZE tx_size) {
Yue Chen53b53f02018-03-29 14:31:23 -0700776 const MB_MODE_INFO *const mbmi = xd->mi[0];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700777
Hui Su7448fc22018-01-11 16:47:45 -0800778 if (is_inter_block(mbmi) || plane_type != PLANE_TYPE_Y ||
Yaowu Xuc27fc142016-08-22 16:08:15 -0700779 xd->lossless[mbmi->segment_id] || tx_size >= TX_32X32)
780 return DCT_DCT;
781
Luc Trudeau6e691312018-04-11 13:03:16 -0400782 return intra_mode_to_tx_type(mbmi, plane_type);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700783}
784
Wan-Teh Chang3a539222018-08-03 12:33:28 -0700785// Implements the get_plane_residual_size() function in the spec (Section
786// 5.11.38. Get plane residual size function).
Cheng Chen8ab1f442018-04-27 18:01:52 -0700787static INLINE BLOCK_SIZE get_plane_block_size(BLOCK_SIZE bsize,
788 int subsampling_x,
789 int subsampling_y) {
Cheng Chen82b4fa12018-05-02 18:43:17 -0700790 if (bsize == BLOCK_INVALID) return BLOCK_INVALID;
Cheng Chen8ab1f442018-04-27 18:01:52 -0700791 return ss_size_lookup[bsize][subsampling_x][subsampling_y];
Sarah Parker90024e42017-10-06 16:50:47 -0700792}
793
Hui Su7167d952018-02-01 16:33:12 -0800794static INLINE int av1_get_txb_size_index(BLOCK_SIZE bsize, int blk_row,
795 int blk_col) {
Jingning Hand26fde22018-02-21 09:24:37 -0800796 TX_SIZE txs = max_txsize_rect_lookup[bsize];
Hui Su7167d952018-02-01 16:33:12 -0800797 for (int level = 0; level < MAX_VARTX_DEPTH - 1; ++level)
Frederic Barbier4b56b102018-03-30 16:09:34 +0200798 txs = sub_tx_size_map[txs];
Hui Suc7645d52018-03-21 15:51:50 -0700799 const int tx_w_log2 = tx_size_wide_log2[txs] - MI_SIZE_LOG2;
800 const int tx_h_log2 = tx_size_high_log2[txs] - MI_SIZE_LOG2;
Hui Su07baee92018-03-21 19:40:17 -0700801 const int bw_log2 = mi_size_wide_log2[bsize];
Hui Suc7645d52018-03-21 15:51:50 -0700802 const int stride_log2 = bw_log2 - tx_w_log2;
803 const int index =
804 ((blk_row >> tx_h_log2) << stride_log2) + (blk_col >> tx_w_log2);
Hui Su7167d952018-02-01 16:33:12 -0800805 assert(index < INTER_TX_SIZE_BUF_LEN);
806 return index;
807}
808
Hui Sude1a5db2018-02-22 15:44:49 -0800809static INLINE int av1_get_txk_type_index(BLOCK_SIZE bsize, int blk_row,
810 int blk_col) {
811 TX_SIZE txs = max_txsize_rect_lookup[bsize];
812 for (int level = 0; level < MAX_VARTX_DEPTH; ++level)
Frederic Barbier4b56b102018-03-30 16:09:34 +0200813 txs = sub_tx_size_map[txs];
Peng Bin26103922018-03-15 21:04:58 +0800814 const int tx_w_log2 = tx_size_wide_log2[txs] - MI_SIZE_LOG2;
815 const int tx_h_log2 = tx_size_high_log2[txs] - MI_SIZE_LOG2;
Hui Su07baee92018-03-21 19:40:17 -0700816 const int bw_uint_log2 = mi_size_wide_log2[bsize];
Peng Bin26103922018-03-15 21:04:58 +0800817 const int stride_log2 = bw_uint_log2 - tx_w_log2;
818 const int index =
819 ((blk_row >> tx_h_log2) << stride_log2) + (blk_col >> tx_w_log2);
Hui Sude1a5db2018-02-22 15:44:49 -0800820 assert(index < TXK_TYPE_BUF_LEN);
821 return index;
822}
Hui Sude1a5db2018-02-22 15:44:49 -0800823
Jingning Han4f4922a2018-02-28 21:39:00 -0800824static INLINE void update_txk_array(TX_TYPE *txk_type, BLOCK_SIZE bsize,
825 int blk_row, int blk_col, TX_SIZE tx_size,
826 TX_TYPE tx_type) {
827 const int txk_type_idx = av1_get_txk_type_index(bsize, blk_row, blk_col);
828 txk_type[txk_type_idx] = tx_type;
829
830 const int txw = tx_size_wide_unit[tx_size];
831 const int txh = tx_size_high_unit[tx_size];
832 // The 16x16 unit is due to the constraint from tx_64x64 which sets the
833 // maximum tx size for chroma as 32x32. Coupled with 4x1 transform block
834 // size, the constraint takes effect in 32x16 / 16x32 size too. To solve
835 // the intricacy, cover all the 16x16 units inside a 64 level transform.
836 if (txw == tx_size_wide_unit[TX_64X64] ||
837 txh == tx_size_high_unit[TX_64X64]) {
838 const int tx_unit = tx_size_wide_unit[TX_16X16];
839 for (int idy = 0; idy < txh; idy += tx_unit) {
840 for (int idx = 0; idx < txw; idx += tx_unit) {
841 const int this_index =
842 av1_get_txk_type_index(bsize, blk_row + idy, blk_col + idx);
843 txk_type[this_index] = tx_type;
844 }
845 }
846 }
847}
848
hui su45b64752017-07-12 16:54:35 -0700849static INLINE TX_TYPE av1_get_tx_type(PLANE_TYPE plane_type,
Jingning Han19b5c8f2017-07-06 15:10:12 -0700850 const MACROBLOCKD *xd, int blk_row,
Sarah Parker7c71cc02018-01-29 12:27:58 -0800851 int blk_col, TX_SIZE tx_size,
852 int reduced_tx_set) {
Yue Chen53b53f02018-03-29 14:31:23 -0700853 const MB_MODE_INFO *const mbmi = xd->mi[0];
Sarah Parker90024e42017-10-06 16:50:47 -0700854 const struct macroblockd_plane *const pd = &xd->plane[plane_type];
Jingning Hane2ceec12018-03-19 16:27:55 -0700855 const TxSetType tx_set_type =
Hui Su2254c362018-04-10 11:22:38 -0700856 av1_get_ext_tx_set_type(tx_size, is_inter_block(mbmi), reduced_tx_set);
Sarah Parker90024e42017-10-06 16:50:47 -0700857
hui su45b64752017-07-12 16:54:35 -0700858 TX_TYPE tx_type;
Thomas Daedeaf73d532018-01-30 14:21:32 -0800859 if (xd->lossless[mbmi->segment_id] || txsize_sqr_up_map[tx_size] > TX_32X32) {
hui su45b64752017-07-12 16:54:35 -0700860 tx_type = DCT_DCT;
861 } else {
Angie Chiangbce07f12017-12-01 16:34:31 -0800862 if (plane_type == PLANE_TYPE_Y) {
Hui Sude1a5db2018-02-22 15:44:49 -0800863 const int txk_type_idx =
864 av1_get_txk_type_index(mbmi->sb_type, blk_row, blk_col);
865 tx_type = mbmi->txk_type[txk_type_idx];
Angie Chiangbce07f12017-12-01 16:34:31 -0800866 } else if (is_inter_block(mbmi)) {
867 // scale back to y plane's coordinate
868 blk_row <<= pd->subsampling_y;
869 blk_col <<= pd->subsampling_x;
Hui Sude1a5db2018-02-22 15:44:49 -0800870 const int txk_type_idx =
871 av1_get_txk_type_index(mbmi->sb_type, blk_row, blk_col);
872 tx_type = mbmi->txk_type[txk_type_idx];
Angie Chiangbce07f12017-12-01 16:34:31 -0800873 } else {
874 // In intra mode, uv planes don't share the same prediction mode as y
875 // plane, so the tx_type should not be shared
Debargha Mukherjeec8c0fbc2018-05-22 19:01:33 +0000876 tx_type = intra_mode_to_tx_type(mbmi, PLANE_TYPE_UV);
Angie Chiangbce07f12017-12-01 16:34:31 -0800877 }
hui su45b64752017-07-12 16:54:35 -0700878 }
Angie Chiang840c66e2017-12-11 16:43:38 -0800879 assert(tx_type < TX_TYPES);
Angie Chiang2ac18682017-12-01 18:02:59 -0800880 if (!av1_ext_tx_used[tx_set_type][tx_type]) return DCT_DCT;
hui su45b64752017-07-12 16:54:35 -0700881 return tx_type;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700882}
883
Imdad Sardharwallaaf8e2642018-01-19 11:46:34 +0000884void av1_setup_block_planes(MACROBLOCKD *xd, int ss_x, int ss_y,
885 const int num_planes);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700886
Frederic Barbier4b56b102018-03-30 16:09:34 +0200887static INLINE int bsize_to_max_depth(BLOCK_SIZE bsize) {
Urvang Joshidd0376f2018-05-02 16:37:25 -0700888 TX_SIZE tx_size = max_txsize_rect_lookup[bsize];
Debargha Mukherjee0fa057f2017-12-06 17:06:29 -0800889 int depth = 0;
890 while (depth < MAX_TX_DEPTH && tx_size != TX_4X4) {
891 depth++;
Frederic Barbier4b56b102018-03-30 16:09:34 +0200892 tx_size = sub_tx_size_map[tx_size];
Debargha Mukherjee0fa057f2017-12-06 17:06:29 -0800893 }
894 return depth;
Jingning Han4e1737a2016-10-25 16:05:02 -0700895}
896
Frederic Barbier4b56b102018-03-30 16:09:34 +0200897static INLINE int bsize_to_tx_size_cat(BLOCK_SIZE bsize) {
Urvang Joshidd0376f2018-05-02 16:37:25 -0700898 TX_SIZE tx_size = max_txsize_rect_lookup[bsize];
Debargha Mukherjeee4e18fc2017-12-06 23:43:24 -0800899 assert(tx_size != TX_4X4);
900 int depth = 0;
901 while (tx_size != TX_4X4) {
902 depth++;
Frederic Barbier4b56b102018-03-30 16:09:34 +0200903 tx_size = sub_tx_size_map[tx_size];
Debargha Mukherjeee4e18fc2017-12-06 23:43:24 -0800904 assert(depth < 10);
905 }
906 assert(depth <= MAX_TX_CATS);
907 return depth - 1;
908}
909
Frederic Barbier4b56b102018-03-30 16:09:34 +0200910static INLINE TX_SIZE depth_to_tx_size(int depth, BLOCK_SIZE bsize) {
Urvang Joshidd0376f2018-05-02 16:37:25 -0700911 TX_SIZE max_tx_size = max_txsize_rect_lookup[bsize];
Debargha Mukherjee0fa057f2017-12-06 17:06:29 -0800912 TX_SIZE tx_size = max_tx_size;
Frederic Barbier4b56b102018-03-30 16:09:34 +0200913 for (int d = 0; d < depth; ++d) tx_size = sub_tx_size_map[tx_size];
Debargha Mukherjee0fa057f2017-12-06 17:06:29 -0800914 return tx_size;
Jingning Han4e1737a2016-10-25 16:05:02 -0700915}
916
Urvang Joshi82ebc9c2018-05-02 17:20:45 -0700917static INLINE TX_SIZE av1_get_adjusted_tx_size(TX_SIZE tx_size) {
918 switch (tx_size) {
Debargha Mukherjee80592c72017-12-16 08:23:34 -0800919 case TX_64X64:
920 case TX_64X32:
921 case TX_32X64: return TX_32X32;
922 case TX_64X16: return TX_32X16;
923 case TX_16X64: return TX_16X32;
Urvang Joshi82ebc9c2018-05-02 17:20:45 -0700924 default: return tx_size;
Luc Trudeaud1941f32017-11-22 14:17:21 -0500925 }
Urvang Joshi82ebc9c2018-05-02 17:20:45 -0700926}
927
Cheng Chen8ab1f442018-04-27 18:01:52 -0700928static INLINE TX_SIZE av1_get_max_uv_txsize(BLOCK_SIZE bsize, int subsampling_x,
929 int subsampling_y) {
930 const BLOCK_SIZE plane_bsize =
931 get_plane_block_size(bsize, subsampling_x, subsampling_y);
Urvang Joshi82ebc9c2018-05-02 17:20:45 -0700932 assert(plane_bsize < BLOCK_SIZES_ALL);
933 const TX_SIZE uv_tx = max_txsize_rect_lookup[plane_bsize];
934 return av1_get_adjusted_tx_size(uv_tx);
Debargha Mukherjee80592c72017-12-16 08:23:34 -0800935}
936
hui su0c6244b2017-07-12 17:11:43 -0700937static INLINE TX_SIZE av1_get_tx_size(int plane, const MACROBLOCKD *xd) {
Yue Chen53b53f02018-03-29 14:31:23 -0700938 const MB_MODE_INFO *mbmi = xd->mi[0];
Debargha Mukherjee80592c72017-12-16 08:23:34 -0800939 if (xd->lossless[mbmi->segment_id]) return TX_4X4;
hui su0c6244b2017-07-12 17:11:43 -0700940 if (plane == 0) return mbmi->tx_size;
Angie Chiang80b82262017-02-24 11:39:47 -0800941 const MACROBLOCKD_PLANE *pd = &xd->plane[plane];
Cheng Chen8ab1f442018-04-27 18:01:52 -0700942 return av1_get_max_uv_txsize(mbmi->sb_type, pd->subsampling_x,
943 pd->subsampling_y);
Angie Chiang80b82262017-02-24 11:39:47 -0800944}
945
Timothy B. Terriberrya2d5cde2017-05-10 18:33:50 -0700946void av1_reset_skip_context(MACROBLOCKD *xd, int mi_row, int mi_col,
Imdad Sardharwallaaf8e2642018-01-19 11:46:34 +0000947 BLOCK_SIZE bsize, const int num_planes);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700948
Wan-Teh Chang69ac7eb2018-06-08 09:41:37 -0700949void av1_reset_loop_filter_delta(MACROBLOCKD *xd, int num_planes);
950
Imdad Sardharwallaaf8e2642018-01-19 11:46:34 +0000951void av1_reset_loop_restoration(MACROBLOCKD *xd, const int num_planes);
Rupert Swarbrick76405202017-11-07 16:35:55 +0000952
Yaowu Xuc27fc142016-08-22 16:08:15 -0700953typedef void (*foreach_transformed_block_visitor)(int plane, int block,
954 int blk_row, int blk_col,
955 BLOCK_SIZE plane_bsize,
956 TX_SIZE tx_size, void *arg);
957
Yaowu Xuf883b422016-08-30 14:01:10 -0700958void av1_set_contexts(const MACROBLOCKD *xd, struct macroblockd_plane *pd,
Hui Sue674dec2018-04-02 13:02:08 -0700959 int plane, BLOCK_SIZE plane_bsize, TX_SIZE tx_size,
960 int has_eob, int aoff, int loff);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700961
Yue Chenb8aa3992017-12-13 15:27:52 -0800962#define MAX_INTERINTRA_SB_SQUARE 32 * 32
Yue Chen73335fa2017-12-20 23:33:41 -0800963static INLINE int is_interintra_mode(const MB_MODE_INFO *mbmi) {
964 return (mbmi->ref_frame[0] > INTRA_FRAME &&
965 mbmi->ref_frame[1] == INTRA_FRAME);
966}
967
Yaowu Xuc27fc142016-08-22 16:08:15 -0700968static INLINE int is_interintra_allowed_bsize(const BLOCK_SIZE bsize) {
Yue Chen9ddd4092017-10-30 16:13:39 -0700969 return (bsize >= BLOCK_8X8) && (bsize <= BLOCK_32X32);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700970}
971
972static INLINE int is_interintra_allowed_mode(const PREDICTION_MODE mode) {
chiyotsaiccdf78f2018-07-13 16:49:51 -0700973 return (mode >= SINGLE_INTER_MODE_START) && (mode < SINGLE_INTER_MODE_END);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700974}
975
976static INLINE int is_interintra_allowed_ref(const MV_REFERENCE_FRAME rf[2]) {
977 return (rf[0] > INTRA_FRAME) && (rf[1] <= INTRA_FRAME);
978}
979
980static INLINE int is_interintra_allowed(const MB_MODE_INFO *mbmi) {
981 return is_interintra_allowed_bsize(mbmi->sb_type) &&
982 is_interintra_allowed_mode(mbmi->mode) &&
983 is_interintra_allowed_ref(mbmi->ref_frame);
984}
985
Yaowu Xu4ff59b52017-04-24 12:41:56 -0700986static INLINE int is_interintra_allowed_bsize_group(int group) {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700987 int i;
Rupert Swarbrick93c39e92017-07-12 11:11:02 +0100988 for (i = 0; i < BLOCK_SIZES_ALL; i++) {
Urvang Joshicb586f32016-09-20 11:36:33 -0700989 if (size_group_lookup[i] == group &&
990 is_interintra_allowed_bsize((BLOCK_SIZE)i)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700991 return 1;
Urvang Joshicb586f32016-09-20 11:36:33 -0700992 }
Yaowu Xuc27fc142016-08-22 16:08:15 -0700993 }
994 return 0;
995}
996
997static INLINE int is_interintra_pred(const MB_MODE_INFO *mbmi) {
Yue Chenb8aa3992017-12-13 15:27:52 -0800998 return mbmi->ref_frame[0] > INTRA_FRAME &&
999 mbmi->ref_frame[1] == INTRA_FRAME && is_interintra_allowed(mbmi);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001000}
Yaowu Xuc27fc142016-08-22 16:08:15 -07001001
Debargha Mukherjee891a8772017-11-22 10:09:37 -08001002static INLINE int get_vartx_max_txsize(const MACROBLOCKD *xd, BLOCK_SIZE bsize,
Urvang Joshi49c57d62018-05-03 11:37:38 -07001003 int plane) {
Urvang Joshi5eab6e72018-05-03 11:19:04 -07001004 if (xd->lossless[xd->mi[0]->segment_id]) return TX_4X4;
1005 const TX_SIZE max_txsize = max_txsize_rect_lookup[bsize];
Urvang Joshi49c57d62018-05-03 11:37:38 -07001006 if (plane == 0) return max_txsize; // luma
1007 return av1_get_adjusted_tx_size(max_txsize); // chroma
Sarah Parker106b3cb2017-04-21 12:13:37 -07001008}
Sarah Parker106b3cb2017-04-21 12:13:37 -07001009
Yue Chencb60b182016-10-13 15:18:22 -07001010static INLINE int is_motion_variation_allowed_bsize(BLOCK_SIZE bsize) {
Debargha Mukherjeec17a4432017-08-28 22:22:45 -07001011 return AOMMIN(block_size_wide[bsize], block_size_high[bsize]) >= 8;
Yue Chencb60b182016-10-13 15:18:22 -07001012}
1013
Yue Chen8636da62017-04-03 01:23:44 -07001014static INLINE int is_motion_variation_allowed_compound(
1015 const MB_MODE_INFO *mbmi) {
1016 if (!has_second_ref(mbmi))
1017 return 1;
1018 else
1019 return 0;
1020}
1021
Yue Chen1bd42be2017-03-15 18:07:04 -07001022// input: log2 of length, 0(4), 1(8), ...
1023static const int max_neighbor_obmc[6] = { 0, 1, 2, 3, 4, 4 };
1024
Yue Chen5329a2b2017-02-28 17:33:00 +08001025static INLINE int check_num_overlappable_neighbors(const MB_MODE_INFO *mbmi) {
Yue Chen1bd42be2017-03-15 18:07:04 -07001026 return !(mbmi->overlappable_neighbors[0] == 0 &&
1027 mbmi->overlappable_neighbors[1] == 0);
Yue Chen5329a2b2017-02-28 17:33:00 +08001028}
Yue Chen5329a2b2017-02-28 17:33:00 +08001029
Sebastien Alaiwan48795802017-10-30 12:07:13 +01001030static INLINE MOTION_MODE
Luc Trudeau2eb9b842017-12-13 11:19:16 -05001031motion_mode_allowed(const WarpedMotionParams *gm_params, const MACROBLOCKD *xd,
Yue Chen53b53f02018-03-29 14:31:23 -07001032 const MB_MODE_INFO *mbmi, int allow_warped_motion) {
RogerZhou10a03802017-10-26 11:49:48 -07001033 if (xd->cur_frame_force_integer_mv == 0) {
RogerZhou3b635242017-09-19 10:06:46 -07001034 const TransformationType gm_type = gm_params[mbmi->ref_frame[0]].wmtype;
Yue Chen53b53f02018-03-29 14:31:23 -07001035 if (is_global_mv_block(mbmi, gm_type)) return SIMPLE_TRANSLATION;
RogerZhou3b635242017-09-19 10:06:46 -07001036 }
Yue Chen69f18e12016-09-08 14:48:15 -07001037 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
Yue Chen8636da62017-04-03 01:23:44 -07001038 is_inter_mode(mbmi->mode) && mbmi->ref_frame[1] != INTRA_FRAME &&
1039 is_motion_variation_allowed_compound(mbmi)) {
Yue Chen5329a2b2017-02-28 17:33:00 +08001040 if (!check_num_overlappable_neighbors(mbmi)) return SIMPLE_TRANSLATION;
Zoe Liu70539b12017-12-02 19:03:36 -08001041 assert(!has_second_ref(mbmi));
Peng Bina2bad5a2018-07-26 16:04:30 +08001042 if (mbmi->num_proj_ref >= 1 &&
Debargha Mukherjee07a7c1f2018-03-21 17:39:13 -07001043 (allow_warped_motion && !av1_is_scaled(&(xd->block_refs[0]->sf)))) {
RogerZhou10a03802017-10-26 11:49:48 -07001044 if (xd->cur_frame_force_integer_mv) {
RogerZhou3b635242017-09-19 10:06:46 -07001045 return OBMC_CAUSAL;
1046 }
Yue Chen69f18e12016-09-08 14:48:15 -07001047 return WARPED_CAUSAL;
Hui Su12231bd2017-09-07 18:01:15 -07001048 }
Yue Chen80daf0c2017-11-02 17:14:18 -07001049 return OBMC_CAUSAL;
Yue Chen69f18e12016-09-08 14:48:15 -07001050 } else {
1051 return SIMPLE_TRANSLATION;
1052 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001053}
1054
Luc Trudeau2eb9b842017-12-13 11:19:16 -05001055static INLINE void assert_motion_mode_valid(MOTION_MODE mode,
Sarah Parker19234cc2017-03-10 16:43:25 -08001056 const WarpedMotionParams *gm_params,
Yue Chen52c51732017-07-11 15:08:30 -07001057 const MACROBLOCKD *xd,
Yue Chen53b53f02018-03-29 14:31:23 -07001058 const MB_MODE_INFO *mbmi,
Debargha Mukherjee07a7c1f2018-03-21 17:39:13 -07001059 int allow_warped_motion) {
Sebastien Alaiwan48795802017-10-30 12:07:13 +01001060 const MOTION_MODE last_motion_mode_allowed =
Yue Chen53b53f02018-03-29 14:31:23 -07001061 motion_mode_allowed(gm_params, xd, mbmi, allow_warped_motion);
Wei-Ting Lin20885282017-08-28 17:18:18 -07001062
Sarah Parker19234cc2017-03-10 16:43:25 -08001063 // Check that the input mode is not illegal
1064 if (last_motion_mode_allowed < mode)
1065 assert(0 && "Illegal motion mode selected");
1066}
1067
Yaowu Xuc27fc142016-08-22 16:08:15 -07001068static INLINE int is_neighbor_overlappable(const MB_MODE_INFO *mbmi) {
1069 return (is_inter_block(mbmi));
1070}
Yaowu Xuc27fc142016-08-22 16:08:15 -07001071
Hui Sue87fb232017-10-05 15:00:15 -07001072static INLINE int av1_allow_palette(int allow_screen_content_tools,
1073 BLOCK_SIZE sb_type) {
Hui Su8b618f62017-12-20 12:03:35 -08001074 return allow_screen_content_tools && block_size_wide[sb_type] <= 64 &&
Hui Su0f9dafb2018-02-09 17:20:29 -08001075 block_size_high[sb_type] <= 64 && sb_type >= BLOCK_8X8;
Hui Sue87fb232017-10-05 15:00:15 -07001076}
1077
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001078// Returns sub-sampled dimensions of the given block.
1079// The output values for 'rows_within_bounds' and 'cols_within_bounds' will
RogerZhou3b635242017-09-19 10:06:46 -07001080// differ from 'height' and 'width' when part of the block is outside the
1081// right
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001082// and/or bottom image boundary.
1083static INLINE void av1_get_block_dimensions(BLOCK_SIZE bsize, int plane,
1084 const MACROBLOCKD *xd, int *width,
1085 int *height,
1086 int *rows_within_bounds,
1087 int *cols_within_bounds) {
1088 const int block_height = block_size_high[bsize];
1089 const int block_width = block_size_wide[bsize];
1090 const int block_rows = (xd->mb_to_bottom_edge >= 0)
1091 ? block_height
1092 : (xd->mb_to_bottom_edge >> 3) + block_height;
1093 const int block_cols = (xd->mb_to_right_edge >= 0)
1094 ? block_width
1095 : (xd->mb_to_right_edge >> 3) + block_width;
1096 const struct macroblockd_plane *const pd = &xd->plane[plane];
1097 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_x == 0));
1098 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_y == 0));
1099 assert(block_width >= block_cols);
1100 assert(block_height >= block_rows);
Hui Su8b618f62017-12-20 12:03:35 -08001101 const int plane_block_width = block_width >> pd->subsampling_x;
1102 const int plane_block_height = block_height >> pd->subsampling_y;
1103 // Special handling for chroma sub8x8.
1104 const int is_chroma_sub8_x = plane > 0 && plane_block_width < 4;
1105 const int is_chroma_sub8_y = plane > 0 && plane_block_height < 4;
1106 if (width) *width = plane_block_width + 2 * is_chroma_sub8_x;
1107 if (height) *height = plane_block_height + 2 * is_chroma_sub8_y;
1108 if (rows_within_bounds) {
1109 *rows_within_bounds =
1110 (block_rows >> pd->subsampling_y) + 2 * is_chroma_sub8_y;
1111 }
1112 if (cols_within_bounds) {
1113 *cols_within_bounds =
1114 (block_cols >> pd->subsampling_x) + 2 * is_chroma_sub8_x;
1115 }
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001116}
1117
Sarah Parkerefd8af22017-08-25 16:36:06 -07001118/* clang-format off */
1119typedef aom_cdf_prob (*MapCdf)[PALETTE_COLOR_INDEX_CONTEXTS]
1120 [CDF_SIZE(PALETTE_COLORS)];
1121typedef const int (*ColorCost)[PALETTE_SIZES][PALETTE_COLOR_INDEX_CONTEXTS]
1122 [PALETTE_COLORS];
1123/* clang-format on */
1124
1125typedef struct {
1126 int rows;
1127 int cols;
1128 int n_colors;
1129 int plane_width;
1130 int plane_height;
1131 uint8_t *color_map;
1132 MapCdf map_cdf;
1133 ColorCost color_cost;
1134} Av1ColorMapParam;
1135
Debargha Mukherjee05653872018-04-26 15:31:27 -07001136static INLINE int is_nontrans_global_motion(const MACROBLOCKD *xd,
1137 const MB_MODE_INFO *mbmi) {
Yue Chen19e7aa82016-11-30 14:05:39 -08001138 int ref;
Yue Chen19e7aa82016-11-30 14:05:39 -08001139
Sarah Parker2b9ec2e2017-10-30 17:34:08 -07001140 // First check if all modes are GLOBALMV
1141 if (mbmi->mode != GLOBALMV && mbmi->mode != GLOBAL_GLOBALMV) return 0;
Jingning Han3ca0e672017-04-14 19:48:05 -07001142
Debargha Mukherjee98ec4592018-04-26 09:39:50 -07001143 if (AOMMIN(mi_size_wide[mbmi->sb_type], mi_size_high[mbmi->sb_type]) < 2)
Jingning Han19d05212017-12-22 12:09:49 -08001144 return 0;
Jingning Han3ca0e672017-04-14 19:48:05 -07001145
Yue Chen19e7aa82016-11-30 14:05:39 -08001146 // Now check if all global motion is non translational
1147 for (ref = 0; ref < 1 + has_second_ref(mbmi); ++ref) {
Debargha Mukherjee05653872018-04-26 15:31:27 -07001148 if (xd->global_motion[mbmi->ref_frame[ref]].wmtype == TRANSLATION) return 0;
Yue Chen19e7aa82016-11-30 14:05:39 -08001149 }
1150 return 1;
1151}
Yue Chen19e7aa82016-11-30 14:05:39 -08001152
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001153static INLINE PLANE_TYPE get_plane_type(int plane) {
Luc Trudeau005feb62017-02-22 13:34:01 -05001154 return (plane == 0) ? PLANE_TYPE_Y : PLANE_TYPE_UV;
1155}
1156
Urvang Joshi80893152017-10-27 11:51:14 -07001157static INLINE int av1_get_max_eob(TX_SIZE tx_size) {
Urvang Joshi030cea92017-12-05 15:27:09 -08001158 if (tx_size == TX_64X64 || tx_size == TX_64X32 || tx_size == TX_32X64) {
1159 return 1024;
1160 }
1161 if (tx_size == TX_16X64 || tx_size == TX_64X16) {
1162 return 512;
1163 }
Urvang Joshi030cea92017-12-05 15:27:09 -08001164 return tx_size_2d[tx_size];
Urvang Joshi80893152017-10-27 11:51:14 -07001165}
1166
Yaowu Xuc27fc142016-08-22 16:08:15 -07001167#ifdef __cplusplus
1168} // extern "C"
1169#endif
1170
Yaowu Xuf883b422016-08-30 14:01:10 -07001171#endif // AV1_COMMON_BLOCKD_H_