blob: 68188823b50bcf49c209cb840da481fa6d3a4261 [file] [log] [blame]
Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_COMMON_BLOCKD_H_
13#define AV1_COMMON_BLOCKD_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
Yaowu Xuf883b422016-08-30 14:01:10 -070015#include "./aom_config.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070016
Yaowu Xuf883b422016-08-30 14:01:10 -070017#include "aom_dsp/aom_dsp_common.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070018#include "aom_ports/mem.h"
19#include "aom_scale/yv12config.h"
20
21#include "av1/common/common_data.h"
22#include "av1/common/quant_common.h"
23#include "av1/common/entropy.h"
24#include "av1/common/entropymode.h"
25#include "av1/common/mv.h"
26#include "av1/common/scale.h"
27#include "av1/common/seg_common.h"
28#include "av1/common/tile_common.h"
Yushin Chod0b77ac2017-10-20 17:33:16 -070029
Yaowu Xuc27fc142016-08-22 16:08:15 -070030#ifdef __cplusplus
31extern "C" {
32#endif
33
34#define MAX_MB_PLANE 3
35
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080036// Set COMPOUND_SEGMENT_TYPE to one of the three
37// 0: Uniform
38// 1: Difference weighted
39#define COMPOUND_SEGMENT_TYPE 1
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080040#define MAX_SEG_MASK_BITS 1
Yaowu Xuf35f5272017-05-10 08:00:02 -070041
Sarah Parkerb9f757c2017-01-06 17:12:24 -080042// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
43typedef enum {
Yaowu Xuf35f5272017-05-10 08:00:02 -070044#if COMPOUND_SEGMENT_TYPE == 0
Sarah Parkerb9f757c2017-01-06 17:12:24 -080045 UNIFORM_45 = 0,
46 UNIFORM_45_INV,
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080047#elif COMPOUND_SEGMENT_TYPE == 1
Sarah Parker7bb84f32017-05-09 15:17:46 -070048 DIFFWTD_38 = 0,
49 DIFFWTD_38_INV,
Yaowu Xuf35f5272017-05-10 08:00:02 -070050#endif // COMPOUND_SEGMENT_TYPE
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080051 SEG_MASK_TYPES,
52} SEG_MASK_TYPE;
53
Yaowu Xuc27fc142016-08-22 16:08:15 -070054typedef enum {
55 KEY_FRAME = 0,
56 INTER_FRAME = 1,
Soo-Chul Han65c00ae2017-09-07 13:12:35 -040057#if CONFIG_OBU
58 INTRA_ONLY_FRAME = 2, // replaces intra-only
59 S_FRAME = 3,
60#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070061 FRAME_TYPES,
62} FRAME_TYPE;
63
Debargha Mukherjee0f248c42017-09-07 12:40:18 -070064static INLINE int is_comp_ref_allowed(BLOCK_SIZE bsize) {
65 (void)bsize;
Debargha Mukherjee0f248c42017-09-07 12:40:18 -070066 return AOMMIN(block_size_wide[bsize], block_size_high[bsize]) >= 8;
Debargha Mukherjee0f248c42017-09-07 12:40:18 -070067}
68
Yaowu Xuc27fc142016-08-22 16:08:15 -070069static INLINE int is_inter_mode(PREDICTION_MODE mode) {
Yaowu Xuc27fc142016-08-22 16:08:15 -070070 return mode >= NEARESTMV && mode <= NEW_NEWMV;
Yaowu Xuc27fc142016-08-22 16:08:15 -070071}
72
Wei-Ting Lin482551b2017-08-03 12:29:24 -070073#if CONFIG_NCOBMC_ADAPT_WEIGHT
74typedef struct superblock_mi_boundaries {
75 int mi_row_begin;
76 int mi_col_begin;
77 int mi_row_end;
78 int mi_col_end;
79} SB_MI_BD;
80
Wei-Ting Linb586de82017-08-03 15:17:38 -070081typedef struct { int16_t KERNEL[4][MAX_SB_SIZE][MAX_SB_SIZE]; } NCOBMC_KERNELS;
Wei-Ting Lin482551b2017-08-03 12:29:24 -070082#endif
83
David Barkerac37fa32016-12-02 12:30:21 +000084typedef struct {
85 uint8_t *plane[MAX_MB_PLANE];
86 int stride[MAX_MB_PLANE];
87} BUFFER_SET;
88
Yaowu Xuc27fc142016-08-22 16:08:15 -070089static INLINE int is_inter_singleref_mode(PREDICTION_MODE mode) {
Zoe Liu7f24e1b2017-03-17 17:42:05 -070090 return mode >= NEARESTMV && mode <= NEWMV;
Yaowu Xuc27fc142016-08-22 16:08:15 -070091}
Zoe Liu85b66462017-04-20 14:28:19 -070092static INLINE int is_inter_compound_mode(PREDICTION_MODE mode) {
93 return mode >= NEAREST_NEARESTMV && mode <= NEW_NEWMV;
94}
Zoe Liu239f06b2017-04-20 13:10:55 -070095#if CONFIG_COMPOUND_SINGLEREF
96static INLINE int is_inter_singleref_comp_mode(PREDICTION_MODE mode) {
97 return mode >= SR_NEAREST_NEARMV && mode <= SR_NEW_NEWMV;
98}
Zoe Liu85b66462017-04-20 14:28:19 -070099static INLINE int is_inter_anyref_comp_mode(PREDICTION_MODE mode) {
100 return is_inter_compound_mode(mode) || is_inter_singleref_comp_mode(mode);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700101}
Zoe Liu85b66462017-04-20 14:28:19 -0700102#endif // CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700103
104static INLINE PREDICTION_MODE compound_ref0_mode(PREDICTION_MODE mode) {
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700105 static PREDICTION_MODE lut[] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800106 MB_MODE_COUNT, // DC_PRED
107 MB_MODE_COUNT, // V_PRED
108 MB_MODE_COUNT, // H_PRED
109 MB_MODE_COUNT, // D45_PRED
110 MB_MODE_COUNT, // D135_PRED
111 MB_MODE_COUNT, // D117_PRED
112 MB_MODE_COUNT, // D153_PRED
113 MB_MODE_COUNT, // D207_PRED
114 MB_MODE_COUNT, // D63_PRED
Urvang Joshi102245d2016-11-28 13:05:36 -0800115 MB_MODE_COUNT, // SMOOTH_PRED
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700116#if CONFIG_SMOOTH_HV
117 MB_MODE_COUNT, // SMOOTH_V_PRED
118 MB_MODE_COUNT, // SMOOTH_H_PRED
119#endif // CONFIG_SMOOTH_HV
Urvang Joshi96d1c0a2017-10-10 13:15:32 -0700120 MB_MODE_COUNT, // PAETH_PRED
Urvang Joshi102245d2016-11-28 13:05:36 -0800121 MB_MODE_COUNT, // NEARESTMV
122 MB_MODE_COUNT, // NEARMV
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700123 MB_MODE_COUNT, // GLOBALMV
Urvang Joshi102245d2016-11-28 13:05:36 -0800124 MB_MODE_COUNT, // NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700125#if CONFIG_COMPOUND_SINGLEREF
126 NEARESTMV, // SR_NEAREST_NEARMV
Zoe Liu85b66462017-04-20 14:28:19 -0700127 // NEARESTMV, // SR_NEAREST_NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700128 NEARMV, // SR_NEAR_NEWMV
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700129 GLOBALMV, // SR_ZERO_NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700130 NEWMV, // SR_NEW_NEWMV
131#endif // CONFIG_COMPOUND_SINGLEREF
132 NEARESTMV, // NEAREST_NEARESTMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700133 NEARMV, // NEAR_NEARMV
134 NEARESTMV, // NEAREST_NEWMV
135 NEWMV, // NEW_NEARESTMV
136 NEARMV, // NEAR_NEWMV
137 NEWMV, // NEW_NEARMV
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700138 GLOBALMV, // GLOBAL_GLOBALMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700139 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700140 };
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700141 assert(NELEMENTS(lut) == MB_MODE_COUNT);
Zoe Liu85b66462017-04-20 14:28:19 -0700142#if CONFIG_COMPOUND_SINGLEREF
143 assert(is_inter_anyref_comp_mode(mode));
144#else // !CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700145 assert(is_inter_compound_mode(mode));
Zoe Liu85b66462017-04-20 14:28:19 -0700146#endif // CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700147 return lut[mode];
148}
149
150static INLINE PREDICTION_MODE compound_ref1_mode(PREDICTION_MODE mode) {
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700151 static PREDICTION_MODE lut[] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800152 MB_MODE_COUNT, // DC_PRED
153 MB_MODE_COUNT, // V_PRED
154 MB_MODE_COUNT, // H_PRED
155 MB_MODE_COUNT, // D45_PRED
156 MB_MODE_COUNT, // D135_PRED
157 MB_MODE_COUNT, // D117_PRED
158 MB_MODE_COUNT, // D153_PRED
159 MB_MODE_COUNT, // D207_PRED
160 MB_MODE_COUNT, // D63_PRED
Urvang Joshi102245d2016-11-28 13:05:36 -0800161 MB_MODE_COUNT, // SMOOTH_PRED
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700162#if CONFIG_SMOOTH_HV
163 MB_MODE_COUNT, // SMOOTH_V_PRED
164 MB_MODE_COUNT, // SMOOTH_H_PRED
165#endif // CONFIG_SMOOTH_HV
Urvang Joshi96d1c0a2017-10-10 13:15:32 -0700166 MB_MODE_COUNT, // PAETH_PRED
Urvang Joshi102245d2016-11-28 13:05:36 -0800167 MB_MODE_COUNT, // NEARESTMV
168 MB_MODE_COUNT, // NEARMV
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700169 MB_MODE_COUNT, // GLOBALMV
Urvang Joshi102245d2016-11-28 13:05:36 -0800170 MB_MODE_COUNT, // NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700171#if CONFIG_COMPOUND_SINGLEREF
Zoe Liu85b66462017-04-20 14:28:19 -0700172 NEARMV, // SR_NEAREST_NEARMV
173 // NEWMV, // SR_NEAREST_NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700174 NEWMV, // SR_NEAR_NEWMV
175 NEWMV, // SR_ZERO_NEWMV
176 NEWMV, // SR_NEW_NEWMV
177#endif // CONFIG_COMPOUND_SINGLEREF
178 NEARESTMV, // NEAREST_NEARESTMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700179 NEARMV, // NEAR_NEARMV
180 NEWMV, // NEAREST_NEWMV
181 NEARESTMV, // NEW_NEARESTMV
182 NEWMV, // NEAR_NEWMV
183 NEARMV, // NEW_NEARMV
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700184 GLOBALMV, // GLOBAL_GLOBALMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700185 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700186 };
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700187 assert(NELEMENTS(lut) == MB_MODE_COUNT);
Zoe Liu85b66462017-04-20 14:28:19 -0700188#if CONFIG_COMPOUND_SINGLEREF
189 assert(is_inter_anyref_comp_mode(mode));
190#else // !CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700191 assert(is_inter_compound_mode(mode));
Zoe Liu85b66462017-04-20 14:28:19 -0700192#endif // CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700193 return lut[mode];
194}
195
David Barker3dfba992017-04-03 16:10:09 +0100196static INLINE int have_nearmv_in_inter_mode(PREDICTION_MODE mode) {
Debargha Mukherjeebb6e1342017-04-17 16:05:04 -0700197 return (mode == NEARMV || mode == NEAR_NEARMV || mode == NEAR_NEWMV ||
Zoe Liu85b66462017-04-20 14:28:19 -0700198#if CONFIG_COMPOUND_SINGLEREF
199 mode == SR_NEAREST_NEARMV || mode == SR_NEAR_NEWMV ||
200#endif // CONFIG_COMPOUND_SINGLEREF
Debargha Mukherjeebb6e1342017-04-17 16:05:04 -0700201 mode == NEW_NEARMV);
David Barker3dfba992017-04-03 16:10:09 +0100202}
203
Yaowu Xuc27fc142016-08-22 16:08:15 -0700204static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700205 return (mode == NEWMV || mode == NEW_NEWMV || mode == NEAREST_NEWMV ||
Zoe Liu85b66462017-04-20 14:28:19 -0700206#if CONFIG_COMPOUND_SINGLEREF
207 /* mode == SR_NEAREST_NEWMV || */ mode == SR_NEAR_NEWMV ||
208 mode == SR_ZERO_NEWMV || mode == SR_NEW_NEWMV ||
209#endif // CONFIG_COMPOUND_SINGLEREF
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700210 mode == NEW_NEARESTMV || mode == NEAR_NEWMV || mode == NEW_NEARMV);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700211}
Sarah Parker6fdc8532016-11-16 17:47:13 -0800212
Sarah Parker2e604882017-01-17 17:31:25 -0800213static INLINE int use_masked_motion_search(COMPOUND_TYPE type) {
214 return (type == COMPOUND_WEDGE);
215}
216
Sarah Parker6fdc8532016-11-16 17:47:13 -0800217static INLINE int is_masked_compound_type(COMPOUND_TYPE type) {
Sarah Parker569edda2016-12-14 14:57:38 -0800218 return (type == COMPOUND_WEDGE || type == COMPOUND_SEG);
Sarah Parker6fdc8532016-11-16 17:47:13 -0800219}
Zoe Liu85b66462017-04-20 14:28:19 -0700220
Yaowu Xuc27fc142016-08-22 16:08:15 -0700221/* For keyframes, intra block modes are predicted by the (already decoded)
222 modes for the Y blocks to the left and above us; for interframes, there
223 is a single probability table. */
224
225typedef struct {
226 PREDICTION_MODE as_mode;
227 int_mv as_mv[2]; // first, second inter predictor motion vectors
Yaowu Xuf5bbbfa2016-09-26 09:13:38 -0700228 int_mv pred_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700229 int_mv ref_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700230} b_mode_info;
231
232typedef int8_t MV_REFERENCE_FRAME;
233
234typedef struct {
235 // Number of base colors for Y (0) and UV (1)
236 uint8_t palette_size[2];
hui sufa4ff852017-05-15 12:20:50 -0700237 // Value of base colors for Y, U, and V
Yaowu Xuc27fc142016-08-22 16:08:15 -0700238 uint16_t palette_colors[3 * PALETTE_MAX_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700239} PALETTE_MODE_INFO;
240
hui su5db97432016-10-14 16:10:14 -0700241#if CONFIG_FILTER_INTRA
Yue Chen8d8638a2017-02-21 13:28:16 +0800242#define USE_3TAP_INTRA_FILTER 1 // 0: 4-tap; 1: 3-tap
Yaowu Xuc27fc142016-08-22 16:08:15 -0700243typedef struct {
244 // 1: an ext intra mode is used; 0: otherwise.
hui su5db97432016-10-14 16:10:14 -0700245 uint8_t use_filter_intra_mode[PLANE_TYPES];
246 FILTER_INTRA_MODE filter_intra_mode[PLANE_TYPES];
247} FILTER_INTRA_MODE_INFO;
Yue Chen57b8ff62017-10-10 23:37:31 -0700248
249static const PREDICTION_MODE fimode_to_intradir[FILTER_INTRA_MODES] = {
250 DC_PRED, V_PRED, H_PRED, D117_PRED, D153_PRED, DC_PRED
251};
hui su5db97432016-10-14 16:10:14 -0700252#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700253
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800254#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800255#define TXB_COEFF_COST_MAP_SIZE (2 * MAX_MIB_SIZE)
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800256#endif
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800257
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800258typedef struct RD_STATS {
259 int rate;
260 int64_t dist;
Angie Chiang7bbd3b12017-04-26 11:06:09 -0700261 // Please be careful of using rdcost, it's not guaranteed to be set all the
262 // time.
263 // TODO(angiebird): Create a set of functions to manipulate the RD_STATS. In
264 // these functions, make sure rdcost is always up-to-date according to
265 // rate/dist.
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700266 int64_t rdcost;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800267 int64_t sse;
Angie Chiang7bbd3b12017-04-26 11:06:09 -0700268 int skip; // sse should equal to dist when skip == 1
Jingning Han3bce7542017-07-25 10:53:57 -0700269 int64_t ref_rdcost;
270 int zero_rate;
Jingning Han1a7f0a82017-07-27 09:48:05 -0700271 uint8_t invalid_rate;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800272#if CONFIG_RD_DEBUG
273 int txb_coeff_cost[MAX_MB_PLANE];
274 int txb_coeff_cost_map[MAX_MB_PLANE][TXB_COEFF_COST_MAP_SIZE]
275 [TXB_COEFF_COST_MAP_SIZE];
Angie Chiang3963d632016-11-10 18:41:40 -0800276#endif // CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800277} RD_STATS;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800278
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000279// This struct is used to group function args that are commonly
280// sent together in functions related to interinter compound modes
Sarah Parker6fdc8532016-11-16 17:47:13 -0800281typedef struct {
Sarah Parker6fdc8532016-11-16 17:47:13 -0800282 int wedge_index;
283 int wedge_sign;
Sarah Parkerb9f757c2017-01-06 17:12:24 -0800284 SEG_MASK_TYPE mask_type;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000285 uint8_t *seg_mask;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000286 COMPOUND_TYPE interinter_compound_type;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800287} INTERINTER_COMPOUND_DATA;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800288
Yaowu Xuc27fc142016-08-22 16:08:15 -0700289// This structure now relates to 8x8 block regions.
Luc Trudeauf5334002017-04-25 12:21:26 -0400290typedef struct MB_MODE_INFO {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700291 // Common for both INTER and INTRA blocks
292 BLOCK_SIZE sb_type;
293 PREDICTION_MODE mode;
294 TX_SIZE tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700295 // TODO(jingning): This effectively assigned a separate entry for each
296 // 8x8 block. Apparently it takes much more space than needed.
297 TX_SIZE inter_tx_size[MAX_MIB_SIZE][MAX_MIB_SIZE];
Jingning Hane67b38a2016-11-04 10:30:00 -0700298 TX_SIZE min_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700299 int8_t skip;
Zoe Liuf704a1c2017-10-02 16:55:59 -0700300#if CONFIG_EXT_SKIP
301 int8_t skip_mode;
302#endif // CONFIG_EXT_SKIP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700303 int8_t segment_id;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700304 int8_t seg_id_predicted; // valid only when temporal_update is enabled
305
Sarah Parkerc5ccd4c2017-08-03 11:27:50 -0700306#if CONFIG_MRC_TX
307 int valid_mrc_mask;
308#endif // CONFIG_MRC_TX
309
Yaowu Xuc27fc142016-08-22 16:08:15 -0700310 // Only for INTRA blocks
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400311 UV_PREDICTION_MODE uv_mode;
Urvang Joshic6300aa2017-06-01 14:46:23 -0700312
Yaowu Xuc27fc142016-08-22 16:08:15 -0700313 PALETTE_MODE_INFO palette_mode_info;
Alex Converse28744302017-04-13 14:46:22 -0700314#if CONFIG_INTRABC
315 uint8_t use_intrabc;
316#endif // CONFIG_INTRABC
Yaowu Xuc27fc142016-08-22 16:08:15 -0700317
Rupert Swarbrick27e90292017-09-28 17:46:50 +0100318 // Only for INTER blocks
319 InterpFilters interp_filters;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700320 MV_REFERENCE_FRAME ref_frame[2];
321 TX_TYPE tx_type;
Angie Chiangcd9b03f2017-04-16 13:37:13 -0700322#if CONFIG_TXK_SEL
Angie Chiang808d8592017-04-06 18:36:55 -0700323 TX_TYPE txk_type[MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
324#endif
Lester Lu432012f2017-08-17 14:39:29 -0700325#if CONFIG_LGT_FROM_PRED
326 int use_lgt;
327#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700328
hui su5db97432016-10-14 16:10:14 -0700329#if CONFIG_FILTER_INTRA
330 FILTER_INTRA_MODE_INFO filter_intra_mode_info;
331#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700332#if CONFIG_EXT_INTRA
hui sueda3d762016-12-06 16:58:23 -0800333 // The actual prediction angle is the base angle + (angle_delta * step).
Yaowu Xuc27fc142016-08-22 16:08:15 -0700334 int8_t angle_delta[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700335#endif // CONFIG_EXT_INTRA
336
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000337 // interintra members
Yaowu Xuc27fc142016-08-22 16:08:15 -0700338 INTERINTRA_MODE interintra_mode;
339 // TODO(debargha): Consolidate these flags
340 int use_wedge_interintra;
341 int interintra_wedge_index;
342 int interintra_wedge_sign;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000343 // interinter members
344 COMPOUND_TYPE interinter_compound_type;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000345 int wedge_index;
346 int wedge_sign;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000347 SEG_MASK_TYPE mask_type;
Yue Chencb60b182016-10-13 15:18:22 -0700348 MOTION_MODE motion_mode;
Yue Chen5329a2b2017-02-28 17:33:00 +0800349 int overlappable_neighbors[2];
Wei-Ting Lin85a8f702017-06-22 13:55:15 -0700350#if CONFIG_NCOBMC_ADAPT_WEIGHT
351 // Applying different weighting kernels in ncobmc
352 // In current implementation, interpolation modes only defined for squared
353 // blocks. A rectangular block is divided into two squared blocks and each
354 // squared block has an interpolation mode.
355 NCOBMC_MODE ncobmc_mode[2];
Wei-Ting Lin482551b2017-08-03 12:29:24 -0700356#endif // CONFIG_NCOBMC_ADAPT_WEIGHT
Yaowu Xuc27fc142016-08-22 16:08:15 -0700357 int_mv mv[2];
358 int_mv pred_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700359 uint8_t ref_mv_idx;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700360#if CONFIG_EXT_PARTITION_TYPES
361 PARTITION_TYPE partition;
362#endif
363#if CONFIG_NEW_QUANT
364 int dq_off_index;
365 int send_dq_bit;
366#endif // CONFIG_NEW_QUANT
367 /* deringing gain *per-superblock* */
Jean-Marc Valin5f5c1322017-03-21 16:20:21 -0400368 int8_t cdef_strength;
Arild Fuldseth07441162016-08-15 15:07:52 +0200369 int current_q_index;
Fangwen Fu231fe422017-04-24 17:52:29 -0700370#if CONFIG_EXT_DELTA_Q
371 int current_delta_lf_from_base;
Cheng Chena97394f2017-09-27 15:05:14 -0700372#if CONFIG_LOOPFILTER_LEVEL
373 int curr_delta_lf[FRAME_LF_COUNT];
374#endif // CONFIG_LOOPFILTER_LEVEL
Fangwen Fu231fe422017-04-24 17:52:29 -0700375#endif
Angie Chiangd4022822016-11-02 18:30:25 -0700376#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800377 RD_STATS rd_stats;
Angie Chiangd4022822016-11-02 18:30:25 -0700378 int mi_row;
379 int mi_col;
380#endif
Yue Chen69f18e12016-09-08 14:48:15 -0700381 int num_proj_ref[2];
382 WarpedMotionParams wm_params[2];
Ryan Lei9b02b0e2017-01-30 15:52:20 -0800383
Luc Trudeauf5334002017-04-25 12:21:26 -0400384#if CONFIG_CFL
385 // Index of the alpha Cb and alpha Cr combination
Luc Trudeaua9bd85f2017-05-11 14:37:56 -0400386 int cfl_alpha_idx;
David Michael Barrf6eaa152017-07-19 19:42:28 +0900387 // Joint sign of alpha Cb and alpha Cr
388 int cfl_alpha_signs;
Luc Trudeauf5334002017-04-25 12:21:26 -0400389#endif
390
Ryan Lei9b02b0e2017-01-30 15:52:20 -0800391 BOUNDARY_TYPE boundary_info;
Cheng Chenf572cd32017-08-25 18:34:51 -0700392#if CONFIG_LPF_SB
393 uint8_t filt_lvl;
Cheng Chen41d37c22017-09-08 19:00:21 -0700394 int reuse_sb_lvl;
395 int sign;
396 int delta;
Cheng Chenf572cd32017-08-25 18:34:51 -0700397#endif
Cheng Chenca6958c2017-10-10 14:00:50 -0700398
399#if CONFIG_JNT_COMP
400 int compound_idx;
401#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700402} MB_MODE_INFO;
403
404typedef struct MODE_INFO {
405 MB_MODE_INFO mbmi;
406 b_mode_info bmi[4];
407} MODE_INFO;
408
Alex Converse28744302017-04-13 14:46:22 -0700409#if CONFIG_INTRABC
410static INLINE int is_intrabc_block(const MB_MODE_INFO *mbmi) {
411 return mbmi->use_intrabc;
412}
413#endif
414
Yaowu Xuc27fc142016-08-22 16:08:15 -0700415static INLINE PREDICTION_MODE get_y_mode(const MODE_INFO *mi, int block) {
Jingning Hand7d20472016-12-14 11:13:48 -0800416 (void)block;
417 return mi->mbmi.mode;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700418}
419
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400420#if CONFIG_CFL
421static INLINE PREDICTION_MODE get_uv_mode(UV_PREDICTION_MODE mode) {
422 static const PREDICTION_MODE uv2y[UV_INTRA_MODES] = {
Urvang Joshi93b543a2017-06-01 17:32:41 -0700423 DC_PRED, // UV_DC_PRED
424 V_PRED, // UV_V_PRED
425 H_PRED, // UV_H_PRED
426 D45_PRED, // UV_D45_PRED
427 D135_PRED, // UV_D135_PRED
428 D117_PRED, // UV_D117_PRED
429 D153_PRED, // UV_D153_PRED
430 D207_PRED, // UV_D207_PRED
431 D63_PRED, // UV_D63_PRED
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400432 SMOOTH_PRED, // UV_SMOOTH_PRED
433#if CONFIG_SMOOTH_HV
434 SMOOTH_V_PRED, // UV_SMOOTH_V_PRED
435 SMOOTH_H_PRED, // UV_SMOOTH_H_PRED
436#endif // CONFIG_SMOOTH_HV
Urvang Joshi96d1c0a2017-10-10 13:15:32 -0700437 PAETH_PRED, // UV_PAETH_PRED
Luc Trudeau6e1cd782017-06-21 13:52:36 -0400438 DC_PRED, // CFL_PRED
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400439 };
440 return uv2y[mode];
441}
442#else
443static INLINE PREDICTION_MODE get_uv_mode(PREDICTION_MODE mode) { return mode; }
444#endif // CONFIG_CFL
445
Yaowu Xuc27fc142016-08-22 16:08:15 -0700446static INLINE int is_inter_block(const MB_MODE_INFO *mbmi) {
Alex Converse28744302017-04-13 14:46:22 -0700447#if CONFIG_INTRABC
448 if (is_intrabc_block(mbmi)) return 1;
449#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700450 return mbmi->ref_frame[0] > INTRA_FRAME;
451}
452
453static INLINE int has_second_ref(const MB_MODE_INFO *mbmi) {
454 return mbmi->ref_frame[1] > INTRA_FRAME;
455}
456
Zoe Liuc082bbc2017-05-17 13:31:37 -0700457#if CONFIG_EXT_COMP_REFS
458static INLINE int has_uni_comp_refs(const MB_MODE_INFO *mbmi) {
459 return has_second_ref(mbmi) && (!((mbmi->ref_frame[0] >= BWDREF_FRAME) ^
460 (mbmi->ref_frame[1] >= BWDREF_FRAME)));
461}
462
463static INLINE MV_REFERENCE_FRAME comp_ref0(int ref_idx) {
464 static const MV_REFERENCE_FRAME lut[] = {
465 LAST_FRAME, // LAST_LAST2_FRAMES,
Zoe Liufcf5fa22017-06-26 16:00:38 -0700466 LAST_FRAME, // LAST_LAST3_FRAMES,
Zoe Liuc082bbc2017-05-17 13:31:37 -0700467 LAST_FRAME, // LAST_GOLDEN_FRAMES,
468 BWDREF_FRAME, // BWDREF_ALTREF_FRAMES,
469 };
470 assert(NELEMENTS(lut) == UNIDIR_COMP_REFS);
471 return lut[ref_idx];
472}
473
474static INLINE MV_REFERENCE_FRAME comp_ref1(int ref_idx) {
475 static const MV_REFERENCE_FRAME lut[] = {
476 LAST2_FRAME, // LAST_LAST2_FRAMES,
Zoe Liufcf5fa22017-06-26 16:00:38 -0700477 LAST3_FRAME, // LAST_LAST3_FRAMES,
Zoe Liuc082bbc2017-05-17 13:31:37 -0700478 GOLDEN_FRAME, // LAST_GOLDEN_FRAMES,
479 ALTREF_FRAME, // BWDREF_ALTREF_FRAMES,
480 };
481 assert(NELEMENTS(lut) == UNIDIR_COMP_REFS);
482 return lut[ref_idx];
483}
484#endif // CONFIG_EXT_COMP_REFS
485
Yaowu Xuf883b422016-08-30 14:01:10 -0700486PREDICTION_MODE av1_left_block_mode(const MODE_INFO *cur_mi,
487 const MODE_INFO *left_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700488
Yaowu Xuf883b422016-08-30 14:01:10 -0700489PREDICTION_MODE av1_above_block_mode(const MODE_INFO *cur_mi,
490 const MODE_INFO *above_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700491
Sarah Parker19234cc2017-03-10 16:43:25 -0800492static INLINE int is_global_mv_block(const MODE_INFO *mi, int block,
493 TransformationType type) {
494 PREDICTION_MODE mode = get_y_mode(mi, block);
495#if GLOBAL_SUB8X8_USED
496 const int block_size_allowed = 1;
497#else
498 const BLOCK_SIZE bsize = mi->mbmi.sb_type;
Debargha Mukherjeec17a4432017-08-28 22:22:45 -0700499 const int block_size_allowed =
500 AOMMIN(block_size_wide[bsize], block_size_high[bsize]) >= 8;
Sarah Parker19234cc2017-03-10 16:43:25 -0800501#endif // GLOBAL_SUB8X8_USED
Sarah Parker2b9ec2e2017-10-30 17:34:08 -0700502 return (mode == GLOBALMV || mode == GLOBAL_GLOBALMV) && type > TRANSLATION &&
Sarah Parker19234cc2017-03-10 16:43:25 -0800503 block_size_allowed;
Sarah Parker19234cc2017-03-10 16:43:25 -0800504}
Sarah Parker19234cc2017-03-10 16:43:25 -0800505
Yaowu Xuc27fc142016-08-22 16:08:15 -0700506enum mv_precision { MV_PRECISION_Q3, MV_PRECISION_Q4 };
507
508struct buf_2d {
509 uint8_t *buf;
510 uint8_t *buf0;
511 int width;
512 int height;
513 int stride;
514};
515
516typedef struct macroblockd_plane {
517 tran_low_t *dqcoeff;
518 PLANE_TYPE plane_type;
519 int subsampling_x;
520 int subsampling_y;
521 struct buf_2d dst;
522 struct buf_2d pre[2];
523 ENTROPY_CONTEXT *above_context;
524 ENTROPY_CONTEXT *left_context;
525 int16_t seg_dequant[MAX_SEGMENTS][2];
526#if CONFIG_NEW_QUANT
clang-format67948d32016-09-07 22:40:40 -0700527 dequant_val_type_nuq seg_dequant_nuq[MAX_SEGMENTS][QUANT_PROFILES]
528 [COEF_BANDS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700529#endif
530 uint8_t *color_index_map;
531
532 // number of 4x4s in current block
533 uint16_t n4_w, n4_h;
534 // log2 of n4_w, n4_h
535 uint8_t n4_wl, n4_hl;
Jingning Hanc47fe6c2016-10-21 16:40:47 -0700536 // block size in pixels
537 uint8_t width, height;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700538
539#if CONFIG_AOM_QM
Thomas Daviesdd3cf832017-10-20 15:49:57 +0100540 qm_val_t *seg_iqmatrix[MAX_SEGMENTS][TX_SIZES_ALL];
541 qm_val_t *seg_qmatrix[MAX_SEGMENTS][TX_SIZES_ALL];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700542#endif
543 // encoder
544 const int16_t *dequant;
545#if CONFIG_NEW_QUANT
546 const dequant_val_type_nuq *dequant_val_nuq[QUANT_PROFILES];
547#endif // CONFIG_NEW_QUANT
Yushin Cho77bba8d2016-11-04 16:36:56 -0700548
Yushin Chod0b77ac2017-10-20 17:33:16 -0700549#if CONFIG_DIST_8X8
Yushin Cho77bba8d2016-11-04 16:36:56 -0700550 DECLARE_ALIGNED(16, int16_t, pred[MAX_SB_SQUARE]);
Yushin Chob7b60c52017-07-14 16:18:52 -0700551#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700552} MACROBLOCKD_PLANE;
553
Jingning Han3468df12016-12-05 17:53:16 -0800554#define BLOCK_OFFSET(x, i) \
555 ((x) + (i) * (1 << (tx_size_wide_log2[0] + tx_size_high_log2[0])))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700556
557typedef struct RefBuffer {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700558 int idx;
559 YV12_BUFFER_CONFIG *buf;
560 struct scale_factors sf;
Zoe Liu7b1ec7a2017-05-24 22:28:24 -0700561#if CONFIG_VAR_REFS
Zoe Liu7b1ec7a2017-05-24 22:28:24 -0700562 int is_valid;
563#endif // CONFIG_VAR_REFS
Yaowu Xuc27fc142016-08-22 16:08:15 -0700564} RefBuffer;
565
Yi Luo2ab63cb2017-05-11 16:44:22 -0700566#if CONFIG_ADAPT_SCAN
567typedef int16_t EobThresholdMD[TX_TYPES][EOB_THRESHOLD_NUM];
568#endif
Luc Trudeauf8164152017-04-11 16:20:51 -0400569
Rupert Swarbrick6c545212017-09-01 17:17:25 +0100570#if CONFIG_LOOP_RESTORATION
571typedef struct {
572 DECLARE_ALIGNED(16, InterpKernel, vfilter);
573 DECLARE_ALIGNED(16, InterpKernel, hfilter);
574} WienerInfo;
575
576typedef struct {
577 int ep;
578 int xqd[2];
579} SgrprojInfo;
580#endif // CONFIG_LOOP_RESTORATION
581
David Michael Barr5b2021e2017-08-17 18:12:39 +0900582#if CONFIG_CFL
Hui Su9fa96232017-10-23 15:46:04 -0700583#if CONFIG_DEBUG
Luc Trudeau03b7e7d2017-09-19 13:20:52 -0400584#define CFL_SUB8X8_VAL_MI_SIZE (4)
585#define CFL_SUB8X8_VAL_MI_SQUARE \
586 (CFL_SUB8X8_VAL_MI_SIZE * CFL_SUB8X8_VAL_MI_SIZE)
Hui Su9fa96232017-10-23 15:46:04 -0700587#endif // CONFIG_DEBUG
David Michael Barr5b2021e2017-08-17 18:12:39 +0900588typedef struct cfl_ctx {
Luc Trudeau4e26d662017-09-11 13:08:40 -0400589 // The CfL prediction buffer is used in two steps:
590 // 1. Stores Q3 reconstructed luma pixels
591 // (only Q2 is required, but Q3 is used to avoid shifts)
592 // 2. Stores Q3 AC contributions (step1 - tx block avg)
593 int16_t pred_buf_q3[MAX_SB_SQUARE];
David Michael Barr5b2021e2017-08-17 18:12:39 +0900594
Luc Trudeau4e26d662017-09-11 13:08:40 -0400595 // Height and width currently used in the CfL prediction buffer.
596 int buf_height, buf_width;
David Michael Barr5b2021e2017-08-17 18:12:39 +0900597
598 // Height and width of the chroma prediction block currently associated with
599 // this context
600 int uv_height, uv_width;
601
David Michael Barr5b2021e2017-08-17 18:12:39 +0900602 int are_parameters_computed;
603
604 // Chroma subsampling
605 int subsampling_x, subsampling_y;
606
607 // Block level DC_PRED for each chromatic plane
Luc Trudeaud3487722017-09-29 15:55:48 -0400608 // 16 bits are used, but only the pixel bit depth is required
609 int16_t dc_pred[CFL_PRED_PLANES];
David Michael Barr5b2021e2017-08-17 18:12:39 +0900610
611 int mi_row, mi_col;
612
613 // Whether the reconstructed luma pixels need to be stored
614 int store_y;
615
David Michael Barr1f8d0952017-10-11 17:46:39 +0900616#if CONFIG_DEBUG
617 int rate;
618#endif // CONFIG_DEBUG
619
David Michael Barr5b2021e2017-08-17 18:12:39 +0900620 int is_chroma_reference;
Hui Su9fa96232017-10-23 15:46:04 -0700621#if CONFIG_DEBUG
Luc Trudeauc7af36d2017-10-11 21:01:00 -0400622 // Validation buffer is usually 2x2, except for 16x4 and 4x16 in that case it
623 // is 4x2 and 2x4 respectively. To simplify accessing the buffer we use a
624 // stride of CFL_SUB8X8_VAL_MI_SIZE resulting in a square of 16.
625 uint16_t sub8x8_val[CFL_SUB8X8_VAL_MI_SQUARE];
626 uint16_t store_counter;
627 uint16_t last_compute_counter;
Hui Su9fa96232017-10-23 15:46:04 -0700628#endif // CONFIG_DEBUG
David Michael Barr5b2021e2017-08-17 18:12:39 +0900629} CFL_CTX;
630#endif // CONFIG_CFL
631
Yaowu Xuc27fc142016-08-22 16:08:15 -0700632typedef struct macroblockd {
633 struct macroblockd_plane plane[MAX_MB_PLANE];
634 uint8_t bmode_blocks_wl;
635 uint8_t bmode_blocks_hl;
636
637 FRAME_COUNTS *counts;
638 TileInfo tile;
639
640 int mi_stride;
641
642 MODE_INFO **mi;
643 MODE_INFO *left_mi;
644 MODE_INFO *above_mi;
645 MB_MODE_INFO *left_mbmi;
646 MB_MODE_INFO *above_mbmi;
647
648 int up_available;
649 int left_available;
Jingning Han3da18d62017-05-02 12:43:58 -0700650 int chroma_up_available;
651 int chroma_left_available;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700652
Yaowu Xuf883b422016-08-30 14:01:10 -0700653 const aom_prob (*partition_probs)[PARTITION_TYPES - 1];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700654
Rupert Swarbrick57486c52017-08-14 10:53:49 +0100655 /* Distance of MB away from frame edges in subpixels (1/8th pixel) */
Yaowu Xuc27fc142016-08-22 16:08:15 -0700656 int mb_to_left_edge;
657 int mb_to_right_edge;
658 int mb_to_top_edge;
659 int mb_to_bottom_edge;
660
661 FRAME_CONTEXT *fc;
662
663 /* pointers to reference frames */
Urvang Joshi52648442016-10-13 17:27:51 -0700664 const RefBuffer *block_refs[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700665
666 /* pointer to current frame */
667 const YV12_BUFFER_CONFIG *cur_buf;
668
Alex Conversee816b312017-05-01 09:51:24 -0700669#if CONFIG_INTRABC
670 /* Scale of the current frame with respect to itself */
671 struct scale_factors sf_identity;
672#endif
673
Yaowu Xuc27fc142016-08-22 16:08:15 -0700674 ENTROPY_CONTEXT *above_context[MAX_MB_PLANE];
675 ENTROPY_CONTEXT left_context[MAX_MB_PLANE][2 * MAX_MIB_SIZE];
676
677 PARTITION_CONTEXT *above_seg_context;
678 PARTITION_CONTEXT left_seg_context[MAX_MIB_SIZE];
679
Yaowu Xuc27fc142016-08-22 16:08:15 -0700680 TXFM_CONTEXT *above_txfm_context;
681 TXFM_CONTEXT *left_txfm_context;
Jingning Han331662e2017-05-30 17:03:32 -0700682 TXFM_CONTEXT left_txfm_context_buffer[2 * MAX_MIB_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700683
Rupert Swarbrick6c545212017-09-01 17:17:25 +0100684#if CONFIG_LOOP_RESTORATION
685 WienerInfo wiener_info[MAX_MB_PLANE];
686 SgrprojInfo sgrproj_info[MAX_MB_PLANE];
687#endif // CONFIG_LOOP_RESTORATION
688
Jingning Hanff6ee6a2016-12-07 09:55:21 -0800689 // block dimension in the unit of mode_info.
Yaowu Xuc27fc142016-08-22 16:08:15 -0700690 uint8_t n8_w, n8_h;
691
Yaowu Xuc27fc142016-08-22 16:08:15 -0700692 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
693 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
694 uint8_t is_sec_rect;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700695
Thomas Daviesf77d4ad2017-01-10 18:55:42 +0000696 FRAME_CONTEXT *tile_ctx;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700697 /* Bit depth: 8, 10, 12 */
698 int bd;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700699
Debargha Mukherjee3c42c092016-09-29 09:17:36 -0700700 int qindex[MAX_SEGMENTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700701 int lossless[MAX_SEGMENTS];
702 int corrupted;
RogerZhou3b635242017-09-19 10:06:46 -0700703#if CONFIG_AMVR
RogerZhou10a03802017-10-26 11:49:48 -0700704 int cur_frame_force_integer_mv;
RogerZhou3b635242017-09-19 10:06:46 -0700705// same with that in AV1_COMMON
706#endif
Yaowu Xuf883b422016-08-30 14:01:10 -0700707 struct aom_internal_error_info *error_info;
David Barkercf3d0b02016-11-10 10:14:49 +0000708 WarpedMotionParams *global_motion;
Arild Fuldseth07441162016-08-15 15:07:52 +0200709 int prev_qindex;
710 int delta_qindex;
711 int current_qindex;
Fangwen Fu231fe422017-04-24 17:52:29 -0700712#if CONFIG_EXT_DELTA_Q
713 // Since actual frame level loop filtering level value is not available
714 // at the beginning of the tile (only available during actual filtering)
715 // at encoder side.we record the delta_lf (against the frame level loop
716 // filtering level) and code the delta between previous superblock's delta
717 // lf and current delta lf. It is equivalent to the delta between previous
718 // superblock's actual lf and current lf.
719 int prev_delta_lf_from_base;
720 int current_delta_lf_from_base;
Cheng Chena97394f2017-09-27 15:05:14 -0700721#if CONFIG_LOOPFILTER_LEVEL
722 // For this experiment, we have four frame filter levels for different plane
723 // and direction. So, to support the per superblock update, we need to add
724 // a few more params as below.
725 // 0: delta loop filter level for y plane vertical
726 // 1: delta loop filter level for y plane horizontal
727 // 2: delta loop filter level for u plane
728 // 3: delta loop filter level for v plane
729 // To make it consistent with the reference to each filter level in segment,
730 // we need to -1, since
731 // SEG_LVL_ALT_LF_Y_V = 1;
732 // SEG_LVL_ALT_LF_Y_H = 2;
733 // SEG_LVL_ALT_LF_U = 3;
734 // SEG_LVL_ALT_LF_V = 4;
735 int prev_delta_lf[FRAME_LF_COUNT];
736 int curr_delta_lf[FRAME_LF_COUNT];
737#endif // CONFIG_LOOPFILTER_LEVEL
Fangwen Fu231fe422017-04-24 17:52:29 -0700738#endif
Yi Luof8e87b42017-04-14 17:20:27 -0700739#if CONFIG_ADAPT_SCAN
740 const EobThresholdMD *eob_threshold_md;
741#endif
Luc Trudeauf8164152017-04-11 16:20:51 -0400742
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000743 DECLARE_ALIGNED(16, uint8_t, seg_mask[2 * MAX_SB_SQUARE]);
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000744
Sarah Parker5c6744b2017-08-25 17:27:45 -0700745#if CONFIG_MRC_TX
746 uint8_t *mrc_mask;
747#endif // CONFIG_MRC_TX
748
Luc Trudeauf8164152017-04-11 16:20:51 -0400749#if CONFIG_CFL
750 CFL_CTX *cfl;
751#endif
Wei-Ting Lin482551b2017-08-03 12:29:24 -0700752
753#if CONFIG_NCOBMC_ADAPT_WEIGHT
754 uint8_t *ncobmc_pred_buf[MAX_MB_PLANE];
755 int ncobmc_pred_buf_stride[MAX_MB_PLANE];
756 SB_MI_BD sb_mi_bd;
757#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700758} MACROBLOCKD;
759
Yi Luo51281092017-06-26 16:36:15 -0700760static INLINE int get_bitdepth_data_path_index(const MACROBLOCKD *xd) {
761 return xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH ? 1 : 0;
762}
763
Yaowu Xuc27fc142016-08-22 16:08:15 -0700764static INLINE BLOCK_SIZE get_subsize(BLOCK_SIZE bsize,
765 PARTITION_TYPE partition) {
766 if (partition == PARTITION_INVALID)
Urvang Joshicb586f32016-09-20 11:36:33 -0700767 return BLOCK_INVALID;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700768 else
769 return subsize_lookup[partition][bsize];
770}
771
772static const TX_TYPE intra_mode_to_tx_type_context[INTRA_MODES] = {
773 DCT_DCT, // DC
774 ADST_DCT, // V
775 DCT_ADST, // H
776 DCT_DCT, // D45
777 ADST_ADST, // D135
778 ADST_DCT, // D117
779 DCT_ADST, // D153
780 DCT_ADST, // D207
781 ADST_DCT, // D63
Urvang Joshi6be4a542016-11-03 15:24:05 -0700782 ADST_ADST, // SMOOTH
Urvang Joshie6ca8e82017-03-15 14:57:41 -0700783#if CONFIG_SMOOTH_HV
784 ADST_DCT, // SMOOTH_V
785 DCT_ADST, // SMOOTH_H
786#endif // CONFIG_SMOOTH_HV
Urvang Joshi96d1c0a2017-10-10 13:15:32 -0700787 ADST_ADST, // PAETH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700788};
789
Jingning Hanb83e64b2017-03-01 14:52:04 -0800790#define USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4 1
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800791
Sarah Parker076437f2017-03-14 17:39:53 -0700792static INLINE int is_rect_tx(TX_SIZE tx_size) { return tx_size >= TX_SIZES; }
Sarah Parker076437f2017-03-14 17:39:53 -0700793
Rupert Swarbrickfcff0b22017-10-05 09:26:04 +0100794static INLINE int block_signals_txsize(BLOCK_SIZE bsize) {
Rupert Swarbrickfcff0b22017-10-05 09:26:04 +0100795 return bsize > BLOCK_4X4;
Rupert Swarbrickfcff0b22017-10-05 09:26:04 +0100796}
797
Sarah Parker2e08d962017-08-01 19:51:20 -0700798#if CONFIG_MRC_TX
799#define USE_MRC_INTRA 0
800#define USE_MRC_INTER 1
Sarah Parker99e7daa2017-08-29 10:30:13 -0700801#define SIGNAL_MRC_MASK_INTRA (USE_MRC_INTRA && 0)
802#define SIGNAL_MRC_MASK_INTER (USE_MRC_INTER && 1)
803#define SIGNAL_ANY_MRC_MASK (SIGNAL_MRC_MASK_INTRA || SIGNAL_MRC_MASK_INTER)
Sarah Parker2e08d962017-08-01 19:51:20 -0700804#endif // CONFIG_MRC_TX
805
Jingning Hanb83e64b2017-03-01 14:52:04 -0800806#if CONFIG_EXT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700807#define ALLOW_INTRA_EXT_TX 1
Yaowu Xuc27fc142016-08-22 16:08:15 -0700808
Hui Suddbcde22017-09-18 17:22:02 -0700809// Number of transform types in each set type
810static const int av1_num_ext_tx_set[EXT_TX_SET_TYPES] = {
811 1, 2,
Sarah Parker53f93db2017-07-11 17:20:04 -0700812#if CONFIG_MRC_TX
Hui Suddbcde22017-09-18 17:22:02 -0700813 2, 3,
814#endif // CONFIG_MRC_TX
815 5, 7, 12, 16,
816};
817
Hui Su4a9be2a2017-09-19 14:41:49 -0700818static const int av1_ext_tx_set_idx_to_type[2][AOMMAX(EXT_TX_SETS_INTRA,
819 EXT_TX_SETS_INTER)] = {
820 {
821 // Intra
822 EXT_TX_SET_DCTONLY, EXT_TX_SET_DTT4_IDTX_1DDCT, EXT_TX_SET_DTT4_IDTX,
Hui Suddbcde22017-09-18 17:22:02 -0700823#if CONFIG_MRC_TX
Hui Su4a9be2a2017-09-19 14:41:49 -0700824 EXT_TX_SET_MRC_DCT,
Hui Suddbcde22017-09-18 17:22:02 -0700825#endif // CONFIG_MRC_TX
Hui Su4a9be2a2017-09-19 14:41:49 -0700826 },
827 {
828 // Inter
829 EXT_TX_SET_DCTONLY, EXT_TX_SET_ALL16, EXT_TX_SET_DTT9_IDTX_1DDCT,
830 EXT_TX_SET_DCT_IDTX,
Hui Suddbcde22017-09-18 17:22:02 -0700831#if CONFIG_MRC_TX
Hui Su4a9be2a2017-09-19 14:41:49 -0700832 EXT_TX_SET_MRC_DCT_IDTX,
Sarah Parker53f93db2017-07-11 17:20:04 -0700833#endif // CONFIG_MRC_TX
Hui Su4a9be2a2017-09-19 14:41:49 -0700834 }
Hui Suddbcde22017-09-18 17:22:02 -0700835};
836
Hui Suddbcde22017-09-18 17:22:02 -0700837#if CONFIG_MRC_TX
838static const int av1_ext_tx_used[EXT_TX_SET_TYPES][TX_TYPES] = {
839 {
840 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
841 },
842 {
843 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
844 },
845 {
846 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
847 },
848 {
849 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
850 },
851 {
852 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
853 },
854 {
855 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0,
856 },
857 {
858 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
859 },
860 {
861 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0,
862 },
863};
864#else // CONFIG_MRC_TX
865static const int av1_ext_tx_used[EXT_TX_SET_TYPES][TX_TYPES] = {
866 {
867 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
868 },
869 {
870 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,
871 },
872 {
873 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,
874 },
875 {
876 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0,
877 },
878 {
879 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,
880 },
881 {
882 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
883 },
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800884};
Sarah Parker53f93db2017-07-11 17:20:04 -0700885#endif // CONFIG_MRC_TX
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800886
887static INLINE TxSetType get_ext_tx_set_type(TX_SIZE tx_size, BLOCK_SIZE bs,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800888 int is_inter, int use_reduced_set) {
Yue Chen56e226e2017-05-02 16:21:40 -0700889 const TX_SIZE tx_size_sqr_up = txsize_sqr_up_map[tx_size];
890 const TX_SIZE tx_size_sqr = txsize_sqr_map[tx_size];
Debargha Mukherjee6ea917e2017-10-19 09:31:29 -0700891#if USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4
Jingning Han1a00cff2016-12-28 14:53:14 -0800892 (void)bs;
Debargha Mukherjee570423c2017-10-01 00:35:20 -0700893 if (tx_size_sqr_up > TX_32X32) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -0800894#else
Debargha Mukherjee570423c2017-10-01 00:35:20 -0700895 if (tx_size_sqr_up > TX_32X32 || bs < BLOCK_8X8) return EXT_TX_SET_DCTONLY;
Debargha Mukherjee6ea917e2017-10-19 09:31:29 -0700896#endif // USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4
Sarah Parker5effe3f2017-02-23 12:49:10 -0800897 if (use_reduced_set)
898 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DTT4_IDTX;
Sarah Parker53f93db2017-07-11 17:20:04 -0700899#if CONFIG_MRC_TX
Sarah Parker2e08d962017-08-01 19:51:20 -0700900 if (tx_size == TX_32X32) {
901 if (is_inter && USE_MRC_INTER)
902 return EXT_TX_SET_MRC_DCT_IDTX;
903 else if (!is_inter && USE_MRC_INTRA)
904 return EXT_TX_SET_MRC_DCT;
905 }
Sarah Parker53f93db2017-07-11 17:20:04 -0700906#endif // CONFIG_MRC_TX
Nathan E. Eggef73e47e2017-10-22 06:41:55 -0400907#if CONFIG_DAALA_TX32
908 if (tx_size_sqr_up > TX_32X32)
909 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DCTONLY;
910 if (is_inter)
911 return (tx_size_sqr >= TX_16X16 ? EXT_TX_SET_DTT9_IDTX_1DDCT
912 : EXT_TX_SET_ALL16);
913 else
914 return (tx_size_sqr >= TX_16X16 ? EXT_TX_SET_DTT4_IDTX
915 : EXT_TX_SET_DTT4_IDTX_1DDCT);
916#endif
Yue Chen56e226e2017-05-02 16:21:40 -0700917 if (tx_size_sqr_up == TX_32X32)
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800918 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DCTONLY;
919 if (is_inter)
Yue Chen56e226e2017-05-02 16:21:40 -0700920 return (tx_size_sqr == TX_16X16 ? EXT_TX_SET_DTT9_IDTX_1DDCT
921 : EXT_TX_SET_ALL16);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800922 else
Yue Chen56e226e2017-05-02 16:21:40 -0700923 return (tx_size_sqr == TX_16X16 ? EXT_TX_SET_DTT4_IDTX
924 : EXT_TX_SET_DTT4_IDTX_1DDCT);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800925}
926
Hui Su4a9be2a2017-09-19 14:41:49 -0700927// Maps tx set types to the indices.
928static const int ext_tx_set_index[2][EXT_TX_SET_TYPES] = {
929 {
930 // Intra
931 0, -1,
932#if CONFIG_MRC_TX
933 3, -1,
934#endif // CONFIG_MRC_TX
935 2, 1, -1, -1,
936 },
937 {
938 // Inter
939 0, 3,
940#if CONFIG_MRC_TX
941 -1, 4,
942#endif // CONFIG_MRC_TX
943 -1, -1, 2, 1,
944 },
945};
946
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800947static INLINE int get_ext_tx_set(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800948 int use_reduced_set) {
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800949 const TxSetType set_type =
Sarah Parker5effe3f2017-02-23 12:49:10 -0800950 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Hui Su4a9be2a2017-09-19 14:41:49 -0700951 return ext_tx_set_index[is_inter][set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700952}
953
Sarah Parkere68a3e42017-02-16 14:03:24 -0800954static INLINE int get_ext_tx_types(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800955 int use_reduced_set) {
956 const int set_type =
957 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Hui Suddbcde22017-09-18 17:22:02 -0700958 return av1_num_ext_tx_set[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700959}
960
Lester Lu432012f2017-08-17 14:39:29 -0700961#if CONFIG_LGT_FROM_PRED
962static INLINE int is_lgt_allowed(PREDICTION_MODE mode, TX_SIZE tx_size) {
963 if (!LGT_FROM_PRED_INTRA && !is_inter_mode(mode)) return 0;
964 if (!LGT_FROM_PRED_INTER && is_inter_mode(mode)) return 0;
965
966 switch (mode) {
967 case D45_PRED:
968 case D63_PRED:
969 case D117_PRED:
970 case V_PRED:
971#if CONFIG_SMOOTH_HV
972 case SMOOTH_V_PRED:
973#endif
974 return tx_size_wide[tx_size] <= 8;
975 case D135_PRED:
976 case D153_PRED:
977 case D207_PRED:
978 case H_PRED:
979#if CONFIG_SMOOTH_HV
980 case SMOOTH_H_PRED:
981#endif
982 return tx_size_high[tx_size] <= 8;
983 case DC_PRED:
984 case SMOOTH_PRED: return 0;
Urvang Joshi96d1c0a2017-10-10 13:15:32 -0700985 case PAETH_PRED:
Lester Lu432012f2017-08-17 14:39:29 -0700986 default: return tx_size_wide[tx_size] <= 8 || tx_size_high[tx_size] <= 8;
987 }
988}
989#endif // CONFIG_LGT_FROM_PRED
990
Yaowu Xuc27fc142016-08-22 16:08:15 -0700991static INLINE int is_rect_tx_allowed_bsize(BLOCK_SIZE bsize) {
Rupert Swarbrick93c39e92017-07-12 11:11:02 +0100992 static const char LUT[BLOCK_SIZES_ALL] = {
Jingning Hanf4e097b2017-01-20 09:23:58 -0800993 0, // BLOCK_2X2
994 0, // BLOCK_2X4
995 0, // BLOCK_4X2
Yaowu Xuc27fc142016-08-22 16:08:15 -0700996 0, // BLOCK_4X4
997 1, // BLOCK_4X8
998 1, // BLOCK_8X4
999 0, // BLOCK_8X8
1000 1, // BLOCK_8X16
1001 1, // BLOCK_16X8
1002 0, // BLOCK_16X16
1003 1, // BLOCK_16X32
1004 1, // BLOCK_32X16
1005 0, // BLOCK_32X32
Debargha Mukherjee1a86b012017-10-02 23:58:11 -07001006 1, // BLOCK_32X64
1007 1, // BLOCK_64X32
Yaowu Xuc27fc142016-08-22 16:08:15 -07001008 0, // BLOCK_64X64
1009#if CONFIG_EXT_PARTITION
1010 0, // BLOCK_64X128
1011 0, // BLOCK_128X64
1012 0, // BLOCK_128X128
1013#endif // CONFIG_EXT_PARTITION
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001014 0, // BLOCK_4X16
1015 0, // BLOCK_16X4
1016 0, // BLOCK_8X32
1017 0, // BLOCK_32X8
Rupert Swarbrick72678572017-08-02 12:05:26 +01001018 0, // BLOCK_16X64
1019 0, // BLOCK_64X16
Rupert Swarbrick2fa6e1c2017-09-11 12:38:10 +01001020#if CONFIG_EXT_PARTITION
1021 0, // BLOCK_32X128
1022 0, // BLOCK_128X32
1023#endif // CONFIG_EXT_PARTITION
Yaowu Xuc27fc142016-08-22 16:08:15 -07001024 };
1025
1026 return LUT[bsize];
1027}
1028
Yue Chen49587a72016-09-28 17:09:47 -07001029static INLINE int is_rect_tx_allowed(const MACROBLOCKD *xd,
1030 const MB_MODE_INFO *mbmi) {
Urvang Joshifeb925f2016-12-05 10:37:29 -08001031 return is_rect_tx_allowed_bsize(mbmi->sb_type) &&
Yue Chen49587a72016-09-28 17:09:47 -07001032 !xd->lossless[mbmi->segment_id];
Yaowu Xuc27fc142016-08-22 16:08:15 -07001033}
Yue Chend6bdd462017-07-19 16:05:43 -07001034#endif // CONFIG_EXT_TX
Yue Chen56e226e2017-05-02 16:21:40 -07001035
Sebastien Alaiwanfb838772017-10-24 12:02:54 +02001036#if CONFIG_RECT_TX_EXT
Yue Chen56e226e2017-05-02 16:21:40 -07001037static INLINE int is_quarter_tx_allowed_bsize(BLOCK_SIZE bsize) {
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001038 static const char LUT_QTTX[BLOCK_SIZES_ALL] = {
Yue Chen56e226e2017-05-02 16:21:40 -07001039 0, // BLOCK_2X2
1040 0, // BLOCK_2X4
1041 0, // BLOCK_4X2
Yue Chen56e226e2017-05-02 16:21:40 -07001042 0, // BLOCK_4X4
1043 0, // BLOCK_4X8
1044 0, // BLOCK_8X4
1045 0, // BLOCK_8X8
1046 1, // BLOCK_8X16
1047 1, // BLOCK_16X8
1048 0, // BLOCK_16X16
1049 0, // BLOCK_16X32
1050 0, // BLOCK_32X16
1051 0, // BLOCK_32X32
1052 0, // BLOCK_32X64
1053 0, // BLOCK_64X32
1054 0, // BLOCK_64X64
1055#if CONFIG_EXT_PARTITION
1056 0, // BLOCK_64X128
1057 0, // BLOCK_128X64
1058 0, // BLOCK_128X128
1059#endif // CONFIG_EXT_PARTITION
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001060 0, // BLOCK_4X16
1061 0, // BLOCK_16X4
1062 0, // BLOCK_8X32
1063 0, // BLOCK_32X8
Rupert Swarbrick72678572017-08-02 12:05:26 +01001064 0, // BLOCK_16X64
1065 0, // BLOCK_64X16
Rupert Swarbrick2fa6e1c2017-09-11 12:38:10 +01001066#if CONFIG_EXT_PARTITION
1067 0, // BLOCK_32X128
1068 0, // BLOCK_128X32
1069#endif // CONFIG_EXT_PARTITION
Yue Chen56e226e2017-05-02 16:21:40 -07001070 };
1071
1072 return LUT_QTTX[bsize];
1073}
1074
1075static INLINE int is_quarter_tx_allowed(const MACROBLOCKD *xd,
1076 const MB_MODE_INFO *mbmi,
1077 int is_inter) {
1078 return is_quarter_tx_allowed_bsize(mbmi->sb_type) && is_inter &&
1079 !xd->lossless[mbmi->segment_id];
1080}
Yue Chend6bdd462017-07-19 16:05:43 -07001081#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -07001082
1083static INLINE TX_SIZE tx_size_from_tx_mode(BLOCK_SIZE bsize, TX_MODE tx_mode,
1084 int is_inter) {
1085 const TX_SIZE largest_tx_size = tx_mode_to_biggest_tx_size[tx_mode];
Urvang Joshifeb925f2016-12-05 10:37:29 -08001086 const TX_SIZE max_rect_tx_size = max_txsize_rect_lookup[bsize];
Urvang Joshifeb925f2016-12-05 10:37:29 -08001087 (void)is_inter;
Urvang Joshifeb925f2016-12-05 10:37:29 -08001088 if (bsize == BLOCK_4X4)
1089 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
Urvang Joshifeb925f2016-12-05 10:37:29 -08001090 if (txsize_sqr_map[max_rect_tx_size] <= largest_tx_size)
1091 return max_rect_tx_size;
1092 else
1093 return largest_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -07001094}
1095
hui su5db97432016-10-14 16:10:14 -07001096#if CONFIG_EXT_INTRA
hui su5db97432016-10-14 16:10:14 -07001097extern const int16_t dr_intra_derivative[90];
hui su02c79742017-05-16 17:19:04 -07001098static const uint8_t mode_to_angle_map[] = {
Joe Young28fcbfe2017-11-01 09:13:15 -07001099 0, 90, 180, 45, 135, 113, 157, 203, 67, 0, 0,
hui su02c79742017-05-16 17:19:04 -07001100#if CONFIG_SMOOTH_HV
1101 0, 0,
1102#endif // CONFIG_SMOOTH_HV
hui su5db97432016-10-14 16:10:14 -07001103};
Yaowu Xuc27fc142016-08-22 16:08:15 -07001104#endif // CONFIG_EXT_INTRA
1105
Monty Montgomerycb55dad2017-07-11 16:59:52 -04001106#if CONFIG_DCT_ONLY
1107#define FIXED_TX_TYPE 1
1108#else
Yaowu Xuc27fc142016-08-22 16:08:15 -07001109#define FIXED_TX_TYPE 0
Monty Montgomerycb55dad2017-07-11 16:59:52 -04001110#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -07001111
Angie Chiang752ccce2017-04-09 13:41:13 -07001112// Converts block_index for given transform size to index of the block in raster
1113// order.
1114static INLINE int av1_block_index_to_raster_order(TX_SIZE tx_size,
1115 int block_idx) {
1116 // For transform size 4x8, the possible block_idx values are 0 & 2, because
1117 // block_idx values are incremented in steps of size 'tx_width_unit x
1118 // tx_height_unit'. But, for this transform size, block_idx = 2 corresponds to
1119 // block number 1 in raster order, inside an 8x8 MI block.
1120 // For any other transform size, the two indices are equivalent.
1121 return (tx_size == TX_4X8 && block_idx == 2) ? 1 : block_idx;
1122}
1123
1124// Inverse of above function.
1125// Note: only implemented for transform sizes 4x4, 4x8 and 8x4 right now.
1126static INLINE int av1_raster_order_to_block_index(TX_SIZE tx_size,
1127 int raster_order) {
1128 assert(tx_size == TX_4X4 || tx_size == TX_4X8 || tx_size == TX_8X4);
1129 // We ensure that block indices are 0 & 2 if tx size is 4x8 or 8x4.
1130 return (tx_size == TX_4X4) ? raster_order : (raster_order > 0) ? 2 : 0;
1131}
1132
Yaowu Xuc27fc142016-08-22 16:08:15 -07001133static INLINE TX_TYPE get_default_tx_type(PLANE_TYPE plane_type,
1134 const MACROBLOCKD *xd, int block_idx,
1135 TX_SIZE tx_size) {
1136 const MB_MODE_INFO *const mbmi = &xd->mi[0]->mbmi;
1137
Monty Montgomerycb55dad2017-07-11 16:59:52 -04001138 if (CONFIG_DCT_ONLY || is_inter_block(mbmi) || plane_type != PLANE_TYPE_Y ||
Yaowu Xuc27fc142016-08-22 16:08:15 -07001139 xd->lossless[mbmi->segment_id] || tx_size >= TX_32X32)
1140 return DCT_DCT;
1141
1142 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
1143 ? get_y_mode(xd->mi[0], block_idx)
Luc Trudeaud6d9eee2017-07-12 12:36:50 -04001144 : get_uv_mode(mbmi->uv_mode)];
Yaowu Xuc27fc142016-08-22 16:08:15 -07001145}
1146
Sarah Parker90024e42017-10-06 16:50:47 -07001147static INLINE BLOCK_SIZE
1148get_plane_block_size(BLOCK_SIZE bsize, const struct macroblockd_plane *pd) {
1149 return ss_size_lookup[bsize][pd->subsampling_x][pd->subsampling_y];
1150}
1151
hui su45b64752017-07-12 16:54:35 -07001152static INLINE TX_TYPE av1_get_tx_type(PLANE_TYPE plane_type,
Jingning Han19b5c8f2017-07-06 15:10:12 -07001153 const MACROBLOCKD *xd, int blk_row,
1154 int blk_col, int block, TX_SIZE tx_size) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001155 const MODE_INFO *const mi = xd->mi[0];
1156 const MB_MODE_INFO *const mbmi = &mi->mbmi;
Jingning Han19b5c8f2017-07-06 15:10:12 -07001157 (void)blk_row;
1158 (void)blk_col;
Alex Conversedaa15e42017-05-02 14:27:16 -07001159#if CONFIG_INTRABC && (!CONFIG_EXT_TX || CONFIG_TXK_SEL)
1160 // TODO(aconverse@google.com): Handle INTRABC + EXT_TX + TXK_SEL
Alex Converse28744302017-04-13 14:46:22 -07001161 if (is_intrabc_block(mbmi)) return DCT_DCT;
Alex Conversedaa15e42017-05-02 14:27:16 -07001162#endif // CONFIG_INTRABC && (!CONFIG_EXT_TX || CONFIG_TXK_SEL)
hui su45b64752017-07-12 16:54:35 -07001163
Sarah Parker90024e42017-10-06 16:50:47 -07001164#if CONFIG_EXT_TX
1165 const struct macroblockd_plane *const pd = &xd->plane[plane_type];
1166 const BLOCK_SIZE plane_bsize = get_plane_block_size(mbmi->sb_type, pd);
1167 // TODO(sarahparker) This assumes reduced_tx_set_used == 0. I will do a
1168 // follow up refactor to make the actual value of reduced_tx_set_used
1169 // within this function.
1170 const TxSetType tx_set_type =
1171 get_ext_tx_set_type(tx_size, plane_bsize, is_inter_block(mbmi), 0);
1172 if (is_inter_block(mbmi) && !av1_ext_tx_used[tx_set_type][mbmi->tx_type])
1173 return DCT_DCT;
1174#endif // CONFIG_EXT_TX
1175
hui su45b64752017-07-12 16:54:35 -07001176#if CONFIG_TXK_SEL
1177 TX_TYPE tx_type;
Jingning Han19b5c8f2017-07-06 15:10:12 -07001178 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] >= TX_32X32) {
hui su45b64752017-07-12 16:54:35 -07001179 tx_type = DCT_DCT;
1180 } else {
Jingning Han19b5c8f2017-07-06 15:10:12 -07001181 if (plane_type == PLANE_TYPE_Y)
1182 tx_type = mbmi->txk_type[(blk_row << 4) + blk_col];
1183 else if (is_inter_block(mbmi))
1184 tx_type = mbmi->txk_type[(blk_row << 5) + (blk_col << 1)];
1185 else
1186 tx_type = intra_mode_to_tx_type_context[mbmi->uv_mode];
hui su45b64752017-07-12 16:54:35 -07001187 }
1188 assert(tx_type >= DCT_DCT && tx_type < TX_TYPES);
Sarah Parker90024e42017-10-06 16:50:47 -07001189#if CONFIG_EXT_TX
1190 if (is_inter_block(mbmi) && !av1_ext_tx_used[tx_set_type][tx_type])
1191 return DCT_DCT;
1192#endif // CONFIG_EXT_TX
hui su45b64752017-07-12 16:54:35 -07001193 return tx_type;
1194#endif // CONFIG_TXK_SEL
1195
James Zern7cdaa602017-04-20 20:12:46 -07001196#if FIXED_TX_TYPE
Angie Chiangc2ebfbf2017-04-15 13:56:58 -07001197 const int block_raster_idx = av1_block_index_to_raster_order(tx_size, block);
James Zern7cdaa602017-04-20 20:12:46 -07001198 return get_default_tx_type(plane_type, xd, block_raster_idx, tx_size);
hui su45b64752017-07-12 16:54:35 -07001199#endif // FIXED_TX_TYPE
1200
1201#if CONFIG_EXT_TX
Sarah Parker53f93db2017-07-11 17:20:04 -07001202#if CONFIG_MRC_TX
1203 if (mbmi->tx_type == MRC_DCT) {
Sarah Parker2e08d962017-08-01 19:51:20 -07001204 assert(((is_inter_block(mbmi) && USE_MRC_INTER) ||
1205 (!is_inter_block(mbmi) && USE_MRC_INTRA)) &&
1206 "INVALID BLOCK TYPE FOR MRC_DCT");
Sarah Parker53f93db2017-07-11 17:20:04 -07001207 if (plane_type == PLANE_TYPE_Y) {
1208 assert(tx_size == TX_32X32);
1209 return mbmi->tx_type;
1210 }
1211 return DCT_DCT;
1212 }
1213#endif // CONFIG_MRC_TX
Nathan E. Egge856d1792017-10-26 17:55:20 -04001214#if CONFIG_DAALA_TX32
1215 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] > TX_32X32)
1216#else
Yaowu Xuc27fc142016-08-22 16:08:15 -07001217 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] > TX_32X32 ||
1218 (txsize_sqr_map[tx_size] >= TX_32X32 && !is_inter_block(mbmi)))
Nathan E. Egge856d1792017-10-26 17:55:20 -04001219#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -07001220 return DCT_DCT;
Debargha Mukherjee6ea917e2017-10-19 09:31:29 -07001221 if (plane_type == PLANE_TYPE_Y) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001222#if !ALLOW_INTRA_EXT_TX
Debargha Mukherjee6ea917e2017-10-19 09:31:29 -07001223 if (is_inter_block(mbmi))
Yaowu Xuc27fc142016-08-22 16:08:15 -07001224#endif // ALLOW_INTRA_EXT_TX
Debargha Mukherjee6ea917e2017-10-19 09:31:29 -07001225 return mbmi->tx_type;
Yaowu Xuc27fc142016-08-22 16:08:15 -07001226 }
1227
Debargha Mukherjee6ea917e2017-10-19 09:31:29 -07001228 if (is_inter_block(mbmi)) {
1229 // UV Inter only
1230 return (mbmi->tx_type == IDTX && txsize_sqr_map[tx_size] >= TX_32X32)
1231 ? DCT_DCT
1232 : mbmi->tx_type;
1233 }
1234
Sarah Parker90024e42017-10-06 16:50:47 -07001235 // UV Intra only
Thomas Daedeb7e72f32017-04-26 13:40:31 -07001236 (void)block;
Sarah Parker90024e42017-10-06 16:50:47 -07001237 TX_TYPE intra_type =
1238 intra_mode_to_tx_type_context[get_uv_mode(mbmi->uv_mode)];
1239 if (!av1_ext_tx_used[tx_set_type][intra_type]) return DCT_DCT;
1240 return intra_type;
Debargha Mukherjee6ea917e2017-10-19 09:31:29 -07001241#else // CONFIG_EXT_TX
Angie Chiang752ccce2017-04-09 13:41:13 -07001242 (void)block;
Sarah Parker53f93db2017-07-11 17:20:04 -07001243#if CONFIG_MRC_TX
1244 if (mbmi->tx_type == MRC_DCT) {
1245 if (plane_type == PLANE_TYPE_Y && !xd->lossless[mbmi->segment_id]) {
1246 assert(tx_size == TX_32X32);
1247 return mbmi->tx_type;
1248 }
1249 return DCT_DCT;
1250 }
1251#endif // CONFIG_MRC_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -07001252 if (plane_type != PLANE_TYPE_Y || xd->lossless[mbmi->segment_id] ||
1253 txsize_sqr_map[tx_size] >= TX_32X32)
1254 return DCT_DCT;
1255 return mbmi->tx_type;
1256#endif // CONFIG_EXT_TX
1257}
1258
Yaowu Xuf883b422016-08-30 14:01:10 -07001259void av1_setup_block_planes(MACROBLOCKD *xd, int ss_x, int ss_y);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001260
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001261static INLINE int tx_size_to_depth(TX_SIZE tx_size) {
Timothy B. Terriberryfe0fb1d2017-05-18 12:15:16 -07001262 return (int)(tx_size - TX_SIZE_LUMA_MIN);
Jingning Han4e1737a2016-10-25 16:05:02 -07001263}
1264
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001265static INLINE TX_SIZE depth_to_tx_size(int depth) {
Timothy B. Terriberryfe0fb1d2017-05-18 12:15:16 -07001266 return (TX_SIZE)(depth + TX_SIZE_LUMA_MIN);
Jingning Han4e1737a2016-10-25 16:05:02 -07001267}
1268
hui su0c6244b2017-07-12 17:11:43 -07001269static INLINE TX_SIZE av1_get_uv_tx_size(const MB_MODE_INFO *mbmi,
1270 const struct macroblockd_plane *pd) {
hui su0c6244b2017-07-12 17:11:43 -07001271 const TX_SIZE uv_txsize =
1272 uv_txsize_lookup[mbmi->sb_type][mbmi->tx_size][pd->subsampling_x]
1273 [pd->subsampling_y];
Debargha Mukherjee2f123402016-08-30 17:43:38 -07001274 assert(uv_txsize != TX_INVALID);
1275 return uv_txsize;
Yaowu Xuc27fc142016-08-22 16:08:15 -07001276}
1277
hui su0c6244b2017-07-12 17:11:43 -07001278static INLINE TX_SIZE av1_get_tx_size(int plane, const MACROBLOCKD *xd) {
Angie Chiang80b82262017-02-24 11:39:47 -08001279 const MB_MODE_INFO *mbmi = &xd->mi[0]->mbmi;
hui su0c6244b2017-07-12 17:11:43 -07001280 if (plane == 0) return mbmi->tx_size;
Angie Chiang80b82262017-02-24 11:39:47 -08001281 const MACROBLOCKD_PLANE *pd = &xd->plane[plane];
hui su0c6244b2017-07-12 17:11:43 -07001282 return av1_get_uv_tx_size(mbmi, pd);
Angie Chiang80b82262017-02-24 11:39:47 -08001283}
1284
Timothy B. Terriberrya2d5cde2017-05-10 18:33:50 -07001285void av1_reset_skip_context(MACROBLOCKD *xd, int mi_row, int mi_col,
1286 BLOCK_SIZE bsize);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001287
1288typedef void (*foreach_transformed_block_visitor)(int plane, int block,
1289 int blk_row, int blk_col,
1290 BLOCK_SIZE plane_bsize,
1291 TX_SIZE tx_size, void *arg);
1292
Yaowu Xuf883b422016-08-30 14:01:10 -07001293void av1_foreach_transformed_block_in_plane(
Yaowu Xuc27fc142016-08-22 16:08:15 -07001294 const MACROBLOCKD *const xd, BLOCK_SIZE bsize, int plane,
1295 foreach_transformed_block_visitor visit, void *arg);
1296
Angie Chiang0397eda2017-03-15 16:57:14 -07001297#if CONFIG_LV_MAP
1298void av1_foreach_transformed_block(const MACROBLOCKD *const xd,
Jingning Han94652b82017-04-04 09:45:02 -07001299 BLOCK_SIZE bsize, int mi_row, int mi_col,
Angie Chiang0397eda2017-03-15 16:57:14 -07001300 foreach_transformed_block_visitor visit,
1301 void *arg);
1302#endif
1303
Yaowu Xuf883b422016-08-30 14:01:10 -07001304void av1_set_contexts(const MACROBLOCKD *xd, struct macroblockd_plane *pd,
Jingning Haneee43152016-12-05 09:58:45 -08001305 int plane, TX_SIZE tx_size, int has_eob, int aoff,
1306 int loff);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001307
Yaowu Xuc27fc142016-08-22 16:08:15 -07001308static INLINE int is_interintra_allowed_bsize(const BLOCK_SIZE bsize) {
Yue Chen9ddd4092017-10-30 16:13:39 -07001309 return (bsize >= BLOCK_8X8) && (bsize <= BLOCK_32X32);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001310}
1311
1312static INLINE int is_interintra_allowed_mode(const PREDICTION_MODE mode) {
1313 return (mode >= NEARESTMV) && (mode <= NEWMV);
1314}
1315
1316static INLINE int is_interintra_allowed_ref(const MV_REFERENCE_FRAME rf[2]) {
1317 return (rf[0] > INTRA_FRAME) && (rf[1] <= INTRA_FRAME);
1318}
1319
1320static INLINE int is_interintra_allowed(const MB_MODE_INFO *mbmi) {
1321 return is_interintra_allowed_bsize(mbmi->sb_type) &&
1322 is_interintra_allowed_mode(mbmi->mode) &&
1323 is_interintra_allowed_ref(mbmi->ref_frame);
1324}
1325
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001326static INLINE int is_interintra_allowed_bsize_group(int group) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001327 int i;
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001328 for (i = 0; i < BLOCK_SIZES_ALL; i++) {
Urvang Joshicb586f32016-09-20 11:36:33 -07001329 if (size_group_lookup[i] == group &&
1330 is_interintra_allowed_bsize((BLOCK_SIZE)i)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001331 return 1;
Urvang Joshicb586f32016-09-20 11:36:33 -07001332 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001333 }
1334 return 0;
1335}
1336
1337static INLINE int is_interintra_pred(const MB_MODE_INFO *mbmi) {
1338 return (mbmi->ref_frame[1] == INTRA_FRAME) && is_interintra_allowed(mbmi);
1339}
Yaowu Xuc27fc142016-08-22 16:08:15 -07001340
Sarah Parker106b3cb2017-04-21 12:13:37 -07001341static INLINE int get_vartx_max_txsize(const MB_MODE_INFO *const mbmi,
Rupert Swarbrick4e7b7d62017-09-28 17:30:44 +01001342 BLOCK_SIZE bsize, int subsampled) {
Sarah Parker106b3cb2017-04-21 12:13:37 -07001343 (void)mbmi;
Rupert Swarbrick4e7b7d62017-09-28 17:30:44 +01001344 TX_SIZE max_txsize = max_txsize_rect_lookup[bsize];
Rupert Swarbrick4e7b7d62017-09-28 17:30:44 +01001345
1346#if CONFIG_EXT_PARTITION && CONFIG_TX64X64
1347 // The decoder is designed so that it can process 64x64 luma pixels at a
1348 // time. If this is a chroma plane with subsampling and bsize corresponds to
1349 // a subsampled BLOCK_128X128 then the lookup above will give TX_64X64. That
1350 // mustn't be used for the subsampled plane (because it would be bigger than
1351 // a 64x64 luma block) so we round down to TX_32X32.
Debargha Mukherjee1fa24462017-10-19 14:33:39 -07001352 if (subsampled && txsize_sqr_up_map[max_txsize] == TX_64X64) {
1353 max_txsize = TX_32X32;
1354 }
Rupert Swarbrick4e7b7d62017-09-28 17:30:44 +01001355#else
1356 (void)subsampled;
1357#endif
1358
1359 return max_txsize;
Sarah Parker106b3cb2017-04-21 12:13:37 -07001360}
Sarah Parker106b3cb2017-04-21 12:13:37 -07001361
Yue Chencb60b182016-10-13 15:18:22 -07001362static INLINE int is_motion_variation_allowed_bsize(BLOCK_SIZE bsize) {
Debargha Mukherjeec17a4432017-08-28 22:22:45 -07001363 return AOMMIN(block_size_wide[bsize], block_size_high[bsize]) >= 8;
Yue Chencb60b182016-10-13 15:18:22 -07001364}
1365
Yue Chen8636da62017-04-03 01:23:44 -07001366static INLINE int is_motion_variation_allowed_compound(
1367 const MB_MODE_INFO *mbmi) {
Sebastien Alaiwan0bdea0d2017-10-02 15:15:05 +02001368#if CONFIG_COMPOUND_SINGLEREF
Zoe Liu85b66462017-04-20 14:28:19 -07001369 if (!has_second_ref(mbmi) && !is_inter_singleref_comp_mode(mbmi->mode))
1370#else
Yue Chen8636da62017-04-03 01:23:44 -07001371 if (!has_second_ref(mbmi))
Sebastien Alaiwan0bdea0d2017-10-02 15:15:05 +02001372#endif // CONFIG_COMPOUND_SINGLEREF
Yue Chen8636da62017-04-03 01:23:44 -07001373 return 1;
1374 else
1375 return 0;
1376}
1377
Yue Chen1bd42be2017-03-15 18:07:04 -07001378// input: log2 of length, 0(4), 1(8), ...
1379static const int max_neighbor_obmc[6] = { 0, 1, 2, 3, 4, 4 };
1380
Yue Chen5329a2b2017-02-28 17:33:00 +08001381static INLINE int check_num_overlappable_neighbors(const MB_MODE_INFO *mbmi) {
Yue Chen1bd42be2017-03-15 18:07:04 -07001382 return !(mbmi->overlappable_neighbors[0] == 0 &&
1383 mbmi->overlappable_neighbors[1] == 0);
Yue Chen5329a2b2017-02-28 17:33:00 +08001384}
Wei-Ting Lin20885282017-08-28 17:18:18 -07001385#if CONFIG_NCOBMC_ADAPT_WEIGHT
1386static INLINE NCOBMC_MODE ncobmc_mode_allowed_bsize(BLOCK_SIZE bsize) {
1387 if (bsize < BLOCK_8X8 || bsize >= BLOCK_64X64)
1388 return NO_OVERLAP;
1389 else
1390 return MAX_NCOBMC_MODES;
1391}
1392#endif // CONFIG_NCOBMC_ADAPT_WEIGHT
Yue Chen5329a2b2017-02-28 17:33:00 +08001393
Sebastien Alaiwan48795802017-10-30 12:07:13 +01001394static INLINE MOTION_MODE
1395motion_mode_allowed(int block, const WarpedMotionParams *gm_params,
Sebastien Alaiwan1f56b8e2017-10-31 17:37:16 +01001396 const MACROBLOCKD *xd, const MODE_INFO *mi) {
Sarah Parker19234cc2017-03-10 16:43:25 -08001397 const MB_MODE_INFO *mbmi = &mi->mbmi;
RogerZhou3b635242017-09-19 10:06:46 -07001398#if CONFIG_AMVR
RogerZhou10a03802017-10-26 11:49:48 -07001399 if (xd->cur_frame_force_integer_mv == 0) {
RogerZhou3b635242017-09-19 10:06:46 -07001400#endif
RogerZhou3b635242017-09-19 10:06:46 -07001401 const TransformationType gm_type = gm_params[mbmi->ref_frame[0]].wmtype;
1402 if (is_global_mv_block(mi, block, gm_type)) return SIMPLE_TRANSLATION;
RogerZhou3b635242017-09-19 10:06:46 -07001403#if CONFIG_AMVR
1404 }
1405#endif
Yue Chen69f18e12016-09-08 14:48:15 -07001406 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
Yue Chen8636da62017-04-03 01:23:44 -07001407 is_inter_mode(mbmi->mode) && mbmi->ref_frame[1] != INTRA_FRAME &&
1408 is_motion_variation_allowed_compound(mbmi)) {
Yue Chen5329a2b2017-02-28 17:33:00 +08001409 if (!check_num_overlappable_neighbors(mbmi)) return SIMPLE_TRANSLATION;
Yue Chen52c51732017-07-11 15:08:30 -07001410 if (!has_second_ref(mbmi) && mbmi->num_proj_ref[0] >= 1 &&
Wei-Ting Lin20885282017-08-28 17:18:18 -07001411 !av1_is_scaled(&(xd->block_refs[0]->sf))) {
RogerZhou3b635242017-09-19 10:06:46 -07001412#if CONFIG_AMVR
RogerZhou10a03802017-10-26 11:49:48 -07001413 if (xd->cur_frame_force_integer_mv) {
RogerZhou3b635242017-09-19 10:06:46 -07001414 return OBMC_CAUSAL;
1415 }
1416#endif
Yue Chen69f18e12016-09-08 14:48:15 -07001417 return WARPED_CAUSAL;
Hui Su12231bd2017-09-07 18:01:15 -07001418 }
RogerZhou3b635242017-09-19 10:06:46 -07001419
Wei-Ting Lin20885282017-08-28 17:18:18 -07001420#if CONFIG_NCOBMC_ADAPT_WEIGHT
Hui Su12231bd2017-09-07 18:01:15 -07001421 if (ncobmc_mode_allowed_bsize(mbmi->sb_type) < NO_OVERLAP)
1422 return NCOBMC_ADAPT_WEIGHT;
1423 else
Wei-Ting Lin20885282017-08-28 17:18:18 -07001424#endif
Hui Su12231bd2017-09-07 18:01:15 -07001425 return OBMC_CAUSAL;
Yue Chen69f18e12016-09-08 14:48:15 -07001426 } else {
1427 return SIMPLE_TRANSLATION;
1428 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001429}
1430
Sebastien Alaiwan48795802017-10-30 12:07:13 +01001431static INLINE void assert_motion_mode_valid(MOTION_MODE mode, int block,
Sarah Parker19234cc2017-03-10 16:43:25 -08001432 const WarpedMotionParams *gm_params,
Yue Chen52c51732017-07-11 15:08:30 -07001433 const MACROBLOCKD *xd,
Sarah Parker19234cc2017-03-10 16:43:25 -08001434 const MODE_INFO *mi) {
Sebastien Alaiwan48795802017-10-30 12:07:13 +01001435 const MOTION_MODE last_motion_mode_allowed =
Sebastien Alaiwan1f56b8e2017-10-31 17:37:16 +01001436 motion_mode_allowed(block, gm_params, xd, mi);
Wei-Ting Lin20885282017-08-28 17:18:18 -07001437
Sarah Parker19234cc2017-03-10 16:43:25 -08001438 // Check that the input mode is not illegal
1439 if (last_motion_mode_allowed < mode)
1440 assert(0 && "Illegal motion mode selected");
1441}
1442
Yaowu Xuc27fc142016-08-22 16:08:15 -07001443static INLINE int is_neighbor_overlappable(const MB_MODE_INFO *mbmi) {
1444 return (is_inter_block(mbmi));
1445}
Yaowu Xuc27fc142016-08-22 16:08:15 -07001446
Hui Sue87fb232017-10-05 15:00:15 -07001447static INLINE int av1_allow_palette(int allow_screen_content_tools,
1448 BLOCK_SIZE sb_type) {
1449 return allow_screen_content_tools && sb_type >= BLOCK_8X8 &&
1450 sb_type <= BLOCK_LARGEST;
1451}
1452
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001453// Returns sub-sampled dimensions of the given block.
1454// The output values for 'rows_within_bounds' and 'cols_within_bounds' will
RogerZhou3b635242017-09-19 10:06:46 -07001455// differ from 'height' and 'width' when part of the block is outside the
1456// right
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001457// and/or bottom image boundary.
1458static INLINE void av1_get_block_dimensions(BLOCK_SIZE bsize, int plane,
1459 const MACROBLOCKD *xd, int *width,
1460 int *height,
1461 int *rows_within_bounds,
1462 int *cols_within_bounds) {
1463 const int block_height = block_size_high[bsize];
1464 const int block_width = block_size_wide[bsize];
1465 const int block_rows = (xd->mb_to_bottom_edge >= 0)
1466 ? block_height
1467 : (xd->mb_to_bottom_edge >> 3) + block_height;
1468 const int block_cols = (xd->mb_to_right_edge >= 0)
1469 ? block_width
1470 : (xd->mb_to_right_edge >> 3) + block_width;
1471 const struct macroblockd_plane *const pd = &xd->plane[plane];
1472 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_x == 0));
1473 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_y == 0));
1474 assert(block_width >= block_cols);
1475 assert(block_height >= block_rows);
1476 if (width) *width = block_width >> pd->subsampling_x;
1477 if (height) *height = block_height >> pd->subsampling_y;
1478 if (rows_within_bounds) *rows_within_bounds = block_rows >> pd->subsampling_y;
1479 if (cols_within_bounds) *cols_within_bounds = block_cols >> pd->subsampling_x;
1480}
1481
Sarah Parkerefd8af22017-08-25 16:36:06 -07001482/* clang-format off */
1483typedef aom_cdf_prob (*MapCdf)[PALETTE_COLOR_INDEX_CONTEXTS]
1484 [CDF_SIZE(PALETTE_COLORS)];
1485typedef const int (*ColorCost)[PALETTE_SIZES][PALETTE_COLOR_INDEX_CONTEXTS]
1486 [PALETTE_COLORS];
1487/* clang-format on */
1488
1489typedef struct {
1490 int rows;
1491 int cols;
1492 int n_colors;
1493 int plane_width;
1494 int plane_height;
1495 uint8_t *color_map;
1496 MapCdf map_cdf;
1497 ColorCost color_cost;
1498} Av1ColorMapParam;
1499
Yue Chen19e7aa82016-11-30 14:05:39 -08001500static INLINE int is_nontrans_global_motion(const MACROBLOCKD *xd) {
1501 const MODE_INFO *mi = xd->mi[0];
1502 const MB_MODE_INFO *const mbmi = &mi->mbmi;
1503 int ref;
Yue Chen19e7aa82016-11-30 14:05:39 -08001504
Sarah Parker2b9ec2e2017-10-30 17:34:08 -07001505 // First check if all modes are GLOBALMV
1506 if (mbmi->mode != GLOBALMV && mbmi->mode != GLOBAL_GLOBALMV) return 0;
Jingning Han3ca0e672017-04-14 19:48:05 -07001507
1508#if !GLOBAL_SUB8X8_USED
1509 if (mbmi->sb_type < BLOCK_8X8) return 0;
1510#endif
1511
Yue Chen19e7aa82016-11-30 14:05:39 -08001512 // Now check if all global motion is non translational
1513 for (ref = 0; ref < 1 + has_second_ref(mbmi); ++ref) {
1514 if (xd->global_motion[mbmi->ref_frame[ref]].wmtype <= TRANSLATION) return 0;
1515 }
1516 return 1;
1517}
Yue Chen19e7aa82016-11-30 14:05:39 -08001518
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001519static INLINE PLANE_TYPE get_plane_type(int plane) {
Luc Trudeau005feb62017-02-22 13:34:01 -05001520 return (plane == 0) ? PLANE_TYPE_Y : PLANE_TYPE_UV;
1521}
1522
Angie Chiang155bf9a2017-08-06 19:52:57 -07001523static INLINE void transpose_uint8(uint8_t *dst, int dst_stride,
1524 const uint8_t *src, int src_stride, int w,
1525 int h) {
1526 int r, c;
1527 for (r = 0; r < h; ++r)
1528 for (c = 0; c < w; ++c) dst[c * dst_stride + r] = src[r * src_stride + c];
1529}
1530
1531static INLINE void transpose_uint16(uint16_t *dst, int dst_stride,
1532 const uint16_t *src, int src_stride, int w,
1533 int h) {
1534 int r, c;
1535 for (r = 0; r < h; ++r)
1536 for (c = 0; c < w; ++c) dst[c * dst_stride + r] = src[r * src_stride + c];
1537}
1538
1539static INLINE void transpose_int16(int16_t *dst, int dst_stride,
1540 const int16_t *src, int src_stride, int w,
1541 int h) {
1542 int r, c;
1543 for (r = 0; r < h; ++r)
1544 for (c = 0; c < w; ++c) dst[c * dst_stride + r] = src[r * src_stride + c];
1545}
1546
1547static INLINE void transpose_int32(int32_t *dst, int dst_stride,
1548 const int32_t *src, int src_stride, int w,
1549 int h) {
1550 int r, c;
1551 for (r = 0; r < h; ++r)
1552 for (c = 0; c < w; ++c) dst[c * dst_stride + r] = src[r * src_stride + c];
1553}
1554
Yaowu Xuc27fc142016-08-22 16:08:15 -07001555#ifdef __cplusplus
1556} // extern "C"
1557#endif
1558
Yaowu Xuf883b422016-08-30 14:01:10 -07001559#endif // AV1_COMMON_BLOCKD_H_