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Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_COMMON_BLOCKD_H_
13#define AV1_COMMON_BLOCKD_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
Yaowu Xuf883b422016-08-30 14:01:10 -070015#include "./aom_config.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070016
Yaowu Xuf883b422016-08-30 14:01:10 -070017#include "aom_dsp/aom_dsp_common.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070018#include "aom_ports/mem.h"
19#include "aom_scale/yv12config.h"
20
21#include "av1/common/common_data.h"
22#include "av1/common/quant_common.h"
23#include "av1/common/entropy.h"
24#include "av1/common/entropymode.h"
25#include "av1/common/mv.h"
26#include "av1/common/scale.h"
27#include "av1/common/seg_common.h"
28#include "av1/common/tile_common.h"
Yushin Cho77bba8d2016-11-04 16:36:56 -070029#if CONFIG_PVQ
30#include "av1/common/pvq.h"
31#include "av1/common/pvq_state.h"
32#include "av1/decoder/decint.h"
33#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070034#ifdef __cplusplus
35extern "C" {
36#endif
37
Jingning Han69d21012017-05-14 16:51:27 -070038#if (CONFIG_CHROMA_SUB8X8 || CONFIG_CHROMA_2X2)
39#define SUB8X8_COMP_REF 0
40#else
41#define SUB8X8_COMP_REF 1
42#endif
Jingning Hanc41a5492017-02-24 11:18:52 -080043
Yaowu Xuc27fc142016-08-22 16:08:15 -070044#define MAX_MB_PLANE 3
45
David Barkerac37fa32016-12-02 12:30:21 +000046#if CONFIG_EXT_INTER
Sarah Parkerb9f757c2017-01-06 17:12:24 -080047
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080048#if CONFIG_COMPOUND_SEGMENT
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080049// Set COMPOUND_SEGMENT_TYPE to one of the three
50// 0: Uniform
51// 1: Difference weighted
52#define COMPOUND_SEGMENT_TYPE 1
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080053#define MAX_SEG_MASK_BITS 1
Yaowu Xuf35f5272017-05-10 08:00:02 -070054
Sarah Parkerb9f757c2017-01-06 17:12:24 -080055// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
56typedef enum {
Yaowu Xuf35f5272017-05-10 08:00:02 -070057#if COMPOUND_SEGMENT_TYPE == 0
Sarah Parkerb9f757c2017-01-06 17:12:24 -080058 UNIFORM_45 = 0,
59 UNIFORM_45_INV,
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080060#elif COMPOUND_SEGMENT_TYPE == 1
Sarah Parker7bb84f32017-05-09 15:17:46 -070061 DIFFWTD_38 = 0,
62 DIFFWTD_38_INV,
Yaowu Xuf35f5272017-05-10 08:00:02 -070063#endif // COMPOUND_SEGMENT_TYPE
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080064 SEG_MASK_TYPES,
65} SEG_MASK_TYPE;
66
Sarah Parkerb9f757c2017-01-06 17:12:24 -080067#endif // CONFIG_COMPOUND_SEGMENT
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080068#endif // CONFIG_EXT_INTER
David Barkerac37fa32016-12-02 12:30:21 +000069
Yaowu Xuc27fc142016-08-22 16:08:15 -070070typedef enum {
71 KEY_FRAME = 0,
72 INTER_FRAME = 1,
Soo-Chul Han65c00ae2017-09-07 13:12:35 -040073#if CONFIG_OBU
74 INTRA_ONLY_FRAME = 2, // replaces intra-only
75 S_FRAME = 3,
76#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070077 FRAME_TYPES,
78} FRAME_TYPE;
79
Debargha Mukherjee0f248c42017-09-07 12:40:18 -070080static INLINE int is_comp_ref_allowed(BLOCK_SIZE bsize) {
81 (void)bsize;
82#if SUB8X8_COMP_REF
83 return 1;
84#else
85 return AOMMIN(block_size_wide[bsize], block_size_high[bsize]) >= 8;
86#endif // SUB8X8_COMP_REF
87}
88
Yaowu Xuc27fc142016-08-22 16:08:15 -070089static INLINE int is_inter_mode(PREDICTION_MODE mode) {
90#if CONFIG_EXT_INTER
91 return mode >= NEARESTMV && mode <= NEW_NEWMV;
92#else
93 return mode >= NEARESTMV && mode <= NEWMV;
94#endif // CONFIG_EXT_INTER
95}
96
Yushin Cho77bba8d2016-11-04 16:36:56 -070097#if CONFIG_PVQ
98typedef struct PVQ_INFO {
99 int theta[PVQ_MAX_PARTITIONS];
Yushin Cho77bba8d2016-11-04 16:36:56 -0700100 int qg[PVQ_MAX_PARTITIONS];
101 int k[PVQ_MAX_PARTITIONS];
Yushin Cho48f84db2016-11-07 21:20:17 -0800102 od_coeff y[OD_TXSIZE_MAX * OD_TXSIZE_MAX];
Yushin Cho77bba8d2016-11-04 16:36:56 -0700103 int nb_bands;
104 int off[PVQ_MAX_PARTITIONS];
105 int size[PVQ_MAX_PARTITIONS];
106 int skip_rest;
107 int skip_dir;
ltrudeaue1c09292017-01-20 15:42:13 -0500108 int bs; // log of the block size minus two,
109 // i.e. equivalent to aom's TX_SIZE
110 // Block skip info, indicating whether DC/AC, is coded.
111 PVQ_SKIP_TYPE ac_dc_coded; // bit0: DC coded, bit1 : AC coded (1 means coded)
Yushin Cho77bba8d2016-11-04 16:36:56 -0700112 tran_low_t dq_dc_residue;
113} PVQ_INFO;
114
115typedef struct PVQ_QUEUE {
116 PVQ_INFO *buf; // buffer for pvq info, stored in encoding order
117 int curr_pos; // curr position to write PVQ_INFO
118 int buf_len; // allocated buffer length
119 int last_pos; // last written position of PVQ_INFO in a tile
120} PVQ_QUEUE;
121#endif
122
Wei-Ting Lin482551b2017-08-03 12:29:24 -0700123#if CONFIG_NCOBMC_ADAPT_WEIGHT
124typedef struct superblock_mi_boundaries {
125 int mi_row_begin;
126 int mi_col_begin;
127 int mi_row_end;
128 int mi_col_end;
129} SB_MI_BD;
130
Wei-Ting Linb586de82017-08-03 15:17:38 -0700131typedef struct { int16_t KERNEL[4][MAX_SB_SIZE][MAX_SB_SIZE]; } NCOBMC_KERNELS;
Wei-Ting Lin482551b2017-08-03 12:29:24 -0700132#endif
133
David Barkerac37fa32016-12-02 12:30:21 +0000134typedef struct {
135 uint8_t *plane[MAX_MB_PLANE];
136 int stride[MAX_MB_PLANE];
137} BUFFER_SET;
138
Yaowu Xuc27fc142016-08-22 16:08:15 -0700139#if CONFIG_EXT_INTER
140static INLINE int is_inter_singleref_mode(PREDICTION_MODE mode) {
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700141 return mode >= NEARESTMV && mode <= NEWMV;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700142}
Zoe Liu85b66462017-04-20 14:28:19 -0700143static INLINE int is_inter_compound_mode(PREDICTION_MODE mode) {
144 return mode >= NEAREST_NEARESTMV && mode <= NEW_NEWMV;
145}
Zoe Liu239f06b2017-04-20 13:10:55 -0700146#if CONFIG_COMPOUND_SINGLEREF
147static INLINE int is_inter_singleref_comp_mode(PREDICTION_MODE mode) {
148 return mode >= SR_NEAREST_NEARMV && mode <= SR_NEW_NEWMV;
149}
Zoe Liu85b66462017-04-20 14:28:19 -0700150static INLINE int is_inter_anyref_comp_mode(PREDICTION_MODE mode) {
151 return is_inter_compound_mode(mode) || is_inter_singleref_comp_mode(mode);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700152}
Zoe Liu85b66462017-04-20 14:28:19 -0700153#endif // CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700154
155static INLINE PREDICTION_MODE compound_ref0_mode(PREDICTION_MODE mode) {
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700156 static PREDICTION_MODE lut[] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800157 MB_MODE_COUNT, // DC_PRED
158 MB_MODE_COUNT, // V_PRED
159 MB_MODE_COUNT, // H_PRED
160 MB_MODE_COUNT, // D45_PRED
161 MB_MODE_COUNT, // D135_PRED
162 MB_MODE_COUNT, // D117_PRED
163 MB_MODE_COUNT, // D153_PRED
164 MB_MODE_COUNT, // D207_PRED
165 MB_MODE_COUNT, // D63_PRED
Urvang Joshi102245d2016-11-28 13:05:36 -0800166 MB_MODE_COUNT, // SMOOTH_PRED
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700167#if CONFIG_SMOOTH_HV
168 MB_MODE_COUNT, // SMOOTH_V_PRED
169 MB_MODE_COUNT, // SMOOTH_H_PRED
170#endif // CONFIG_SMOOTH_HV
Urvang Joshi102245d2016-11-28 13:05:36 -0800171 MB_MODE_COUNT, // TM_PRED
172 MB_MODE_COUNT, // NEARESTMV
173 MB_MODE_COUNT, // NEARMV
174 MB_MODE_COUNT, // ZEROMV
175 MB_MODE_COUNT, // NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700176#if CONFIG_COMPOUND_SINGLEREF
177 NEARESTMV, // SR_NEAREST_NEARMV
Zoe Liu85b66462017-04-20 14:28:19 -0700178 // NEARESTMV, // SR_NEAREST_NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700179 NEARMV, // SR_NEAR_NEWMV
180 ZEROMV, // SR_ZERO_NEWMV
181 NEWMV, // SR_NEW_NEWMV
182#endif // CONFIG_COMPOUND_SINGLEREF
183 NEARESTMV, // NEAREST_NEARESTMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700184 NEARMV, // NEAR_NEARMV
185 NEARESTMV, // NEAREST_NEWMV
186 NEWMV, // NEW_NEARESTMV
187 NEARMV, // NEAR_NEWMV
188 NEWMV, // NEW_NEARMV
189 ZEROMV, // ZERO_ZEROMV
190 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700191 };
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700192 assert(NELEMENTS(lut) == MB_MODE_COUNT);
Zoe Liu85b66462017-04-20 14:28:19 -0700193#if CONFIG_COMPOUND_SINGLEREF
194 assert(is_inter_anyref_comp_mode(mode));
195#else // !CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700196 assert(is_inter_compound_mode(mode));
Zoe Liu85b66462017-04-20 14:28:19 -0700197#endif // CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700198 return lut[mode];
199}
200
201static INLINE PREDICTION_MODE compound_ref1_mode(PREDICTION_MODE mode) {
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700202 static PREDICTION_MODE lut[] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800203 MB_MODE_COUNT, // DC_PRED
204 MB_MODE_COUNT, // V_PRED
205 MB_MODE_COUNT, // H_PRED
206 MB_MODE_COUNT, // D45_PRED
207 MB_MODE_COUNT, // D135_PRED
208 MB_MODE_COUNT, // D117_PRED
209 MB_MODE_COUNT, // D153_PRED
210 MB_MODE_COUNT, // D207_PRED
211 MB_MODE_COUNT, // D63_PRED
Urvang Joshi102245d2016-11-28 13:05:36 -0800212 MB_MODE_COUNT, // SMOOTH_PRED
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700213#if CONFIG_SMOOTH_HV
214 MB_MODE_COUNT, // SMOOTH_V_PRED
215 MB_MODE_COUNT, // SMOOTH_H_PRED
216#endif // CONFIG_SMOOTH_HV
Urvang Joshi102245d2016-11-28 13:05:36 -0800217 MB_MODE_COUNT, // TM_PRED
218 MB_MODE_COUNT, // NEARESTMV
219 MB_MODE_COUNT, // NEARMV
220 MB_MODE_COUNT, // ZEROMV
221 MB_MODE_COUNT, // NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700222#if CONFIG_COMPOUND_SINGLEREF
Zoe Liu85b66462017-04-20 14:28:19 -0700223 NEARMV, // SR_NEAREST_NEARMV
224 // NEWMV, // SR_NEAREST_NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700225 NEWMV, // SR_NEAR_NEWMV
226 NEWMV, // SR_ZERO_NEWMV
227 NEWMV, // SR_NEW_NEWMV
228#endif // CONFIG_COMPOUND_SINGLEREF
229 NEARESTMV, // NEAREST_NEARESTMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700230 NEARMV, // NEAR_NEARMV
231 NEWMV, // NEAREST_NEWMV
232 NEARESTMV, // NEW_NEARESTMV
233 NEWMV, // NEAR_NEWMV
234 NEARMV, // NEW_NEARMV
235 ZEROMV, // ZERO_ZEROMV
236 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700237 };
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700238 assert(NELEMENTS(lut) == MB_MODE_COUNT);
Zoe Liu85b66462017-04-20 14:28:19 -0700239#if CONFIG_COMPOUND_SINGLEREF
240 assert(is_inter_anyref_comp_mode(mode));
241#else // !CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700242 assert(is_inter_compound_mode(mode));
Zoe Liu85b66462017-04-20 14:28:19 -0700243#endif // CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700244 return lut[mode];
245}
246
David Barker3dfba992017-04-03 16:10:09 +0100247static INLINE int have_nearmv_in_inter_mode(PREDICTION_MODE mode) {
Debargha Mukherjeebb6e1342017-04-17 16:05:04 -0700248 return (mode == NEARMV || mode == NEAR_NEARMV || mode == NEAR_NEWMV ||
Zoe Liu85b66462017-04-20 14:28:19 -0700249#if CONFIG_COMPOUND_SINGLEREF
250 mode == SR_NEAREST_NEARMV || mode == SR_NEAR_NEWMV ||
251#endif // CONFIG_COMPOUND_SINGLEREF
Debargha Mukherjeebb6e1342017-04-17 16:05:04 -0700252 mode == NEW_NEARMV);
David Barker3dfba992017-04-03 16:10:09 +0100253}
254
Yaowu Xuc27fc142016-08-22 16:08:15 -0700255static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700256 return (mode == NEWMV || mode == NEW_NEWMV || mode == NEAREST_NEWMV ||
Zoe Liu85b66462017-04-20 14:28:19 -0700257#if CONFIG_COMPOUND_SINGLEREF
258 /* mode == SR_NEAREST_NEWMV || */ mode == SR_NEAR_NEWMV ||
259 mode == SR_ZERO_NEWMV || mode == SR_NEW_NEWMV ||
260#endif // CONFIG_COMPOUND_SINGLEREF
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700261 mode == NEW_NEARESTMV || mode == NEAR_NEWMV || mode == NEW_NEARMV);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700262}
Sarah Parker6fdc8532016-11-16 17:47:13 -0800263
Sarah Parker2e604882017-01-17 17:31:25 -0800264static INLINE int use_masked_motion_search(COMPOUND_TYPE type) {
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000265#if CONFIG_WEDGE
Sarah Parker2e604882017-01-17 17:31:25 -0800266 return (type == COMPOUND_WEDGE);
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000267#else
268 (void)type;
269 return 0;
270#endif
Sarah Parker2e604882017-01-17 17:31:25 -0800271}
272
Sarah Parker6fdc8532016-11-16 17:47:13 -0800273static INLINE int is_masked_compound_type(COMPOUND_TYPE type) {
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000274#if CONFIG_COMPOUND_SEGMENT && CONFIG_WEDGE
Sarah Parker569edda2016-12-14 14:57:38 -0800275 return (type == COMPOUND_WEDGE || type == COMPOUND_SEG);
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000276#elif !CONFIG_COMPOUND_SEGMENT && CONFIG_WEDGE
Sarah Parker6fdc8532016-11-16 17:47:13 -0800277 return (type == COMPOUND_WEDGE);
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000278#elif CONFIG_COMPOUND_SEGMENT && !CONFIG_WEDGE
279 return (type == COMPOUND_SEG);
Sarah Parker569edda2016-12-14 14:57:38 -0800280#endif // CONFIG_COMPOUND_SEGMENT
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000281 (void)type;
282 return 0;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800283}
Zoe Liu85b66462017-04-20 14:28:19 -0700284
285#else // !CONFIG_EXT_INTER
Yaowu Xuc27fc142016-08-22 16:08:15 -0700286
David Barker3dfba992017-04-03 16:10:09 +0100287static INLINE int have_nearmv_in_inter_mode(PREDICTION_MODE mode) {
288 return (mode == NEARMV);
289}
290
Yaowu Xuc27fc142016-08-22 16:08:15 -0700291static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
292 return (mode == NEWMV);
293}
294#endif // CONFIG_EXT_INTER
295
296/* For keyframes, intra block modes are predicted by the (already decoded)
297 modes for the Y blocks to the left and above us; for interframes, there
298 is a single probability table. */
299
300typedef struct {
301 PREDICTION_MODE as_mode;
302 int_mv as_mv[2]; // first, second inter predictor motion vectors
Yaowu Xuf5bbbfa2016-09-26 09:13:38 -0700303 int_mv pred_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700304#if CONFIG_EXT_INTER
305 int_mv ref_mv[2];
306#endif // CONFIG_EXT_INTER
307} b_mode_info;
308
309typedef int8_t MV_REFERENCE_FRAME;
310
311typedef struct {
312 // Number of base colors for Y (0) and UV (1)
313 uint8_t palette_size[2];
hui sufa4ff852017-05-15 12:20:50 -0700314 // Value of base colors for Y, U, and V
Yaowu Xuc27fc142016-08-22 16:08:15 -0700315 uint16_t palette_colors[3 * PALETTE_MAX_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700316} PALETTE_MODE_INFO;
317
hui su5db97432016-10-14 16:10:14 -0700318#if CONFIG_FILTER_INTRA
Yue Chen8d8638a2017-02-21 13:28:16 +0800319#define USE_3TAP_INTRA_FILTER 1 // 0: 4-tap; 1: 3-tap
Yaowu Xuc27fc142016-08-22 16:08:15 -0700320typedef struct {
321 // 1: an ext intra mode is used; 0: otherwise.
hui su5db97432016-10-14 16:10:14 -0700322 uint8_t use_filter_intra_mode[PLANE_TYPES];
323 FILTER_INTRA_MODE filter_intra_mode[PLANE_TYPES];
324} FILTER_INTRA_MODE_INFO;
325#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700326
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800327#if CONFIG_VAR_TX
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800328#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800329#define TXB_COEFF_COST_MAP_SIZE (2 * MAX_MIB_SIZE)
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800330#endif
331#endif
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800332
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800333typedef struct RD_STATS {
334 int rate;
335 int64_t dist;
Angie Chiang7bbd3b12017-04-26 11:06:09 -0700336 // Please be careful of using rdcost, it's not guaranteed to be set all the
337 // time.
338 // TODO(angiebird): Create a set of functions to manipulate the RD_STATS. In
339 // these functions, make sure rdcost is always up-to-date according to
340 // rate/dist.
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700341 int64_t rdcost;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800342 int64_t sse;
Angie Chiang7bbd3b12017-04-26 11:06:09 -0700343 int skip; // sse should equal to dist when skip == 1
Jingning Han3bce7542017-07-25 10:53:57 -0700344 int64_t ref_rdcost;
345 int zero_rate;
Jingning Han1a7f0a82017-07-27 09:48:05 -0700346 uint8_t invalid_rate;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800347#if CONFIG_RD_DEBUG
348 int txb_coeff_cost[MAX_MB_PLANE];
Angie Chiang3963d632016-11-10 18:41:40 -0800349#if CONFIG_VAR_TX
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800350 int txb_coeff_cost_map[MAX_MB_PLANE][TXB_COEFF_COST_MAP_SIZE]
351 [TXB_COEFF_COST_MAP_SIZE];
Angie Chiang3963d632016-11-10 18:41:40 -0800352#endif // CONFIG_VAR_TX
353#endif // CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800354} RD_STATS;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800355
Sarah Parker6fdc8532016-11-16 17:47:13 -0800356#if CONFIG_EXT_INTER
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000357// This struct is used to group function args that are commonly
358// sent together in functions related to interinter compound modes
Sarah Parker6fdc8532016-11-16 17:47:13 -0800359typedef struct {
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000360#if CONFIG_WEDGE
Sarah Parker6fdc8532016-11-16 17:47:13 -0800361 int wedge_index;
362 int wedge_sign;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000363#endif // CONFIG_WEDGE
Sarah Parker569edda2016-12-14 14:57:38 -0800364#if CONFIG_COMPOUND_SEGMENT
Sarah Parkerb9f757c2017-01-06 17:12:24 -0800365 SEG_MASK_TYPE mask_type;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000366 uint8_t *seg_mask;
Sarah Parker569edda2016-12-14 14:57:38 -0800367#endif // CONFIG_COMPOUND_SEGMENT
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000368 COMPOUND_TYPE interinter_compound_type;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800369} INTERINTER_COMPOUND_DATA;
370#endif // CONFIG_EXT_INTER
371
Yaowu Xuc27fc142016-08-22 16:08:15 -0700372// This structure now relates to 8x8 block regions.
Luc Trudeauf5334002017-04-25 12:21:26 -0400373typedef struct MB_MODE_INFO {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700374 // Common for both INTER and INTRA blocks
375 BLOCK_SIZE sb_type;
376 PREDICTION_MODE mode;
377 TX_SIZE tx_size;
378#if CONFIG_VAR_TX
379 // TODO(jingning): This effectively assigned a separate entry for each
380 // 8x8 block. Apparently it takes much more space than needed.
381 TX_SIZE inter_tx_size[MAX_MIB_SIZE][MAX_MIB_SIZE];
Jingning Hane67b38a2016-11-04 10:30:00 -0700382 TX_SIZE min_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700383#endif
384 int8_t skip;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700385 int8_t segment_id;
386#if CONFIG_SUPERTX
387 // Minimum of all segment IDs under the current supertx block.
388 int8_t segment_id_supertx;
389#endif // CONFIG_SUPERTX
390 int8_t seg_id_predicted; // valid only when temporal_update is enabled
391
Sarah Parkerc5ccd4c2017-08-03 11:27:50 -0700392#if CONFIG_MRC_TX
393 int valid_mrc_mask;
394#endif // CONFIG_MRC_TX
395
Yaowu Xuc27fc142016-08-22 16:08:15 -0700396 // Only for INTRA blocks
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400397 UV_PREDICTION_MODE uv_mode;
Urvang Joshic6300aa2017-06-01 14:46:23 -0700398
Yaowu Xuc27fc142016-08-22 16:08:15 -0700399 PALETTE_MODE_INFO palette_mode_info;
Alex Converse28744302017-04-13 14:46:22 -0700400#if CONFIG_INTRABC
401 uint8_t use_intrabc;
402#endif // CONFIG_INTRABC
Yaowu Xuc27fc142016-08-22 16:08:15 -0700403
404// Only for INTER blocks
405#if CONFIG_DUAL_FILTER
James Zern7b9407a2016-05-18 23:48:05 -0700406 InterpFilter interp_filter[4];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700407#else
James Zern7b9407a2016-05-18 23:48:05 -0700408 InterpFilter interp_filter;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700409#endif
410 MV_REFERENCE_FRAME ref_frame[2];
411 TX_TYPE tx_type;
Angie Chiangcd9b03f2017-04-16 13:37:13 -0700412#if CONFIG_TXK_SEL
Angie Chiang808d8592017-04-06 18:36:55 -0700413 TX_TYPE txk_type[MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
414#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700415
hui su5db97432016-10-14 16:10:14 -0700416#if CONFIG_FILTER_INTRA
417 FILTER_INTRA_MODE_INFO filter_intra_mode_info;
418#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700419#if CONFIG_EXT_INTRA
hui sueda3d762016-12-06 16:58:23 -0800420 // The actual prediction angle is the base angle + (angle_delta * step).
Yaowu Xuc27fc142016-08-22 16:08:15 -0700421 int8_t angle_delta[2];
hui sueda3d762016-12-06 16:58:23 -0800422#if CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700423 // To-Do (huisu): this may be replaced by interp_filter
424 INTRA_FILTER intra_filter;
hui sueda3d762016-12-06 16:58:23 -0800425#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700426#endif // CONFIG_EXT_INTRA
427
428#if CONFIG_EXT_INTER
Yue Chen4d26acb2017-05-01 12:28:34 -0700429#if CONFIG_INTERINTRA
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000430 // interintra members
Yaowu Xuc27fc142016-08-22 16:08:15 -0700431 INTERINTRA_MODE interintra_mode;
Yue Chen4d26acb2017-05-01 12:28:34 -0700432#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700433 // TODO(debargha): Consolidate these flags
434 int use_wedge_interintra;
435 int interintra_wedge_index;
436 int interintra_wedge_sign;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000437 // interinter members
438 COMPOUND_TYPE interinter_compound_type;
439#if CONFIG_WEDGE
440 int wedge_index;
441 int wedge_sign;
442#endif // CONFIG_WEDGE
443#if CONFIG_COMPOUND_SEGMENT
444 SEG_MASK_TYPE mask_type;
445#endif // CONFIG_COMPOUND_SEGMENT
Yaowu Xuc27fc142016-08-22 16:08:15 -0700446#endif // CONFIG_EXT_INTER
Yue Chencb60b182016-10-13 15:18:22 -0700447 MOTION_MODE motion_mode;
Yue Chen5329a2b2017-02-28 17:33:00 +0800448#if CONFIG_MOTION_VAR
449 int overlappable_neighbors[2];
Wei-Ting Lin85a8f702017-06-22 13:55:15 -0700450#if CONFIG_NCOBMC_ADAPT_WEIGHT
451 // Applying different weighting kernels in ncobmc
452 // In current implementation, interpolation modes only defined for squared
453 // blocks. A rectangular block is divided into two squared blocks and each
454 // squared block has an interpolation mode.
455 NCOBMC_MODE ncobmc_mode[2];
Wei-Ting Lin482551b2017-08-03 12:29:24 -0700456#endif // CONFIG_NCOBMC_ADAPT_WEIGHT
Yue Chen5329a2b2017-02-28 17:33:00 +0800457#endif // CONFIG_MOTION_VAR
Yaowu Xuc27fc142016-08-22 16:08:15 -0700458 int_mv mv[2];
459 int_mv pred_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700460 uint8_t ref_mv_idx;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700461#if CONFIG_EXT_PARTITION_TYPES
462 PARTITION_TYPE partition;
463#endif
464#if CONFIG_NEW_QUANT
465 int dq_off_index;
466 int send_dq_bit;
467#endif // CONFIG_NEW_QUANT
468 /* deringing gain *per-superblock* */
Jean-Marc Valin5f5c1322017-03-21 16:20:21 -0400469 int8_t cdef_strength;
Arild Fuldseth07441162016-08-15 15:07:52 +0200470#if CONFIG_DELTA_Q
471 int current_q_index;
Fangwen Fu231fe422017-04-24 17:52:29 -0700472#if CONFIG_EXT_DELTA_Q
473 int current_delta_lf_from_base;
474#endif
Arild Fuldseth07441162016-08-15 15:07:52 +0200475#endif
Angie Chiangd4022822016-11-02 18:30:25 -0700476#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800477 RD_STATS rd_stats;
Angie Chiangd4022822016-11-02 18:30:25 -0700478 int mi_row;
479 int mi_col;
480#endif
Yue Chen69f18e12016-09-08 14:48:15 -0700481#if CONFIG_WARPED_MOTION
482 int num_proj_ref[2];
483 WarpedMotionParams wm_params[2];
484#endif // CONFIG_WARPED_MOTION
Ryan Lei9b02b0e2017-01-30 15:52:20 -0800485
Luc Trudeauf5334002017-04-25 12:21:26 -0400486#if CONFIG_CFL
487 // Index of the alpha Cb and alpha Cr combination
Luc Trudeaua9bd85f2017-05-11 14:37:56 -0400488 int cfl_alpha_idx;
David Michael Barrf6eaa152017-07-19 19:42:28 +0900489 // Joint sign of alpha Cb and alpha Cr
490 int cfl_alpha_signs;
Luc Trudeauf5334002017-04-25 12:21:26 -0400491#endif
492
Ryan Lei9b02b0e2017-01-30 15:52:20 -0800493 BOUNDARY_TYPE boundary_info;
Cheng Chenf572cd32017-08-25 18:34:51 -0700494#if CONFIG_LPF_SB
495 uint8_t filt_lvl;
496#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700497} MB_MODE_INFO;
498
499typedef struct MODE_INFO {
500 MB_MODE_INFO mbmi;
501 b_mode_info bmi[4];
502} MODE_INFO;
503
Alex Converse28744302017-04-13 14:46:22 -0700504#if CONFIG_INTRABC
505static INLINE int is_intrabc_block(const MB_MODE_INFO *mbmi) {
506 return mbmi->use_intrabc;
507}
508#endif
509
Yaowu Xuc27fc142016-08-22 16:08:15 -0700510static INLINE PREDICTION_MODE get_y_mode(const MODE_INFO *mi, int block) {
Jingning Hand7d20472016-12-14 11:13:48 -0800511#if CONFIG_CB4X4
512 (void)block;
513 return mi->mbmi.mode;
514#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700515 return mi->mbmi.sb_type < BLOCK_8X8 ? mi->bmi[block].as_mode : mi->mbmi.mode;
Jingning Hand7d20472016-12-14 11:13:48 -0800516#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700517}
518
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400519#if CONFIG_CFL
520static INLINE PREDICTION_MODE get_uv_mode(UV_PREDICTION_MODE mode) {
521 static const PREDICTION_MODE uv2y[UV_INTRA_MODES] = {
Urvang Joshi93b543a2017-06-01 17:32:41 -0700522 DC_PRED, // UV_DC_PRED
523 V_PRED, // UV_V_PRED
524 H_PRED, // UV_H_PRED
525 D45_PRED, // UV_D45_PRED
526 D135_PRED, // UV_D135_PRED
527 D117_PRED, // UV_D117_PRED
528 D153_PRED, // UV_D153_PRED
529 D207_PRED, // UV_D207_PRED
530 D63_PRED, // UV_D63_PRED
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400531 SMOOTH_PRED, // UV_SMOOTH_PRED
532#if CONFIG_SMOOTH_HV
533 SMOOTH_V_PRED, // UV_SMOOTH_V_PRED
534 SMOOTH_H_PRED, // UV_SMOOTH_H_PRED
535#endif // CONFIG_SMOOTH_HV
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400536 TM_PRED, // UV_TM_PRED
Luc Trudeau6e1cd782017-06-21 13:52:36 -0400537 DC_PRED, // CFL_PRED
Luc Trudeaud6d9eee2017-07-12 12:36:50 -0400538 };
539 return uv2y[mode];
540}
541#else
542static INLINE PREDICTION_MODE get_uv_mode(PREDICTION_MODE mode) { return mode; }
543#endif // CONFIG_CFL
544
Yaowu Xuc27fc142016-08-22 16:08:15 -0700545static INLINE int is_inter_block(const MB_MODE_INFO *mbmi) {
Alex Converse28744302017-04-13 14:46:22 -0700546#if CONFIG_INTRABC
547 if (is_intrabc_block(mbmi)) return 1;
548#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700549 return mbmi->ref_frame[0] > INTRA_FRAME;
550}
551
552static INLINE int has_second_ref(const MB_MODE_INFO *mbmi) {
553 return mbmi->ref_frame[1] > INTRA_FRAME;
554}
555
Zoe Liuc082bbc2017-05-17 13:31:37 -0700556#if CONFIG_EXT_COMP_REFS
557static INLINE int has_uni_comp_refs(const MB_MODE_INFO *mbmi) {
558 return has_second_ref(mbmi) && (!((mbmi->ref_frame[0] >= BWDREF_FRAME) ^
559 (mbmi->ref_frame[1] >= BWDREF_FRAME)));
560}
561
562static INLINE MV_REFERENCE_FRAME comp_ref0(int ref_idx) {
563 static const MV_REFERENCE_FRAME lut[] = {
564 LAST_FRAME, // LAST_LAST2_FRAMES,
Zoe Liufcf5fa22017-06-26 16:00:38 -0700565 LAST_FRAME, // LAST_LAST3_FRAMES,
Zoe Liuc082bbc2017-05-17 13:31:37 -0700566 LAST_FRAME, // LAST_GOLDEN_FRAMES,
567 BWDREF_FRAME, // BWDREF_ALTREF_FRAMES,
568 };
569 assert(NELEMENTS(lut) == UNIDIR_COMP_REFS);
570 return lut[ref_idx];
571}
572
573static INLINE MV_REFERENCE_FRAME comp_ref1(int ref_idx) {
574 static const MV_REFERENCE_FRAME lut[] = {
575 LAST2_FRAME, // LAST_LAST2_FRAMES,
Zoe Liufcf5fa22017-06-26 16:00:38 -0700576 LAST3_FRAME, // LAST_LAST3_FRAMES,
Zoe Liuc082bbc2017-05-17 13:31:37 -0700577 GOLDEN_FRAME, // LAST_GOLDEN_FRAMES,
578 ALTREF_FRAME, // BWDREF_ALTREF_FRAMES,
579 };
580 assert(NELEMENTS(lut) == UNIDIR_COMP_REFS);
581 return lut[ref_idx];
582}
583#endif // CONFIG_EXT_COMP_REFS
584
Yaowu Xuf883b422016-08-30 14:01:10 -0700585PREDICTION_MODE av1_left_block_mode(const MODE_INFO *cur_mi,
586 const MODE_INFO *left_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700587
Yaowu Xuf883b422016-08-30 14:01:10 -0700588PREDICTION_MODE av1_above_block_mode(const MODE_INFO *cur_mi,
589 const MODE_INFO *above_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700590
Sarah Parker19234cc2017-03-10 16:43:25 -0800591#if CONFIG_GLOBAL_MOTION
592static INLINE int is_global_mv_block(const MODE_INFO *mi, int block,
593 TransformationType type) {
594 PREDICTION_MODE mode = get_y_mode(mi, block);
595#if GLOBAL_SUB8X8_USED
596 const int block_size_allowed = 1;
597#else
598 const BLOCK_SIZE bsize = mi->mbmi.sb_type;
Debargha Mukherjeec17a4432017-08-28 22:22:45 -0700599 const int block_size_allowed =
600 AOMMIN(block_size_wide[bsize], block_size_high[bsize]) >= 8;
Sarah Parker19234cc2017-03-10 16:43:25 -0800601#endif // GLOBAL_SUB8X8_USED
602#if CONFIG_EXT_INTER
603 return (mode == ZEROMV || mode == ZERO_ZEROMV) && type > TRANSLATION &&
604 block_size_allowed;
605#else
606 return mode == ZEROMV && type > TRANSLATION && block_size_allowed;
607#endif // CONFIG_EXT_INTER
608}
609#endif // CONFIG_GLOBAL_MOTION
610
Yaowu Xuc27fc142016-08-22 16:08:15 -0700611enum mv_precision { MV_PRECISION_Q3, MV_PRECISION_Q4 };
612
613struct buf_2d {
614 uint8_t *buf;
615 uint8_t *buf0;
616 int width;
617 int height;
618 int stride;
619};
620
621typedef struct macroblockd_plane {
622 tran_low_t *dqcoeff;
623 PLANE_TYPE plane_type;
624 int subsampling_x;
625 int subsampling_y;
626 struct buf_2d dst;
627 struct buf_2d pre[2];
628 ENTROPY_CONTEXT *above_context;
629 ENTROPY_CONTEXT *left_context;
630 int16_t seg_dequant[MAX_SEGMENTS][2];
631#if CONFIG_NEW_QUANT
clang-format67948d32016-09-07 22:40:40 -0700632 dequant_val_type_nuq seg_dequant_nuq[MAX_SEGMENTS][QUANT_PROFILES]
633 [COEF_BANDS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700634#endif
635 uint8_t *color_index_map;
636
637 // number of 4x4s in current block
638 uint16_t n4_w, n4_h;
639 // log2 of n4_w, n4_h
640 uint8_t n4_wl, n4_hl;
Jingning Hanc47fe6c2016-10-21 16:40:47 -0700641 // block size in pixels
642 uint8_t width, height;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700643
644#if CONFIG_AOM_QM
Sarah Parker172f3c12017-09-08 14:23:36 -0700645 qm_val_t *seg_iqmatrix[MAX_SEGMENTS][2][TX_SIZES_ALL];
646 qm_val_t *seg_qmatrix[MAX_SEGMENTS][2][TX_SIZES_ALL];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700647#endif
648 // encoder
649 const int16_t *dequant;
650#if CONFIG_NEW_QUANT
651 const dequant_val_type_nuq *dequant_val_nuq[QUANT_PROFILES];
652#endif // CONFIG_NEW_QUANT
Yushin Cho77bba8d2016-11-04 16:36:56 -0700653
Yushin Chob7b60c52017-07-14 16:18:52 -0700654#if CONFIG_PVQ || CONFIG_DIST_8X8
Yushin Cho77bba8d2016-11-04 16:36:56 -0700655 DECLARE_ALIGNED(16, int16_t, pred[MAX_SB_SQUARE]);
Yushin Chob7b60c52017-07-14 16:18:52 -0700656#endif
657#if CONFIG_PVQ
Yushin Cho77bba8d2016-11-04 16:36:56 -0700658 // PVQ: forward transformed predicted image, a reference for PVQ.
659 tran_low_t *pvq_ref_coeff;
660#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700661} MACROBLOCKD_PLANE;
662
Jingning Han3468df12016-12-05 17:53:16 -0800663#define BLOCK_OFFSET(x, i) \
664 ((x) + (i) * (1 << (tx_size_wide_log2[0] + tx_size_high_log2[0])))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700665
666typedef struct RefBuffer {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700667 int idx;
668 YV12_BUFFER_CONFIG *buf;
669 struct scale_factors sf;
Zoe Liu7b1ec7a2017-05-24 22:28:24 -0700670#if CONFIG_VAR_REFS
Zoe Liu7b1ec7a2017-05-24 22:28:24 -0700671 int is_valid;
672#endif // CONFIG_VAR_REFS
Yaowu Xuc27fc142016-08-22 16:08:15 -0700673} RefBuffer;
674
Yi Luo2ab63cb2017-05-11 16:44:22 -0700675#if CONFIG_ADAPT_SCAN
676typedef int16_t EobThresholdMD[TX_TYPES][EOB_THRESHOLD_NUM];
677#endif
Luc Trudeauf8164152017-04-11 16:20:51 -0400678
Rupert Swarbrick6c545212017-09-01 17:17:25 +0100679#if CONFIG_LOOP_RESTORATION
680typedef struct {
681 DECLARE_ALIGNED(16, InterpKernel, vfilter);
682 DECLARE_ALIGNED(16, InterpKernel, hfilter);
683} WienerInfo;
684
685typedef struct {
686 int ep;
687 int xqd[2];
688} SgrprojInfo;
689#endif // CONFIG_LOOP_RESTORATION
690
David Michael Barr5b2021e2017-08-17 18:12:39 +0900691#if CONFIG_CFL
Luc Trudeau03b7e7d2017-09-19 13:20:52 -0400692#if CONFIG_CHROMA_SUB8X8 && CONFIG_DEBUG
693#define CFL_SUB8X8_VAL_MI_SIZE (4)
694#define CFL_SUB8X8_VAL_MI_SQUARE \
695 (CFL_SUB8X8_VAL_MI_SIZE * CFL_SUB8X8_VAL_MI_SIZE)
696#endif // CONFIG_CHROMA_SUB8X8 && CONFIG_DEBUG
David Michael Barr5b2021e2017-08-17 18:12:39 +0900697typedef struct cfl_ctx {
Luc Trudeau4e26d662017-09-11 13:08:40 -0400698 // The CfL prediction buffer is used in two steps:
699 // 1. Stores Q3 reconstructed luma pixels
700 // (only Q2 is required, but Q3 is used to avoid shifts)
701 // 2. Stores Q3 AC contributions (step1 - tx block avg)
702 int16_t pred_buf_q3[MAX_SB_SQUARE];
David Michael Barr5b2021e2017-08-17 18:12:39 +0900703
Luc Trudeau4e26d662017-09-11 13:08:40 -0400704 // Height and width currently used in the CfL prediction buffer.
705 int buf_height, buf_width;
David Michael Barr5b2021e2017-08-17 18:12:39 +0900706
707 // Height and width of the chroma prediction block currently associated with
708 // this context
709 int uv_height, uv_width;
710
David Michael Barr5b2021e2017-08-17 18:12:39 +0900711 int are_parameters_computed;
712
713 // Chroma subsampling
714 int subsampling_x, subsampling_y;
715
716 // Block level DC_PRED for each chromatic plane
717 int dc_pred[CFL_PRED_PLANES];
718
719 int mi_row, mi_col;
720
721 // Whether the reconstructed luma pixels need to be stored
722 int store_y;
723
724#if CONFIG_CB4X4
725 int is_chroma_reference;
726#if CONFIG_CHROMA_SUB8X8 && CONFIG_DEBUG
727 // The prediction used for sub8x8 blocks originates from multiple luma blocks,
728 // this array is used to validate that cfl_store() is called only once for
729 // each luma block
Luc Trudeau03b7e7d2017-09-19 13:20:52 -0400730 uint8_t sub8x8_val[CFL_SUB8X8_VAL_MI_SQUARE];
David Michael Barr5b2021e2017-08-17 18:12:39 +0900731#endif // CONFIG_CHROMA_SUB8X8 && CONFIG_DEBUG
732#endif // CONFIG_CB4X4
733} CFL_CTX;
734#endif // CONFIG_CFL
735
Yaowu Xuc27fc142016-08-22 16:08:15 -0700736typedef struct macroblockd {
737 struct macroblockd_plane plane[MAX_MB_PLANE];
738 uint8_t bmode_blocks_wl;
739 uint8_t bmode_blocks_hl;
740
741 FRAME_COUNTS *counts;
742 TileInfo tile;
743
744 int mi_stride;
745
746 MODE_INFO **mi;
747 MODE_INFO *left_mi;
748 MODE_INFO *above_mi;
749 MB_MODE_INFO *left_mbmi;
750 MB_MODE_INFO *above_mbmi;
751
752 int up_available;
753 int left_available;
Jingning Han3da18d62017-05-02 12:43:58 -0700754#if CONFIG_CHROMA_SUB8X8
755 int chroma_up_available;
756 int chroma_left_available;
757#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700758
Yaowu Xuf883b422016-08-30 14:01:10 -0700759 const aom_prob (*partition_probs)[PARTITION_TYPES - 1];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700760
Rupert Swarbrick57486c52017-08-14 10:53:49 +0100761 /* Distance of MB away from frame edges in subpixels (1/8th pixel) */
Yaowu Xuc27fc142016-08-22 16:08:15 -0700762 int mb_to_left_edge;
763 int mb_to_right_edge;
764 int mb_to_top_edge;
765 int mb_to_bottom_edge;
766
767 FRAME_CONTEXT *fc;
768
769 /* pointers to reference frames */
Urvang Joshi52648442016-10-13 17:27:51 -0700770 const RefBuffer *block_refs[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700771
772 /* pointer to current frame */
773 const YV12_BUFFER_CONFIG *cur_buf;
774
Alex Conversee816b312017-05-01 09:51:24 -0700775#if CONFIG_INTRABC
776 /* Scale of the current frame with respect to itself */
777 struct scale_factors sf_identity;
778#endif
779
Yaowu Xuc27fc142016-08-22 16:08:15 -0700780 ENTROPY_CONTEXT *above_context[MAX_MB_PLANE];
781 ENTROPY_CONTEXT left_context[MAX_MB_PLANE][2 * MAX_MIB_SIZE];
782
783 PARTITION_CONTEXT *above_seg_context;
784 PARTITION_CONTEXT left_seg_context[MAX_MIB_SIZE];
785
786#if CONFIG_VAR_TX
787 TXFM_CONTEXT *above_txfm_context;
788 TXFM_CONTEXT *left_txfm_context;
Jingning Han331662e2017-05-30 17:03:32 -0700789 TXFM_CONTEXT left_txfm_context_buffer[2 * MAX_MIB_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700790
791 TX_SIZE max_tx_size;
792#if CONFIG_SUPERTX
793 TX_SIZE supertx_size;
794#endif
795#endif
796
Rupert Swarbrick6c545212017-09-01 17:17:25 +0100797#if CONFIG_LOOP_RESTORATION
798 WienerInfo wiener_info[MAX_MB_PLANE];
799 SgrprojInfo sgrproj_info[MAX_MB_PLANE];
800#endif // CONFIG_LOOP_RESTORATION
801
Jingning Hanff6ee6a2016-12-07 09:55:21 -0800802 // block dimension in the unit of mode_info.
Yaowu Xuc27fc142016-08-22 16:08:15 -0700803 uint8_t n8_w, n8_h;
804
Yaowu Xuc27fc142016-08-22 16:08:15 -0700805 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
806 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
807 uint8_t is_sec_rect;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700808
Yushin Cho77bba8d2016-11-04 16:36:56 -0700809#if CONFIG_PVQ
810 daala_dec_ctx daala_dec;
811#endif
Thomas Daviesf77d4ad2017-01-10 18:55:42 +0000812 FRAME_CONTEXT *tile_ctx;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700813 /* Bit depth: 8, 10, 12 */
814 int bd;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700815
Debargha Mukherjee3c42c092016-09-29 09:17:36 -0700816 int qindex[MAX_SEGMENTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700817 int lossless[MAX_SEGMENTS];
818 int corrupted;
RogerZhou3b635242017-09-19 10:06:46 -0700819#if CONFIG_AMVR
820 int cur_frame_mv_precision_level;
821// same with that in AV1_COMMON
822#endif
Yaowu Xuf883b422016-08-30 14:01:10 -0700823 struct aom_internal_error_info *error_info;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700824#if CONFIG_GLOBAL_MOTION
David Barkercf3d0b02016-11-10 10:14:49 +0000825 WarpedMotionParams *global_motion;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700826#endif // CONFIG_GLOBAL_MOTION
Arild Fuldseth07441162016-08-15 15:07:52 +0200827#if CONFIG_DELTA_Q
828 int prev_qindex;
829 int delta_qindex;
830 int current_qindex;
Fangwen Fu231fe422017-04-24 17:52:29 -0700831#if CONFIG_EXT_DELTA_Q
832 // Since actual frame level loop filtering level value is not available
833 // at the beginning of the tile (only available during actual filtering)
834 // at encoder side.we record the delta_lf (against the frame level loop
835 // filtering level) and code the delta between previous superblock's delta
836 // lf and current delta lf. It is equivalent to the delta between previous
837 // superblock's actual lf and current lf.
838 int prev_delta_lf_from_base;
839 int current_delta_lf_from_base;
840#endif
Arild Fuldseth07441162016-08-15 15:07:52 +0200841#endif
Yi Luof8e87b42017-04-14 17:20:27 -0700842#if CONFIG_ADAPT_SCAN
843 const EobThresholdMD *eob_threshold_md;
844#endif
Luc Trudeauf8164152017-04-11 16:20:51 -0400845
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000846#if CONFIG_EXT_INTER && CONFIG_COMPOUND_SEGMENT
847 DECLARE_ALIGNED(16, uint8_t, seg_mask[2 * MAX_SB_SQUARE]);
848#endif // CONFIG_EXT_INTER && CONFIG_COMPOUND_SEGMENT
849
Sarah Parker5c6744b2017-08-25 17:27:45 -0700850#if CONFIG_MRC_TX
851 uint8_t *mrc_mask;
852#endif // CONFIG_MRC_TX
853
Luc Trudeauf8164152017-04-11 16:20:51 -0400854#if CONFIG_CFL
855 CFL_CTX *cfl;
856#endif
Wei-Ting Lin482551b2017-08-03 12:29:24 -0700857
858#if CONFIG_NCOBMC_ADAPT_WEIGHT
859 uint8_t *ncobmc_pred_buf[MAX_MB_PLANE];
860 int ncobmc_pred_buf_stride[MAX_MB_PLANE];
861 SB_MI_BD sb_mi_bd;
862#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700863} MACROBLOCKD;
864
Yi Luo51281092017-06-26 16:36:15 -0700865static INLINE int get_bitdepth_data_path_index(const MACROBLOCKD *xd) {
866 return xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH ? 1 : 0;
867}
868
Yaowu Xuc27fc142016-08-22 16:08:15 -0700869static INLINE BLOCK_SIZE get_subsize(BLOCK_SIZE bsize,
870 PARTITION_TYPE partition) {
871 if (partition == PARTITION_INVALID)
Urvang Joshicb586f32016-09-20 11:36:33 -0700872 return BLOCK_INVALID;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700873 else
874 return subsize_lookup[partition][bsize];
875}
876
877static const TX_TYPE intra_mode_to_tx_type_context[INTRA_MODES] = {
878 DCT_DCT, // DC
879 ADST_DCT, // V
880 DCT_ADST, // H
881 DCT_DCT, // D45
882 ADST_ADST, // D135
883 ADST_DCT, // D117
884 DCT_ADST, // D153
885 DCT_ADST, // D207
886 ADST_DCT, // D63
Urvang Joshi6be4a542016-11-03 15:24:05 -0700887 ADST_ADST, // SMOOTH
Urvang Joshie6ca8e82017-03-15 14:57:41 -0700888#if CONFIG_SMOOTH_HV
889 ADST_DCT, // SMOOTH_V
890 DCT_ADST, // SMOOTH_H
891#endif // CONFIG_SMOOTH_HV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700892 ADST_ADST, // TM
893};
894
895#if CONFIG_SUPERTX
896static INLINE int supertx_enabled(const MB_MODE_INFO *mbmi) {
Jingning Han93531242016-12-20 11:54:36 -0800897 TX_SIZE max_tx_size = txsize_sqr_map[mbmi->tx_size];
898 return tx_size_wide[max_tx_size] >
899 AOMMIN(block_size_wide[mbmi->sb_type], block_size_high[mbmi->sb_type]);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700900}
901#endif // CONFIG_SUPERTX
902
Jingning Hanb83e64b2017-03-01 14:52:04 -0800903#define USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4 1
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800904
Sarah Parker076437f2017-03-14 17:39:53 -0700905#if CONFIG_RECT_TX
Sarah Parker076437f2017-03-14 17:39:53 -0700906static INLINE int is_rect_tx(TX_SIZE tx_size) { return tx_size >= TX_SIZES; }
907#endif // CONFIG_RECT_TX
908
Sarah Parker2e08d962017-08-01 19:51:20 -0700909#if CONFIG_MRC_TX
910#define USE_MRC_INTRA 0
911#define USE_MRC_INTER 1
Sarah Parker99e7daa2017-08-29 10:30:13 -0700912#define SIGNAL_MRC_MASK_INTRA (USE_MRC_INTRA && 0)
913#define SIGNAL_MRC_MASK_INTER (USE_MRC_INTER && 1)
914#define SIGNAL_ANY_MRC_MASK (SIGNAL_MRC_MASK_INTRA || SIGNAL_MRC_MASK_INTER)
Sarah Parker2e08d962017-08-01 19:51:20 -0700915#endif // CONFIG_MRC_TX
916
Jingning Hanb83e64b2017-03-01 14:52:04 -0800917#if CONFIG_EXT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700918#define ALLOW_INTRA_EXT_TX 1
Yaowu Xuc27fc142016-08-22 16:08:15 -0700919
Hui Suddbcde22017-09-18 17:22:02 -0700920// Number of transform types in each set type
921static const int av1_num_ext_tx_set[EXT_TX_SET_TYPES] = {
922 1, 2,
Sarah Parker53f93db2017-07-11 17:20:04 -0700923#if CONFIG_MRC_TX
Hui Suddbcde22017-09-18 17:22:02 -0700924 2, 3,
925#endif // CONFIG_MRC_TX
926 5, 7, 12, 16,
927};
928
Hui Su4a9be2a2017-09-19 14:41:49 -0700929static const int av1_ext_tx_set_idx_to_type[2][AOMMAX(EXT_TX_SETS_INTRA,
930 EXT_TX_SETS_INTER)] = {
931 {
932 // Intra
933 EXT_TX_SET_DCTONLY, EXT_TX_SET_DTT4_IDTX_1DDCT, EXT_TX_SET_DTT4_IDTX,
Hui Suddbcde22017-09-18 17:22:02 -0700934#if CONFIG_MRC_TX
Hui Su4a9be2a2017-09-19 14:41:49 -0700935 EXT_TX_SET_MRC_DCT,
Hui Suddbcde22017-09-18 17:22:02 -0700936#endif // CONFIG_MRC_TX
Hui Su4a9be2a2017-09-19 14:41:49 -0700937 },
938 {
939 // Inter
940 EXT_TX_SET_DCTONLY, EXT_TX_SET_ALL16, EXT_TX_SET_DTT9_IDTX_1DDCT,
941 EXT_TX_SET_DCT_IDTX,
Hui Suddbcde22017-09-18 17:22:02 -0700942#if CONFIG_MRC_TX
Hui Su4a9be2a2017-09-19 14:41:49 -0700943 EXT_TX_SET_MRC_DCT_IDTX,
Sarah Parker53f93db2017-07-11 17:20:04 -0700944#endif // CONFIG_MRC_TX
Hui Su4a9be2a2017-09-19 14:41:49 -0700945 }
Hui Suddbcde22017-09-18 17:22:02 -0700946};
947
Hui Suddbcde22017-09-18 17:22:02 -0700948#if CONFIG_MRC_TX
949static const int av1_ext_tx_used[EXT_TX_SET_TYPES][TX_TYPES] = {
950 {
951 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
952 },
953 {
954 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
955 },
956 {
957 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
958 },
959 {
960 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1,
961 },
962 {
963 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
964 },
965 {
966 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0,
967 },
968 {
969 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
970 },
971 {
972 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0,
973 },
974};
975#else // CONFIG_MRC_TX
976static const int av1_ext_tx_used[EXT_TX_SET_TYPES][TX_TYPES] = {
977 {
978 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
979 },
980 {
981 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,
982 },
983 {
984 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0,
985 },
986 {
987 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0,
988 },
989 {
990 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,
991 },
992 {
993 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
994 },
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800995};
Sarah Parker53f93db2017-07-11 17:20:04 -0700996#endif // CONFIG_MRC_TX
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800997
998static INLINE TxSetType get_ext_tx_set_type(TX_SIZE tx_size, BLOCK_SIZE bs,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800999 int is_inter, int use_reduced_set) {
Yue Chen56e226e2017-05-02 16:21:40 -07001000 const TX_SIZE tx_size_sqr_up = txsize_sqr_up_map[tx_size];
1001 const TX_SIZE tx_size_sqr = txsize_sqr_map[tx_size];
Debargha Mukherjee094c9432017-02-22 10:31:25 -08001002#if CONFIG_CB4X4 && USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4
Jingning Han1a00cff2016-12-28 14:53:14 -08001003 (void)bs;
Yue Chen56e226e2017-05-02 16:21:40 -07001004 if (tx_size_sqr > TX_32X32) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -08001005#else
Yue Chen56e226e2017-05-02 16:21:40 -07001006 if (tx_size_sqr > TX_32X32 || bs < BLOCK_8X8) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -08001007#endif
Sarah Parker5effe3f2017-02-23 12:49:10 -08001008 if (use_reduced_set)
1009 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DTT4_IDTX;
Sarah Parker53f93db2017-07-11 17:20:04 -07001010#if CONFIG_MRC_TX
Sarah Parker2e08d962017-08-01 19:51:20 -07001011 if (tx_size == TX_32X32) {
1012 if (is_inter && USE_MRC_INTER)
1013 return EXT_TX_SET_MRC_DCT_IDTX;
1014 else if (!is_inter && USE_MRC_INTRA)
1015 return EXT_TX_SET_MRC_DCT;
1016 }
Sarah Parker53f93db2017-07-11 17:20:04 -07001017#endif // CONFIG_MRC_TX
Yue Chen56e226e2017-05-02 16:21:40 -07001018 if (tx_size_sqr_up == TX_32X32)
Debargha Mukherjee08542b92017-02-21 01:08:14 -08001019 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DCTONLY;
1020 if (is_inter)
Yue Chen56e226e2017-05-02 16:21:40 -07001021 return (tx_size_sqr == TX_16X16 ? EXT_TX_SET_DTT9_IDTX_1DDCT
1022 : EXT_TX_SET_ALL16);
Debargha Mukherjee08542b92017-02-21 01:08:14 -08001023 else
Yue Chen56e226e2017-05-02 16:21:40 -07001024 return (tx_size_sqr == TX_16X16 ? EXT_TX_SET_DTT4_IDTX
1025 : EXT_TX_SET_DTT4_IDTX_1DDCT);
Debargha Mukherjee08542b92017-02-21 01:08:14 -08001026}
1027
Hui Su4a9be2a2017-09-19 14:41:49 -07001028// Maps tx set types to the indices.
1029static const int ext_tx_set_index[2][EXT_TX_SET_TYPES] = {
1030 {
1031 // Intra
1032 0, -1,
1033#if CONFIG_MRC_TX
1034 3, -1,
1035#endif // CONFIG_MRC_TX
1036 2, 1, -1, -1,
1037 },
1038 {
1039 // Inter
1040 0, 3,
1041#if CONFIG_MRC_TX
1042 -1, 4,
1043#endif // CONFIG_MRC_TX
1044 -1, -1, 2, 1,
1045 },
1046};
1047
Debargha Mukherjee08542b92017-02-21 01:08:14 -08001048static INLINE int get_ext_tx_set(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -08001049 int use_reduced_set) {
Debargha Mukherjee08542b92017-02-21 01:08:14 -08001050 const TxSetType set_type =
Sarah Parker5effe3f2017-02-23 12:49:10 -08001051 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Hui Su4a9be2a2017-09-19 14:41:49 -07001052 return ext_tx_set_index[is_inter][set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -07001053}
1054
Sarah Parkere68a3e42017-02-16 14:03:24 -08001055static INLINE int get_ext_tx_types(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -08001056 int use_reduced_set) {
1057 const int set_type =
1058 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Hui Suddbcde22017-09-18 17:22:02 -07001059 return av1_num_ext_tx_set[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -07001060}
1061
1062#if CONFIG_RECT_TX
1063static INLINE int is_rect_tx_allowed_bsize(BLOCK_SIZE bsize) {
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001064 static const char LUT[BLOCK_SIZES_ALL] = {
Timothy B. Terriberry81ec2612017-04-26 16:53:47 -07001065#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8
Jingning Hanf4e097b2017-01-20 09:23:58 -08001066 0, // BLOCK_2X2
1067 0, // BLOCK_2X4
1068 0, // BLOCK_4X2
1069#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -07001070 0, // BLOCK_4X4
1071 1, // BLOCK_4X8
1072 1, // BLOCK_8X4
1073 0, // BLOCK_8X8
1074 1, // BLOCK_8X16
1075 1, // BLOCK_16X8
1076 0, // BLOCK_16X16
1077 1, // BLOCK_16X32
1078 1, // BLOCK_32X16
1079 0, // BLOCK_32X32
1080 0, // BLOCK_32X64
1081 0, // BLOCK_64X32
1082 0, // BLOCK_64X64
1083#if CONFIG_EXT_PARTITION
1084 0, // BLOCK_64X128
1085 0, // BLOCK_128X64
1086 0, // BLOCK_128X128
1087#endif // CONFIG_EXT_PARTITION
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001088 0, // BLOCK_4X16
1089 0, // BLOCK_16X4
1090 0, // BLOCK_8X32
1091 0, // BLOCK_32X8
Rupert Swarbrick72678572017-08-02 12:05:26 +01001092 0, // BLOCK_16X64
1093 0, // BLOCK_64X16
Yaowu Xuc27fc142016-08-22 16:08:15 -07001094 };
1095
1096 return LUT[bsize];
1097}
1098
Yue Chen49587a72016-09-28 17:09:47 -07001099static INLINE int is_rect_tx_allowed(const MACROBLOCKD *xd,
1100 const MB_MODE_INFO *mbmi) {
Urvang Joshifeb925f2016-12-05 10:37:29 -08001101 return is_rect_tx_allowed_bsize(mbmi->sb_type) &&
Yue Chen49587a72016-09-28 17:09:47 -07001102 !xd->lossless[mbmi->segment_id];
Yaowu Xuc27fc142016-08-22 16:08:15 -07001103}
Yue Chend6bdd462017-07-19 16:05:43 -07001104#endif // CONFIG_RECT_TX
1105#endif // CONFIG_EXT_TX
Yue Chen56e226e2017-05-02 16:21:40 -07001106
Yue Chend6bdd462017-07-19 16:05:43 -07001107#if CONFIG_RECT_TX_EXT && (CONFIG_EXT_TX || CONFIG_VAR_TX)
Yue Chen56e226e2017-05-02 16:21:40 -07001108static INLINE int is_quarter_tx_allowed_bsize(BLOCK_SIZE bsize) {
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001109 static const char LUT_QTTX[BLOCK_SIZES_ALL] = {
Timothy B. Terriberry81ec2612017-04-26 16:53:47 -07001110#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8
Yue Chen56e226e2017-05-02 16:21:40 -07001111 0, // BLOCK_2X2
1112 0, // BLOCK_2X4
1113 0, // BLOCK_4X2
1114#endif
1115 0, // BLOCK_4X4
1116 0, // BLOCK_4X8
1117 0, // BLOCK_8X4
1118 0, // BLOCK_8X8
1119 1, // BLOCK_8X16
1120 1, // BLOCK_16X8
1121 0, // BLOCK_16X16
1122 0, // BLOCK_16X32
1123 0, // BLOCK_32X16
1124 0, // BLOCK_32X32
1125 0, // BLOCK_32X64
1126 0, // BLOCK_64X32
1127 0, // BLOCK_64X64
1128#if CONFIG_EXT_PARTITION
1129 0, // BLOCK_64X128
1130 0, // BLOCK_128X64
1131 0, // BLOCK_128X128
1132#endif // CONFIG_EXT_PARTITION
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001133 0, // BLOCK_4X16
1134 0, // BLOCK_16X4
1135 0, // BLOCK_8X32
1136 0, // BLOCK_32X8
Rupert Swarbrick72678572017-08-02 12:05:26 +01001137 0, // BLOCK_16X64
1138 0, // BLOCK_64X16
Yue Chen56e226e2017-05-02 16:21:40 -07001139 };
1140
1141 return LUT_QTTX[bsize];
1142}
1143
1144static INLINE int is_quarter_tx_allowed(const MACROBLOCKD *xd,
1145 const MB_MODE_INFO *mbmi,
1146 int is_inter) {
1147 return is_quarter_tx_allowed_bsize(mbmi->sb_type) && is_inter &&
1148 !xd->lossless[mbmi->segment_id];
1149}
Yue Chend6bdd462017-07-19 16:05:43 -07001150#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -07001151
1152static INLINE TX_SIZE tx_size_from_tx_mode(BLOCK_SIZE bsize, TX_MODE tx_mode,
1153 int is_inter) {
1154 const TX_SIZE largest_tx_size = tx_mode_to_biggest_tx_size[tx_mode];
Debargha Mukherjee428bbb22017-03-17 07:30:24 -07001155#if (CONFIG_VAR_TX || CONFIG_EXT_TX) && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -08001156 const TX_SIZE max_rect_tx_size = max_txsize_rect_lookup[bsize];
Jingning Han70e5f3f2016-11-09 17:03:07 -08001157#else
Yaowu Xuc27fc142016-08-22 16:08:15 -07001158 const TX_SIZE max_tx_size = max_txsize_lookup[bsize];
Debargha Mukherjee428bbb22017-03-17 07:30:24 -07001159#endif // (CONFIG_VAR_TX || CONFIG_EXT_TX) && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -08001160 (void)is_inter;
Debargha Mukherjee428bbb22017-03-17 07:30:24 -07001161#if CONFIG_VAR_TX && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -08001162#if CONFIG_CB4X4
1163 if (bsize == BLOCK_4X4)
1164 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
1165#else
1166 if (bsize < BLOCK_8X8)
1167 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
Jingning Han70e5f3f2016-11-09 17:03:07 -08001168#endif
Urvang Joshifeb925f2016-12-05 10:37:29 -08001169 if (txsize_sqr_map[max_rect_tx_size] <= largest_tx_size)
1170 return max_rect_tx_size;
1171 else
1172 return largest_tx_size;
1173#elif CONFIG_EXT_TX && CONFIG_RECT_TX
1174 if (txsize_sqr_up_map[max_rect_tx_size] <= largest_tx_size) {
1175 return max_rect_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -07001176 } else {
Urvang Joshifeb925f2016-12-05 10:37:29 -08001177 return largest_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -07001178 }
1179#else
Yaowu Xuf883b422016-08-30 14:01:10 -07001180 return AOMMIN(max_tx_size, largest_tx_size);
Debargha Mukherjee428bbb22017-03-17 07:30:24 -07001181#endif // CONFIG_VAR_TX && CONFIG_RECT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -07001182}
1183
hui su5db97432016-10-14 16:10:14 -07001184#if CONFIG_EXT_INTRA
hui su0a6731f2017-04-26 15:23:47 -07001185#define MAX_ANGLE_DELTA 3
1186#define ANGLE_STEP 3
hui su5db97432016-10-14 16:10:14 -07001187extern const int16_t dr_intra_derivative[90];
hui su02c79742017-05-16 17:19:04 -07001188static const uint8_t mode_to_angle_map[] = {
Urvang Joshi93b543a2017-06-01 17:32:41 -07001189 0, 90, 180, 45, 135, 111, 157, 203, 67, 0, 0,
hui su02c79742017-05-16 17:19:04 -07001190#if CONFIG_SMOOTH_HV
1191 0, 0,
1192#endif // CONFIG_SMOOTH_HV
hui su5db97432016-10-14 16:10:14 -07001193};
hui sueda3d762016-12-06 16:58:23 -08001194#if CONFIG_INTRA_INTERP
hui su5db97432016-10-14 16:10:14 -07001195// Returns whether filter selection is needed for a given
1196// intra prediction angle.
Yaowu Xuf883b422016-08-30 14:01:10 -07001197int av1_is_intra_filter_switchable(int angle);
hui sueda3d762016-12-06 16:58:23 -08001198#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -07001199#endif // CONFIG_EXT_INTRA
1200
Monty Montgomerycb55dad2017-07-11 16:59:52 -04001201#if CONFIG_DCT_ONLY
1202#define FIXED_TX_TYPE 1
1203#else
Yaowu Xuc27fc142016-08-22 16:08:15 -07001204#define FIXED_TX_TYPE 0
Monty Montgomerycb55dad2017-07-11 16:59:52 -04001205#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -07001206
Angie Chiang752ccce2017-04-09 13:41:13 -07001207// Converts block_index for given transform size to index of the block in raster
1208// order.
1209static INLINE int av1_block_index_to_raster_order(TX_SIZE tx_size,
1210 int block_idx) {
1211 // For transform size 4x8, the possible block_idx values are 0 & 2, because
1212 // block_idx values are incremented in steps of size 'tx_width_unit x
1213 // tx_height_unit'. But, for this transform size, block_idx = 2 corresponds to
1214 // block number 1 in raster order, inside an 8x8 MI block.
1215 // For any other transform size, the two indices are equivalent.
1216 return (tx_size == TX_4X8 && block_idx == 2) ? 1 : block_idx;
1217}
1218
1219// Inverse of above function.
1220// Note: only implemented for transform sizes 4x4, 4x8 and 8x4 right now.
1221static INLINE int av1_raster_order_to_block_index(TX_SIZE tx_size,
1222 int raster_order) {
1223 assert(tx_size == TX_4X4 || tx_size == TX_4X8 || tx_size == TX_8X4);
1224 // We ensure that block indices are 0 & 2 if tx size is 4x8 or 8x4.
1225 return (tx_size == TX_4X4) ? raster_order : (raster_order > 0) ? 2 : 0;
1226}
1227
Yaowu Xuc27fc142016-08-22 16:08:15 -07001228static INLINE TX_TYPE get_default_tx_type(PLANE_TYPE plane_type,
1229 const MACROBLOCKD *xd, int block_idx,
1230 TX_SIZE tx_size) {
1231 const MB_MODE_INFO *const mbmi = &xd->mi[0]->mbmi;
1232
Monty Montgomerycb55dad2017-07-11 16:59:52 -04001233 if (CONFIG_DCT_ONLY || is_inter_block(mbmi) || plane_type != PLANE_TYPE_Y ||
Yaowu Xuc27fc142016-08-22 16:08:15 -07001234 xd->lossless[mbmi->segment_id] || tx_size >= TX_32X32)
1235 return DCT_DCT;
1236
1237 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
1238 ? get_y_mode(xd->mi[0], block_idx)
Luc Trudeaud6d9eee2017-07-12 12:36:50 -04001239 : get_uv_mode(mbmi->uv_mode)];
Yaowu Xuc27fc142016-08-22 16:08:15 -07001240}
1241
hui su45b64752017-07-12 16:54:35 -07001242static INLINE TX_TYPE av1_get_tx_type(PLANE_TYPE plane_type,
Jingning Han19b5c8f2017-07-06 15:10:12 -07001243 const MACROBLOCKD *xd, int blk_row,
1244 int blk_col, int block, TX_SIZE tx_size) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001245 const MODE_INFO *const mi = xd->mi[0];
1246 const MB_MODE_INFO *const mbmi = &mi->mbmi;
Jingning Han19b5c8f2017-07-06 15:10:12 -07001247 (void)blk_row;
1248 (void)blk_col;
Alex Conversedaa15e42017-05-02 14:27:16 -07001249#if CONFIG_INTRABC && (!CONFIG_EXT_TX || CONFIG_TXK_SEL)
1250 // TODO(aconverse@google.com): Handle INTRABC + EXT_TX + TXK_SEL
Alex Converse28744302017-04-13 14:46:22 -07001251 if (is_intrabc_block(mbmi)) return DCT_DCT;
Alex Conversedaa15e42017-05-02 14:27:16 -07001252#endif // CONFIG_INTRABC && (!CONFIG_EXT_TX || CONFIG_TXK_SEL)
hui su45b64752017-07-12 16:54:35 -07001253
1254#if CONFIG_TXK_SEL
1255 TX_TYPE tx_type;
Jingning Han19b5c8f2017-07-06 15:10:12 -07001256 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] >= TX_32X32) {
hui su45b64752017-07-12 16:54:35 -07001257 tx_type = DCT_DCT;
1258 } else {
Jingning Han19b5c8f2017-07-06 15:10:12 -07001259 if (plane_type == PLANE_TYPE_Y)
1260 tx_type = mbmi->txk_type[(blk_row << 4) + blk_col];
1261 else if (is_inter_block(mbmi))
1262 tx_type = mbmi->txk_type[(blk_row << 5) + (blk_col << 1)];
1263 else
1264 tx_type = intra_mode_to_tx_type_context[mbmi->uv_mode];
hui su45b64752017-07-12 16:54:35 -07001265 }
1266 assert(tx_type >= DCT_DCT && tx_type < TX_TYPES);
1267 return tx_type;
1268#endif // CONFIG_TXK_SEL
1269
James Zern7cdaa602017-04-20 20:12:46 -07001270#if FIXED_TX_TYPE
Angie Chiangc2ebfbf2017-04-15 13:56:58 -07001271 const int block_raster_idx = av1_block_index_to_raster_order(tx_size, block);
James Zern7cdaa602017-04-20 20:12:46 -07001272 return get_default_tx_type(plane_type, xd, block_raster_idx, tx_size);
hui su45b64752017-07-12 16:54:35 -07001273#endif // FIXED_TX_TYPE
1274
1275#if CONFIG_EXT_TX
Sarah Parker53f93db2017-07-11 17:20:04 -07001276#if CONFIG_MRC_TX
1277 if (mbmi->tx_type == MRC_DCT) {
Sarah Parker2e08d962017-08-01 19:51:20 -07001278 assert(((is_inter_block(mbmi) && USE_MRC_INTER) ||
1279 (!is_inter_block(mbmi) && USE_MRC_INTRA)) &&
1280 "INVALID BLOCK TYPE FOR MRC_DCT");
Sarah Parker53f93db2017-07-11 17:20:04 -07001281 if (plane_type == PLANE_TYPE_Y) {
1282 assert(tx_size == TX_32X32);
1283 return mbmi->tx_type;
1284 }
1285 return DCT_DCT;
1286 }
1287#endif // CONFIG_MRC_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -07001288 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] > TX_32X32 ||
1289 (txsize_sqr_map[tx_size] >= TX_32X32 && !is_inter_block(mbmi)))
Yaowu Xuc27fc142016-08-22 16:08:15 -07001290 return DCT_DCT;
Jingning Han8260d8b2016-12-28 13:48:43 -08001291 if (mbmi->sb_type >= BLOCK_8X8 || CONFIG_CB4X4) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001292 if (plane_type == PLANE_TYPE_Y) {
1293#if !ALLOW_INTRA_EXT_TX
1294 if (is_inter_block(mbmi))
1295#endif // ALLOW_INTRA_EXT_TX
1296 return mbmi->tx_type;
1297 }
Jingning Han1a00cff2016-12-28 14:53:14 -08001298
1299 if (is_inter_block(mbmi)) {
1300// UV Inter only
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -07001301#if CONFIG_CHROMA_2X2
Jingning Han1a00cff2016-12-28 14:53:14 -08001302 if (tx_size < TX_4X4) return DCT_DCT;
1303#endif
Debargha Mukherjee5a488a62016-11-22 22:24:10 -08001304 return (mbmi->tx_type == IDTX && txsize_sqr_map[tx_size] >= TX_32X32)
Yaowu Xuc27fc142016-08-22 16:08:15 -07001305 ? DCT_DCT
1306 : mbmi->tx_type;
Jingning Han1a00cff2016-12-28 14:53:14 -08001307 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001308 }
1309
Jingning Han8260d8b2016-12-28 13:48:43 -08001310#if CONFIG_CB4X4
Thomas Daedeb7e72f32017-04-26 13:40:31 -07001311 (void)block;
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -07001312#if CONFIG_CHROMA_2X2
Jingning Han1a00cff2016-12-28 14:53:14 -08001313 if (tx_size < TX_4X4)
1314 return DCT_DCT;
1315 else
hui su45b64752017-07-12 16:54:35 -07001316#endif // CONFIG_CHROMA_2X2
Luc Trudeaud6d9eee2017-07-12 12:36:50 -04001317 return intra_mode_to_tx_type_context[get_uv_mode(mbmi->uv_mode)];
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -07001318#else // CONFIG_CB4X4
Yaowu Xuc27fc142016-08-22 16:08:15 -07001319 // Sub8x8-Inter/Intra OR UV-Intra
hui su45b64752017-07-12 16:54:35 -07001320 if (is_inter_block(mbmi)) { // Sub8x8-Inter
Yaowu Xuc27fc142016-08-22 16:08:15 -07001321 return DCT_DCT;
hui su45b64752017-07-12 16:54:35 -07001322 } else { // Sub8x8 Intra OR UV-Intra
1323 const int block_raster_idx =
1324 av1_block_index_to_raster_order(tx_size, block);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001325 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
Angie Chiang752ccce2017-04-09 13:41:13 -07001326 ? get_y_mode(mi, block_raster_idx)
Luc Trudeaud6d9eee2017-07-12 12:36:50 -04001327 : get_uv_mode(mbmi->uv_mode)];
hui su45b64752017-07-12 16:54:35 -07001328 }
Thomas Daedeb7e72f32017-04-26 13:40:31 -07001329#endif // CONFIG_CB4X4
Yaowu Xuc27fc142016-08-22 16:08:15 -07001330#else // CONFIG_EXT_TX
Angie Chiang752ccce2017-04-09 13:41:13 -07001331 (void)block;
Sarah Parker53f93db2017-07-11 17:20:04 -07001332#if CONFIG_MRC_TX
1333 if (mbmi->tx_type == MRC_DCT) {
1334 if (plane_type == PLANE_TYPE_Y && !xd->lossless[mbmi->segment_id]) {
1335 assert(tx_size == TX_32X32);
1336 return mbmi->tx_type;
1337 }
1338 return DCT_DCT;
1339 }
1340#endif // CONFIG_MRC_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -07001341 if (plane_type != PLANE_TYPE_Y || xd->lossless[mbmi->segment_id] ||
1342 txsize_sqr_map[tx_size] >= TX_32X32)
1343 return DCT_DCT;
1344 return mbmi->tx_type;
1345#endif // CONFIG_EXT_TX
1346}
1347
Yaowu Xuf883b422016-08-30 14:01:10 -07001348void av1_setup_block_planes(MACROBLOCKD *xd, int ss_x, int ss_y);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001349
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001350static INLINE int tx_size_to_depth(TX_SIZE tx_size) {
Timothy B. Terriberryfe0fb1d2017-05-18 12:15:16 -07001351 return (int)(tx_size - TX_SIZE_LUMA_MIN);
Jingning Han4e1737a2016-10-25 16:05:02 -07001352}
1353
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001354static INLINE TX_SIZE depth_to_tx_size(int depth) {
Timothy B. Terriberryfe0fb1d2017-05-18 12:15:16 -07001355 return (TX_SIZE)(depth + TX_SIZE_LUMA_MIN);
Jingning Han4e1737a2016-10-25 16:05:02 -07001356}
1357
hui su0c6244b2017-07-12 17:11:43 -07001358static INLINE TX_SIZE av1_get_uv_tx_size(const MB_MODE_INFO *mbmi,
1359 const struct macroblockd_plane *pd) {
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -07001360#if CONFIG_CHROMA_2X2
Jingning Han93531242016-12-20 11:54:36 -08001361 assert(mbmi->tx_size > TX_2X2);
hui su0c6244b2017-07-12 17:11:43 -07001362#endif // CONFIG_CHROMA_2X2
Jingning Han93531242016-12-20 11:54:36 -08001363
Yaowu Xuc27fc142016-08-22 16:08:15 -07001364#if CONFIG_SUPERTX
1365 if (supertx_enabled(mbmi))
1366 return uvsupertx_size_lookup[txsize_sqr_map[mbmi->tx_size]]
1367 [pd->subsampling_x][pd->subsampling_y];
1368#endif // CONFIG_SUPERTX
Jingning Hancabd9892016-12-01 12:28:42 -08001369
hui su0c6244b2017-07-12 17:11:43 -07001370 const TX_SIZE uv_txsize =
1371 uv_txsize_lookup[mbmi->sb_type][mbmi->tx_size][pd->subsampling_x]
1372 [pd->subsampling_y];
Debargha Mukherjee2f123402016-08-30 17:43:38 -07001373 assert(uv_txsize != TX_INVALID);
1374 return uv_txsize;
Yaowu Xuc27fc142016-08-22 16:08:15 -07001375}
1376
hui su0c6244b2017-07-12 17:11:43 -07001377static INLINE TX_SIZE av1_get_tx_size(int plane, const MACROBLOCKD *xd) {
Angie Chiang80b82262017-02-24 11:39:47 -08001378 const MB_MODE_INFO *mbmi = &xd->mi[0]->mbmi;
hui su0c6244b2017-07-12 17:11:43 -07001379 if (plane == 0) return mbmi->tx_size;
Angie Chiang80b82262017-02-24 11:39:47 -08001380 const MACROBLOCKD_PLANE *pd = &xd->plane[plane];
hui su0c6244b2017-07-12 17:11:43 -07001381 return av1_get_uv_tx_size(mbmi, pd);
Angie Chiang80b82262017-02-24 11:39:47 -08001382}
1383
Yaowu Xuc27fc142016-08-22 16:08:15 -07001384static INLINE BLOCK_SIZE
1385get_plane_block_size(BLOCK_SIZE bsize, const struct macroblockd_plane *pd) {
1386 return ss_size_lookup[bsize][pd->subsampling_x][pd->subsampling_y];
1387}
1388
Timothy B. Terriberrya2d5cde2017-05-10 18:33:50 -07001389void av1_reset_skip_context(MACROBLOCKD *xd, int mi_row, int mi_col,
1390 BLOCK_SIZE bsize);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001391
1392typedef void (*foreach_transformed_block_visitor)(int plane, int block,
1393 int blk_row, int blk_col,
1394 BLOCK_SIZE plane_bsize,
1395 TX_SIZE tx_size, void *arg);
1396
Yaowu Xuf883b422016-08-30 14:01:10 -07001397void av1_foreach_transformed_block_in_plane(
Yaowu Xuc27fc142016-08-22 16:08:15 -07001398 const MACROBLOCKD *const xd, BLOCK_SIZE bsize, int plane,
1399 foreach_transformed_block_visitor visit, void *arg);
1400
Angie Chiang0397eda2017-03-15 16:57:14 -07001401#if CONFIG_LV_MAP
1402void av1_foreach_transformed_block(const MACROBLOCKD *const xd,
Jingning Han94652b82017-04-04 09:45:02 -07001403 BLOCK_SIZE bsize, int mi_row, int mi_col,
Angie Chiang0397eda2017-03-15 16:57:14 -07001404 foreach_transformed_block_visitor visit,
1405 void *arg);
1406#endif
1407
iole moccagattaf25a4cf2016-11-11 23:57:57 -08001408#if CONFIG_COEF_INTERLEAVE
1409static INLINE int get_max_4x4_size(int num_4x4, int mb_to_edge,
1410 int subsampling) {
1411 return num_4x4 + (mb_to_edge >= 0 ? 0 : mb_to_edge >> (5 + subsampling));
1412}
1413
1414void av1_foreach_transformed_block_interleave(
1415 const MACROBLOCKD *const xd, BLOCK_SIZE bsize,
1416 foreach_transformed_block_visitor visit, void *arg);
1417#endif
1418
Yaowu Xuf883b422016-08-30 14:01:10 -07001419void av1_set_contexts(const MACROBLOCKD *xd, struct macroblockd_plane *pd,
Jingning Haneee43152016-12-05 09:58:45 -08001420 int plane, TX_SIZE tx_size, int has_eob, int aoff,
1421 int loff);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001422
1423#if CONFIG_EXT_INTER
1424static INLINE int is_interintra_allowed_bsize(const BLOCK_SIZE bsize) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001425#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001426 // TODO(debargha): Should this be bsize < BLOCK_LARGEST?
1427 return (bsize >= BLOCK_8X8) && (bsize < BLOCK_64X64);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001428#else
1429 (void)bsize;
1430 return 0;
1431#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001432}
1433
1434static INLINE int is_interintra_allowed_mode(const PREDICTION_MODE mode) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001435#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001436 return (mode >= NEARESTMV) && (mode <= NEWMV);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001437#else
1438 (void)mode;
1439 return 0;
1440#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001441}
1442
1443static INLINE int is_interintra_allowed_ref(const MV_REFERENCE_FRAME rf[2]) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001444#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001445 return (rf[0] > INTRA_FRAME) && (rf[1] <= INTRA_FRAME);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001446#else
1447 (void)rf;
1448 return 0;
1449#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001450}
1451
1452static INLINE int is_interintra_allowed(const MB_MODE_INFO *mbmi) {
1453 return is_interintra_allowed_bsize(mbmi->sb_type) &&
1454 is_interintra_allowed_mode(mbmi->mode) &&
1455 is_interintra_allowed_ref(mbmi->ref_frame);
1456}
1457
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001458static INLINE int is_interintra_allowed_bsize_group(int group) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001459 int i;
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001460 for (i = 0; i < BLOCK_SIZES_ALL; i++) {
Urvang Joshicb586f32016-09-20 11:36:33 -07001461 if (size_group_lookup[i] == group &&
1462 is_interintra_allowed_bsize((BLOCK_SIZE)i)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001463 return 1;
Urvang Joshicb586f32016-09-20 11:36:33 -07001464 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001465 }
1466 return 0;
1467}
1468
1469static INLINE int is_interintra_pred(const MB_MODE_INFO *mbmi) {
1470 return (mbmi->ref_frame[1] == INTRA_FRAME) && is_interintra_allowed(mbmi);
1471}
1472#endif // CONFIG_EXT_INTER
1473
Sarah Parker106b3cb2017-04-21 12:13:37 -07001474#if CONFIG_VAR_TX
1475static INLINE int get_vartx_max_txsize(const MB_MODE_INFO *const mbmi,
1476 BLOCK_SIZE bsize) {
1477#if CONFIG_CB4X4
1478 (void)mbmi;
1479 return max_txsize_rect_lookup[bsize];
1480#endif // CONFIG_C4X4
1481 return mbmi->sb_type < BLOCK_8X8 ? max_txsize_rect_lookup[mbmi->sb_type]
1482 : max_txsize_rect_lookup[bsize];
1483}
1484#endif // CONFIG_VAR_TX
1485
Yue Chencb60b182016-10-13 15:18:22 -07001486#if CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
1487static INLINE int is_motion_variation_allowed_bsize(BLOCK_SIZE bsize) {
Debargha Mukherjeec17a4432017-08-28 22:22:45 -07001488 return AOMMIN(block_size_wide[bsize], block_size_high[bsize]) >= 8;
Yue Chencb60b182016-10-13 15:18:22 -07001489}
1490
Yue Chen8636da62017-04-03 01:23:44 -07001491static INLINE int is_motion_variation_allowed_compound(
1492 const MB_MODE_INFO *mbmi) {
Zoe Liu85b66462017-04-20 14:28:19 -07001493#if CONFIG_EXT_INTER && CONFIG_COMPOUND_SINGLEREF
1494 if (!has_second_ref(mbmi) && !is_inter_singleref_comp_mode(mbmi->mode))
1495#else
Yue Chen8636da62017-04-03 01:23:44 -07001496 if (!has_second_ref(mbmi))
Zoe Liu85b66462017-04-20 14:28:19 -07001497#endif // CONFIG_EXT_INTER && CONFIG_COMPOUND_SINGLEREF
Yue Chen8636da62017-04-03 01:23:44 -07001498 return 1;
1499 else
1500 return 0;
1501}
1502
Yue Chen5329a2b2017-02-28 17:33:00 +08001503#if CONFIG_MOTION_VAR
Yue Chen1bd42be2017-03-15 18:07:04 -07001504// input: log2 of length, 0(4), 1(8), ...
1505static const int max_neighbor_obmc[6] = { 0, 1, 2, 3, 4, 4 };
1506
Yue Chen5329a2b2017-02-28 17:33:00 +08001507static INLINE int check_num_overlappable_neighbors(const MB_MODE_INFO *mbmi) {
Yue Chen1bd42be2017-03-15 18:07:04 -07001508 return !(mbmi->overlappable_neighbors[0] == 0 &&
1509 mbmi->overlappable_neighbors[1] == 0);
Yue Chen5329a2b2017-02-28 17:33:00 +08001510}
Wei-Ting Lin20885282017-08-28 17:18:18 -07001511#if CONFIG_NCOBMC_ADAPT_WEIGHT
1512static INLINE NCOBMC_MODE ncobmc_mode_allowed_bsize(BLOCK_SIZE bsize) {
1513 if (bsize < BLOCK_8X8 || bsize >= BLOCK_64X64)
1514 return NO_OVERLAP;
1515 else
1516 return MAX_NCOBMC_MODES;
1517}
1518#endif // CONFIG_NCOBMC_ADAPT_WEIGHT
1519#endif // CONFIG_MOTION_VAR
Yue Chen5329a2b2017-02-28 17:33:00 +08001520
Sarah Parker19234cc2017-03-10 16:43:25 -08001521static INLINE MOTION_MODE motion_mode_allowed(
Sarah Parker0eea89f2017-07-11 11:56:36 -07001522#if CONFIG_GLOBAL_MOTION
Sarah Parker19234cc2017-03-10 16:43:25 -08001523 int block, const WarpedMotionParams *gm_params,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001524#endif // CONFIG_GLOBAL_MOTION
Yue Chen52c51732017-07-11 15:08:30 -07001525#if CONFIG_WARPED_MOTION
1526 const MACROBLOCKD *xd,
1527#endif
Sarah Parker19234cc2017-03-10 16:43:25 -08001528 const MODE_INFO *mi) {
1529 const MB_MODE_INFO *mbmi = &mi->mbmi;
RogerZhou3b635242017-09-19 10:06:46 -07001530#if CONFIG_AMVR
1531 if (xd->cur_frame_mv_precision_level == 0) {
1532#endif
Sarah Parker0eea89f2017-07-11 11:56:36 -07001533#if CONFIG_GLOBAL_MOTION
RogerZhou3b635242017-09-19 10:06:46 -07001534 const TransformationType gm_type = gm_params[mbmi->ref_frame[0]].wmtype;
1535 if (is_global_mv_block(mi, block, gm_type)) return SIMPLE_TRANSLATION;
Sarah Parker0eea89f2017-07-11 11:56:36 -07001536#endif // CONFIG_GLOBAL_MOTION
RogerZhou3b635242017-09-19 10:06:46 -07001537#if CONFIG_AMVR
1538 }
1539#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -07001540#if CONFIG_EXT_INTER
Yue Chen69f18e12016-09-08 14:48:15 -07001541 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
Yue Chen8636da62017-04-03 01:23:44 -07001542 is_inter_mode(mbmi->mode) && mbmi->ref_frame[1] != INTRA_FRAME &&
1543 is_motion_variation_allowed_compound(mbmi)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001544#else
Yue Chen69f18e12016-09-08 14:48:15 -07001545 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
Yue Chen8636da62017-04-03 01:23:44 -07001546 is_inter_mode(mbmi->mode) && is_motion_variation_allowed_compound(mbmi)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001547#endif // CONFIG_EXT_INTER
Yue Chen5329a2b2017-02-28 17:33:00 +08001548#if CONFIG_MOTION_VAR
1549 if (!check_num_overlappable_neighbors(mbmi)) return SIMPLE_TRANSLATION;
1550#endif
Yue Chen69f18e12016-09-08 14:48:15 -07001551#if CONFIG_WARPED_MOTION
Yue Chen52c51732017-07-11 15:08:30 -07001552 if (!has_second_ref(mbmi) && mbmi->num_proj_ref[0] >= 1 &&
Wei-Ting Lin20885282017-08-28 17:18:18 -07001553 !av1_is_scaled(&(xd->block_refs[0]->sf))) {
RogerZhou3b635242017-09-19 10:06:46 -07001554#if CONFIG_AMVR
1555 if (xd->cur_frame_mv_precision_level) {
1556 return OBMC_CAUSAL;
1557 }
1558#endif
Yue Chen69f18e12016-09-08 14:48:15 -07001559 return WARPED_CAUSAL;
Hui Su12231bd2017-09-07 18:01:15 -07001560 }
RogerZhou3b635242017-09-19 10:06:46 -07001561
Yue Chen69f18e12016-09-08 14:48:15 -07001562#endif // CONFIG_WARPED_MOTION
1563#if CONFIG_MOTION_VAR
Wei-Ting Lin20885282017-08-28 17:18:18 -07001564#if CONFIG_NCOBMC_ADAPT_WEIGHT
Hui Su12231bd2017-09-07 18:01:15 -07001565 if (ncobmc_mode_allowed_bsize(mbmi->sb_type) < NO_OVERLAP)
1566 return NCOBMC_ADAPT_WEIGHT;
1567 else
Wei-Ting Lin20885282017-08-28 17:18:18 -07001568#endif
Hui Su12231bd2017-09-07 18:01:15 -07001569 return OBMC_CAUSAL;
Yue Chen69f18e12016-09-08 14:48:15 -07001570#else
1571 return SIMPLE_TRANSLATION;
1572#endif // CONFIG_MOTION_VAR
1573 } else {
1574 return SIMPLE_TRANSLATION;
1575 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001576}
1577
Sarah Parker19234cc2017-03-10 16:43:25 -08001578static INLINE void assert_motion_mode_valid(MOTION_MODE mode,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001579#if CONFIG_GLOBAL_MOTION
Sarah Parker19234cc2017-03-10 16:43:25 -08001580 int block,
1581 const WarpedMotionParams *gm_params,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001582#endif // CONFIG_GLOBAL_MOTION
Yue Chen52c51732017-07-11 15:08:30 -07001583#if CONFIG_WARPED_MOTION
1584 const MACROBLOCKD *xd,
1585#endif
Sarah Parker19234cc2017-03-10 16:43:25 -08001586 const MODE_INFO *mi) {
1587 const MOTION_MODE last_motion_mode_allowed = motion_mode_allowed(
Sarah Parker0eea89f2017-07-11 11:56:36 -07001588#if CONFIG_GLOBAL_MOTION
Sarah Parker19234cc2017-03-10 16:43:25 -08001589 block, gm_params,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001590#endif // CONFIG_GLOBAL_MOTION
Yue Chen52c51732017-07-11 15:08:30 -07001591#if CONFIG_WARPED_MOTION
1592 xd,
1593#endif
Sarah Parker19234cc2017-03-10 16:43:25 -08001594 mi);
Wei-Ting Lin20885282017-08-28 17:18:18 -07001595
Sarah Parker19234cc2017-03-10 16:43:25 -08001596 // Check that the input mode is not illegal
1597 if (last_motion_mode_allowed < mode)
1598 assert(0 && "Illegal motion mode selected");
1599}
1600
Yue Chencb60b182016-10-13 15:18:22 -07001601#if CONFIG_MOTION_VAR
Yaowu Xuc27fc142016-08-22 16:08:15 -07001602static INLINE int is_neighbor_overlappable(const MB_MODE_INFO *mbmi) {
1603 return (is_inter_block(mbmi));
1604}
Yue Chencb60b182016-10-13 15:18:22 -07001605#endif // CONFIG_MOTION_VAR
1606#endif // CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
Yaowu Xuc27fc142016-08-22 16:08:15 -07001607
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001608// Returns sub-sampled dimensions of the given block.
1609// The output values for 'rows_within_bounds' and 'cols_within_bounds' will
RogerZhou3b635242017-09-19 10:06:46 -07001610// differ from 'height' and 'width' when part of the block is outside the
1611// right
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001612// and/or bottom image boundary.
1613static INLINE void av1_get_block_dimensions(BLOCK_SIZE bsize, int plane,
1614 const MACROBLOCKD *xd, int *width,
1615 int *height,
1616 int *rows_within_bounds,
1617 int *cols_within_bounds) {
1618 const int block_height = block_size_high[bsize];
1619 const int block_width = block_size_wide[bsize];
1620 const int block_rows = (xd->mb_to_bottom_edge >= 0)
1621 ? block_height
1622 : (xd->mb_to_bottom_edge >> 3) + block_height;
1623 const int block_cols = (xd->mb_to_right_edge >= 0)
1624 ? block_width
1625 : (xd->mb_to_right_edge >> 3) + block_width;
1626 const struct macroblockd_plane *const pd = &xd->plane[plane];
1627 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_x == 0));
1628 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_y == 0));
1629 assert(block_width >= block_cols);
1630 assert(block_height >= block_rows);
1631 if (width) *width = block_width >> pd->subsampling_x;
1632 if (height) *height = block_height >> pd->subsampling_y;
1633 if (rows_within_bounds) *rows_within_bounds = block_rows >> pd->subsampling_y;
1634 if (cols_within_bounds) *cols_within_bounds = block_cols >> pd->subsampling_x;
1635}
1636
Sarah Parkerefd8af22017-08-25 16:36:06 -07001637/* clang-format off */
1638typedef aom_cdf_prob (*MapCdf)[PALETTE_COLOR_INDEX_CONTEXTS]
1639 [CDF_SIZE(PALETTE_COLORS)];
1640typedef const int (*ColorCost)[PALETTE_SIZES][PALETTE_COLOR_INDEX_CONTEXTS]
1641 [PALETTE_COLORS];
1642/* clang-format on */
1643
1644typedef struct {
1645 int rows;
1646 int cols;
1647 int n_colors;
1648 int plane_width;
1649 int plane_height;
1650 uint8_t *color_map;
1651 MapCdf map_cdf;
1652 ColorCost color_cost;
1653} Av1ColorMapParam;
1654
Yue Chen19e7aa82016-11-30 14:05:39 -08001655#if CONFIG_GLOBAL_MOTION
1656static INLINE int is_nontrans_global_motion(const MACROBLOCKD *xd) {
1657 const MODE_INFO *mi = xd->mi[0];
1658 const MB_MODE_INFO *const mbmi = &mi->mbmi;
1659 int ref;
1660#if CONFIG_CB4X4
1661 const int unify_bsize = 1;
1662#else
1663 const int unify_bsize = 0;
1664#endif
1665
1666 // First check if all modes are ZEROMV
1667 if (mbmi->sb_type >= BLOCK_8X8 || unify_bsize) {
1668#if CONFIG_EXT_INTER
1669 if (mbmi->mode != ZEROMV && mbmi->mode != ZERO_ZEROMV) return 0;
1670#else
1671 if (mbmi->mode != ZEROMV) return 0;
1672#endif // CONFIG_EXT_INTER
1673 } else {
1674#if CONFIG_EXT_INTER
David Barkera0c16382017-07-07 17:01:30 +01001675 if ((mi->bmi[0].as_mode != ZEROMV && mi->bmi[0].as_mode != ZERO_ZEROMV) ||
1676 (mi->bmi[1].as_mode != ZEROMV && mi->bmi[1].as_mode != ZERO_ZEROMV) ||
1677 (mi->bmi[2].as_mode != ZEROMV && mi->bmi[2].as_mode != ZERO_ZEROMV) ||
1678 (mi->bmi[3].as_mode != ZEROMV && mi->bmi[3].as_mode != ZERO_ZEROMV))
Yue Chen19e7aa82016-11-30 14:05:39 -08001679 return 0;
1680#else
1681 if (mi->bmi[0].as_mode != ZEROMV || mi->bmi[1].as_mode != ZEROMV ||
1682 mi->bmi[2].as_mode != ZEROMV || mi->bmi[3].as_mode != ZEROMV)
1683 return 0;
1684#endif // CONFIG_EXT_INTER
1685 }
Jingning Han3ca0e672017-04-14 19:48:05 -07001686
1687#if !GLOBAL_SUB8X8_USED
1688 if (mbmi->sb_type < BLOCK_8X8) return 0;
1689#endif
1690
Yue Chen19e7aa82016-11-30 14:05:39 -08001691 // Now check if all global motion is non translational
1692 for (ref = 0; ref < 1 + has_second_ref(mbmi); ++ref) {
1693 if (xd->global_motion[mbmi->ref_frame[ref]].wmtype <= TRANSLATION) return 0;
1694 }
1695 return 1;
1696}
1697#endif // CONFIG_GLOBAL_MOTION
1698
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001699static INLINE PLANE_TYPE get_plane_type(int plane) {
Luc Trudeau005feb62017-02-22 13:34:01 -05001700 return (plane == 0) ? PLANE_TYPE_Y : PLANE_TYPE_UV;
1701}
1702
Angie Chiang155bf9a2017-08-06 19:52:57 -07001703static INLINE void transpose_uint8(uint8_t *dst, int dst_stride,
1704 const uint8_t *src, int src_stride, int w,
1705 int h) {
1706 int r, c;
1707 for (r = 0; r < h; ++r)
1708 for (c = 0; c < w; ++c) dst[c * dst_stride + r] = src[r * src_stride + c];
1709}
1710
1711static INLINE void transpose_uint16(uint16_t *dst, int dst_stride,
1712 const uint16_t *src, int src_stride, int w,
1713 int h) {
1714 int r, c;
1715 for (r = 0; r < h; ++r)
1716 for (c = 0; c < w; ++c) dst[c * dst_stride + r] = src[r * src_stride + c];
1717}
1718
1719static INLINE void transpose_int16(int16_t *dst, int dst_stride,
1720 const int16_t *src, int src_stride, int w,
1721 int h) {
1722 int r, c;
1723 for (r = 0; r < h; ++r)
1724 for (c = 0; c < w; ++c) dst[c * dst_stride + r] = src[r * src_stride + c];
1725}
1726
1727static INLINE void transpose_int32(int32_t *dst, int dst_stride,
1728 const int32_t *src, int src_stride, int w,
1729 int h) {
1730 int r, c;
1731 for (r = 0; r < h; ++r)
1732 for (c = 0; c < w; ++c) dst[c * dst_stride + r] = src[r * src_stride + c];
1733}
1734
Yaowu Xuc27fc142016-08-22 16:08:15 -07001735#ifdef __cplusplus
1736} // extern "C"
1737#endif
1738
Yaowu Xuf883b422016-08-30 14:01:10 -07001739#endif // AV1_COMMON_BLOCKD_H_