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Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_COMMON_BLOCKD_H_
13#define AV1_COMMON_BLOCKD_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
Yaowu Xuf883b422016-08-30 14:01:10 -070015#include "./aom_config.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070016
Yaowu Xuf883b422016-08-30 14:01:10 -070017#include "aom_dsp/aom_dsp_common.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070018#include "aom_ports/mem.h"
19#include "aom_scale/yv12config.h"
20
21#include "av1/common/common_data.h"
22#include "av1/common/quant_common.h"
23#include "av1/common/entropy.h"
24#include "av1/common/entropymode.h"
25#include "av1/common/mv.h"
26#include "av1/common/scale.h"
27#include "av1/common/seg_common.h"
28#include "av1/common/tile_common.h"
Yushin Cho77bba8d2016-11-04 16:36:56 -070029#if CONFIG_PVQ
30#include "av1/common/pvq.h"
31#include "av1/common/pvq_state.h"
32#include "av1/decoder/decint.h"
33#endif
Luc Trudeaubaeb3752017-04-24 11:19:25 -040034#if CONFIG_CFL
35#include "av1/common/cfl.h"
36#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070037#ifdef __cplusplus
38extern "C" {
39#endif
40
Jingning Han69d21012017-05-14 16:51:27 -070041#if (CONFIG_CHROMA_SUB8X8 || CONFIG_CHROMA_2X2)
42#define SUB8X8_COMP_REF 0
43#else
44#define SUB8X8_COMP_REF 1
45#endif
Jingning Hanc41a5492017-02-24 11:18:52 -080046
Yaowu Xuc27fc142016-08-22 16:08:15 -070047#define MAX_MB_PLANE 3
48
David Barkerac37fa32016-12-02 12:30:21 +000049#if CONFIG_EXT_INTER
Sarah Parkerb9f757c2017-01-06 17:12:24 -080050
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080051#if CONFIG_COMPOUND_SEGMENT
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080052// Set COMPOUND_SEGMENT_TYPE to one of the three
53// 0: Uniform
54// 1: Difference weighted
55#define COMPOUND_SEGMENT_TYPE 1
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080056#define MAX_SEG_MASK_BITS 1
Yaowu Xuf35f5272017-05-10 08:00:02 -070057
Sarah Parkerb9f757c2017-01-06 17:12:24 -080058// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
59typedef enum {
Yaowu Xuf35f5272017-05-10 08:00:02 -070060#if COMPOUND_SEGMENT_TYPE == 0
Sarah Parkerb9f757c2017-01-06 17:12:24 -080061 UNIFORM_45 = 0,
62 UNIFORM_45_INV,
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080063#elif COMPOUND_SEGMENT_TYPE == 1
Sarah Parker7bb84f32017-05-09 15:17:46 -070064 DIFFWTD_38 = 0,
65 DIFFWTD_38_INV,
Yaowu Xuf35f5272017-05-10 08:00:02 -070066#endif // COMPOUND_SEGMENT_TYPE
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080067 SEG_MASK_TYPES,
68} SEG_MASK_TYPE;
69
Sarah Parkerb9f757c2017-01-06 17:12:24 -080070#endif // CONFIG_COMPOUND_SEGMENT
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080071#endif // CONFIG_EXT_INTER
David Barkerac37fa32016-12-02 12:30:21 +000072
Yaowu Xuc27fc142016-08-22 16:08:15 -070073typedef enum {
74 KEY_FRAME = 0,
75 INTER_FRAME = 1,
76 FRAME_TYPES,
77} FRAME_TYPE;
78
Yaowu Xuc27fc142016-08-22 16:08:15 -070079static INLINE int is_inter_mode(PREDICTION_MODE mode) {
80#if CONFIG_EXT_INTER
81 return mode >= NEARESTMV && mode <= NEW_NEWMV;
82#else
83 return mode >= NEARESTMV && mode <= NEWMV;
84#endif // CONFIG_EXT_INTER
85}
86
Yushin Cho77bba8d2016-11-04 16:36:56 -070087#if CONFIG_PVQ
88typedef struct PVQ_INFO {
89 int theta[PVQ_MAX_PARTITIONS];
Yushin Cho77bba8d2016-11-04 16:36:56 -070090 int qg[PVQ_MAX_PARTITIONS];
91 int k[PVQ_MAX_PARTITIONS];
Yushin Cho48f84db2016-11-07 21:20:17 -080092 od_coeff y[OD_TXSIZE_MAX * OD_TXSIZE_MAX];
Yushin Cho77bba8d2016-11-04 16:36:56 -070093 int nb_bands;
94 int off[PVQ_MAX_PARTITIONS];
95 int size[PVQ_MAX_PARTITIONS];
96 int skip_rest;
97 int skip_dir;
ltrudeaue1c09292017-01-20 15:42:13 -050098 int bs; // log of the block size minus two,
99 // i.e. equivalent to aom's TX_SIZE
100 // Block skip info, indicating whether DC/AC, is coded.
101 PVQ_SKIP_TYPE ac_dc_coded; // bit0: DC coded, bit1 : AC coded (1 means coded)
Yushin Cho77bba8d2016-11-04 16:36:56 -0700102 tran_low_t dq_dc_residue;
103} PVQ_INFO;
104
105typedef struct PVQ_QUEUE {
106 PVQ_INFO *buf; // buffer for pvq info, stored in encoding order
107 int curr_pos; // curr position to write PVQ_INFO
108 int buf_len; // allocated buffer length
109 int last_pos; // last written position of PVQ_INFO in a tile
110} PVQ_QUEUE;
111#endif
112
David Barkerac37fa32016-12-02 12:30:21 +0000113typedef struct {
114 uint8_t *plane[MAX_MB_PLANE];
115 int stride[MAX_MB_PLANE];
116} BUFFER_SET;
117
Yaowu Xuc27fc142016-08-22 16:08:15 -0700118#if CONFIG_EXT_INTER
119static INLINE int is_inter_singleref_mode(PREDICTION_MODE mode) {
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700120 return mode >= NEARESTMV && mode <= NEWMV;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700121}
Zoe Liu85b66462017-04-20 14:28:19 -0700122static INLINE int is_inter_compound_mode(PREDICTION_MODE mode) {
123 return mode >= NEAREST_NEARESTMV && mode <= NEW_NEWMV;
124}
Zoe Liu239f06b2017-04-20 13:10:55 -0700125#if CONFIG_COMPOUND_SINGLEREF
126static INLINE int is_inter_singleref_comp_mode(PREDICTION_MODE mode) {
127 return mode >= SR_NEAREST_NEARMV && mode <= SR_NEW_NEWMV;
128}
Zoe Liu85b66462017-04-20 14:28:19 -0700129static INLINE int is_inter_anyref_comp_mode(PREDICTION_MODE mode) {
130 return is_inter_compound_mode(mode) || is_inter_singleref_comp_mode(mode);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700131}
Zoe Liu85b66462017-04-20 14:28:19 -0700132#endif // CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700133
134static INLINE PREDICTION_MODE compound_ref0_mode(PREDICTION_MODE mode) {
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700135 static PREDICTION_MODE lut[] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800136 MB_MODE_COUNT, // DC_PRED
137 MB_MODE_COUNT, // V_PRED
138 MB_MODE_COUNT, // H_PRED
139 MB_MODE_COUNT, // D45_PRED
140 MB_MODE_COUNT, // D135_PRED
141 MB_MODE_COUNT, // D117_PRED
142 MB_MODE_COUNT, // D153_PRED
143 MB_MODE_COUNT, // D207_PRED
144 MB_MODE_COUNT, // D63_PRED
145#if CONFIG_ALT_INTRA
146 MB_MODE_COUNT, // SMOOTH_PRED
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700147#if CONFIG_SMOOTH_HV
148 MB_MODE_COUNT, // SMOOTH_V_PRED
149 MB_MODE_COUNT, // SMOOTH_H_PRED
150#endif // CONFIG_SMOOTH_HV
Urvang Joshi102245d2016-11-28 13:05:36 -0800151#endif // CONFIG_ALT_INTRA
152 MB_MODE_COUNT, // TM_PRED
153 MB_MODE_COUNT, // NEARESTMV
154 MB_MODE_COUNT, // NEARMV
155 MB_MODE_COUNT, // ZEROMV
156 MB_MODE_COUNT, // NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700157#if CONFIG_COMPOUND_SINGLEREF
158 NEARESTMV, // SR_NEAREST_NEARMV
Zoe Liu85b66462017-04-20 14:28:19 -0700159 // NEARESTMV, // SR_NEAREST_NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700160 NEARMV, // SR_NEAR_NEWMV
161 ZEROMV, // SR_ZERO_NEWMV
162 NEWMV, // SR_NEW_NEWMV
163#endif // CONFIG_COMPOUND_SINGLEREF
164 NEARESTMV, // NEAREST_NEARESTMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700165 NEARMV, // NEAR_NEARMV
166 NEARESTMV, // NEAREST_NEWMV
167 NEWMV, // NEW_NEARESTMV
168 NEARMV, // NEAR_NEWMV
169 NEWMV, // NEW_NEARMV
170 ZEROMV, // ZERO_ZEROMV
171 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700172 };
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700173 assert(NELEMENTS(lut) == MB_MODE_COUNT);
Zoe Liu85b66462017-04-20 14:28:19 -0700174#if CONFIG_COMPOUND_SINGLEREF
175 assert(is_inter_anyref_comp_mode(mode));
176#else // !CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700177 assert(is_inter_compound_mode(mode));
Zoe Liu85b66462017-04-20 14:28:19 -0700178#endif // CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700179 return lut[mode];
180}
181
182static INLINE PREDICTION_MODE compound_ref1_mode(PREDICTION_MODE mode) {
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700183 static PREDICTION_MODE lut[] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800184 MB_MODE_COUNT, // DC_PRED
185 MB_MODE_COUNT, // V_PRED
186 MB_MODE_COUNT, // H_PRED
187 MB_MODE_COUNT, // D45_PRED
188 MB_MODE_COUNT, // D135_PRED
189 MB_MODE_COUNT, // D117_PRED
190 MB_MODE_COUNT, // D153_PRED
191 MB_MODE_COUNT, // D207_PRED
192 MB_MODE_COUNT, // D63_PRED
193#if CONFIG_ALT_INTRA
194 MB_MODE_COUNT, // SMOOTH_PRED
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700195#if CONFIG_SMOOTH_HV
196 MB_MODE_COUNT, // SMOOTH_V_PRED
197 MB_MODE_COUNT, // SMOOTH_H_PRED
198#endif // CONFIG_SMOOTH_HV
Urvang Joshi102245d2016-11-28 13:05:36 -0800199#endif // CONFIG_ALT_INTRA
200 MB_MODE_COUNT, // TM_PRED
201 MB_MODE_COUNT, // NEARESTMV
202 MB_MODE_COUNT, // NEARMV
203 MB_MODE_COUNT, // ZEROMV
204 MB_MODE_COUNT, // NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700205#if CONFIG_COMPOUND_SINGLEREF
Zoe Liu85b66462017-04-20 14:28:19 -0700206 NEARMV, // SR_NEAREST_NEARMV
207 // NEWMV, // SR_NEAREST_NEWMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700208 NEWMV, // SR_NEAR_NEWMV
209 NEWMV, // SR_ZERO_NEWMV
210 NEWMV, // SR_NEW_NEWMV
211#endif // CONFIG_COMPOUND_SINGLEREF
212 NEARESTMV, // NEAREST_NEARESTMV
Zoe Liu239f06b2017-04-20 13:10:55 -0700213 NEARMV, // NEAR_NEARMV
214 NEWMV, // NEAREST_NEWMV
215 NEARESTMV, // NEW_NEARESTMV
216 NEWMV, // NEAR_NEWMV
217 NEARMV, // NEW_NEARMV
218 ZEROMV, // ZERO_ZEROMV
219 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700220 };
Urvang Joshi5a9ea002017-05-22 15:25:18 -0700221 assert(NELEMENTS(lut) == MB_MODE_COUNT);
Zoe Liu85b66462017-04-20 14:28:19 -0700222#if CONFIG_COMPOUND_SINGLEREF
223 assert(is_inter_anyref_comp_mode(mode));
224#else // !CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700225 assert(is_inter_compound_mode(mode));
Zoe Liu85b66462017-04-20 14:28:19 -0700226#endif // CONFIG_COMPOUND_SINGLEREF
Yaowu Xuc27fc142016-08-22 16:08:15 -0700227 return lut[mode];
228}
229
David Barker3dfba992017-04-03 16:10:09 +0100230static INLINE int have_nearmv_in_inter_mode(PREDICTION_MODE mode) {
Debargha Mukherjeebb6e1342017-04-17 16:05:04 -0700231 return (mode == NEARMV || mode == NEAR_NEARMV || mode == NEAR_NEWMV ||
Zoe Liu85b66462017-04-20 14:28:19 -0700232#if CONFIG_COMPOUND_SINGLEREF
233 mode == SR_NEAREST_NEARMV || mode == SR_NEAR_NEWMV ||
234#endif // CONFIG_COMPOUND_SINGLEREF
Debargha Mukherjeebb6e1342017-04-17 16:05:04 -0700235 mode == NEW_NEARMV);
David Barker3dfba992017-04-03 16:10:09 +0100236}
237
Yaowu Xuc27fc142016-08-22 16:08:15 -0700238static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700239 return (mode == NEWMV || mode == NEW_NEWMV || mode == NEAREST_NEWMV ||
Zoe Liu85b66462017-04-20 14:28:19 -0700240#if CONFIG_COMPOUND_SINGLEREF
241 /* mode == SR_NEAREST_NEWMV || */ mode == SR_NEAR_NEWMV ||
242 mode == SR_ZERO_NEWMV || mode == SR_NEW_NEWMV ||
243#endif // CONFIG_COMPOUND_SINGLEREF
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700244 mode == NEW_NEARESTMV || mode == NEAR_NEWMV || mode == NEW_NEARMV);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700245}
Sarah Parker6fdc8532016-11-16 17:47:13 -0800246
Sarah Parker2e604882017-01-17 17:31:25 -0800247static INLINE int use_masked_motion_search(COMPOUND_TYPE type) {
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000248#if CONFIG_WEDGE
Sarah Parker2e604882017-01-17 17:31:25 -0800249 return (type == COMPOUND_WEDGE);
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000250#else
251 (void)type;
252 return 0;
253#endif
Sarah Parker2e604882017-01-17 17:31:25 -0800254}
255
Sarah Parker6fdc8532016-11-16 17:47:13 -0800256static INLINE int is_masked_compound_type(COMPOUND_TYPE type) {
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000257#if CONFIG_COMPOUND_SEGMENT && CONFIG_WEDGE
Sarah Parker569edda2016-12-14 14:57:38 -0800258 return (type == COMPOUND_WEDGE || type == COMPOUND_SEG);
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000259#elif !CONFIG_COMPOUND_SEGMENT && CONFIG_WEDGE
Sarah Parker6fdc8532016-11-16 17:47:13 -0800260 return (type == COMPOUND_WEDGE);
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000261#elif CONFIG_COMPOUND_SEGMENT && !CONFIG_WEDGE
262 return (type == COMPOUND_SEG);
Sarah Parker569edda2016-12-14 14:57:38 -0800263#endif // CONFIG_COMPOUND_SEGMENT
Debargha Mukherjeec5f735f2017-04-26 03:25:28 +0000264 (void)type;
265 return 0;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800266}
Zoe Liu85b66462017-04-20 14:28:19 -0700267
268#else // !CONFIG_EXT_INTER
Yaowu Xuc27fc142016-08-22 16:08:15 -0700269
David Barker3dfba992017-04-03 16:10:09 +0100270static INLINE int have_nearmv_in_inter_mode(PREDICTION_MODE mode) {
271 return (mode == NEARMV);
272}
273
Yaowu Xuc27fc142016-08-22 16:08:15 -0700274static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
275 return (mode == NEWMV);
276}
277#endif // CONFIG_EXT_INTER
278
279/* For keyframes, intra block modes are predicted by the (already decoded)
280 modes for the Y blocks to the left and above us; for interframes, there
281 is a single probability table. */
282
283typedef struct {
284 PREDICTION_MODE as_mode;
285 int_mv as_mv[2]; // first, second inter predictor motion vectors
Yaowu Xuf5bbbfa2016-09-26 09:13:38 -0700286 int_mv pred_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700287#if CONFIG_EXT_INTER
288 int_mv ref_mv[2];
289#endif // CONFIG_EXT_INTER
290} b_mode_info;
291
292typedef int8_t MV_REFERENCE_FRAME;
293
Urvang Joshib100db72016-10-12 16:28:56 -0700294#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700295typedef struct {
296 // Number of base colors for Y (0) and UV (1)
297 uint8_t palette_size[2];
hui sufa4ff852017-05-15 12:20:50 -0700298 // Value of base colors for Y, U, and V
Yaowu Xuc27fc142016-08-22 16:08:15 -0700299 uint16_t palette_colors[3 * PALETTE_MAX_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700300} PALETTE_MODE_INFO;
Urvang Joshib100db72016-10-12 16:28:56 -0700301#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700302
hui su5db97432016-10-14 16:10:14 -0700303#if CONFIG_FILTER_INTRA
Yue Chen8d8638a2017-02-21 13:28:16 +0800304#define USE_3TAP_INTRA_FILTER 1 // 0: 4-tap; 1: 3-tap
Yaowu Xuc27fc142016-08-22 16:08:15 -0700305typedef struct {
306 // 1: an ext intra mode is used; 0: otherwise.
hui su5db97432016-10-14 16:10:14 -0700307 uint8_t use_filter_intra_mode[PLANE_TYPES];
308 FILTER_INTRA_MODE filter_intra_mode[PLANE_TYPES];
309} FILTER_INTRA_MODE_INFO;
310#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700311
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800312#if CONFIG_VAR_TX
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800313#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800314#define TXB_COEFF_COST_MAP_SIZE (2 * MAX_MIB_SIZE)
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800315#endif
316#endif
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800317
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800318typedef struct RD_STATS {
319 int rate;
320 int64_t dist;
Angie Chiang7bbd3b12017-04-26 11:06:09 -0700321 // Please be careful of using rdcost, it's not guaranteed to be set all the
322 // time.
323 // TODO(angiebird): Create a set of functions to manipulate the RD_STATS. In
324 // these functions, make sure rdcost is always up-to-date according to
325 // rate/dist.
Angie Chiang2a2a7dd2017-04-25 16:08:47 -0700326 int64_t rdcost;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800327 int64_t sse;
Angie Chiang7bbd3b12017-04-26 11:06:09 -0700328 int skip; // sse should equal to dist when skip == 1
Jingning Han3bce7542017-07-25 10:53:57 -0700329 int64_t ref_rdcost;
330 int zero_rate;
Yushin Chob7b60c52017-07-14 16:18:52 -0700331#if CONFIG_DIST_8X8 && CONFIG_CB4X4
Yushin Cho63927c42017-05-23 15:41:05 -0700332 int64_t dist_y;
333#endif
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800334#if CONFIG_RD_DEBUG
335 int txb_coeff_cost[MAX_MB_PLANE];
Angie Chiang3963d632016-11-10 18:41:40 -0800336#if CONFIG_VAR_TX
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800337 int txb_coeff_cost_map[MAX_MB_PLANE][TXB_COEFF_COST_MAP_SIZE]
338 [TXB_COEFF_COST_MAP_SIZE];
Angie Chiang3963d632016-11-10 18:41:40 -0800339#endif // CONFIG_VAR_TX
340#endif // CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800341} RD_STATS;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800342
Sarah Parker6fdc8532016-11-16 17:47:13 -0800343#if CONFIG_EXT_INTER
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000344// This struct is used to group function args that are commonly
345// sent together in functions related to interinter compound modes
Sarah Parker6fdc8532016-11-16 17:47:13 -0800346typedef struct {
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000347#if CONFIG_WEDGE
Sarah Parker6fdc8532016-11-16 17:47:13 -0800348 int wedge_index;
349 int wedge_sign;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000350#endif // CONFIG_WEDGE
Sarah Parker569edda2016-12-14 14:57:38 -0800351#if CONFIG_COMPOUND_SEGMENT
Sarah Parkerb9f757c2017-01-06 17:12:24 -0800352 SEG_MASK_TYPE mask_type;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000353 uint8_t *seg_mask;
Sarah Parker569edda2016-12-14 14:57:38 -0800354#endif // CONFIG_COMPOUND_SEGMENT
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000355 COMPOUND_TYPE interinter_compound_type;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800356} INTERINTER_COMPOUND_DATA;
357#endif // CONFIG_EXT_INTER
358
Yaowu Xuc27fc142016-08-22 16:08:15 -0700359// This structure now relates to 8x8 block regions.
Luc Trudeauf5334002017-04-25 12:21:26 -0400360typedef struct MB_MODE_INFO {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700361 // Common for both INTER and INTRA blocks
362 BLOCK_SIZE sb_type;
363 PREDICTION_MODE mode;
364 TX_SIZE tx_size;
365#if CONFIG_VAR_TX
366 // TODO(jingning): This effectively assigned a separate entry for each
367 // 8x8 block. Apparently it takes much more space than needed.
368 TX_SIZE inter_tx_size[MAX_MIB_SIZE][MAX_MIB_SIZE];
Jingning Hane67b38a2016-11-04 10:30:00 -0700369 TX_SIZE min_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700370#endif
371 int8_t skip;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700372 int8_t segment_id;
373#if CONFIG_SUPERTX
374 // Minimum of all segment IDs under the current supertx block.
375 int8_t segment_id_supertx;
376#endif // CONFIG_SUPERTX
377 int8_t seg_id_predicted; // valid only when temporal_update is enabled
378
379 // Only for INTRA blocks
380 PREDICTION_MODE uv_mode;
Urvang Joshib100db72016-10-12 16:28:56 -0700381#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700382 PALETTE_MODE_INFO palette_mode_info;
Urvang Joshib100db72016-10-12 16:28:56 -0700383#endif // CONFIG_PALETTE
Alex Converse28744302017-04-13 14:46:22 -0700384#if CONFIG_INTRABC
385 uint8_t use_intrabc;
386#endif // CONFIG_INTRABC
Yaowu Xuc27fc142016-08-22 16:08:15 -0700387
388// Only for INTER blocks
389#if CONFIG_DUAL_FILTER
James Zern7b9407a2016-05-18 23:48:05 -0700390 InterpFilter interp_filter[4];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700391#else
James Zern7b9407a2016-05-18 23:48:05 -0700392 InterpFilter interp_filter;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700393#endif
394 MV_REFERENCE_FRAME ref_frame[2];
395 TX_TYPE tx_type;
Angie Chiangcd9b03f2017-04-16 13:37:13 -0700396#if CONFIG_TXK_SEL
Angie Chiang808d8592017-04-06 18:36:55 -0700397 TX_TYPE txk_type[MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
398#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700399
hui su5db97432016-10-14 16:10:14 -0700400#if CONFIG_FILTER_INTRA
401 FILTER_INTRA_MODE_INFO filter_intra_mode_info;
402#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700403#if CONFIG_EXT_INTRA
hui sueda3d762016-12-06 16:58:23 -0800404 // The actual prediction angle is the base angle + (angle_delta * step).
Yaowu Xuc27fc142016-08-22 16:08:15 -0700405 int8_t angle_delta[2];
hui sueda3d762016-12-06 16:58:23 -0800406#if CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700407 // To-Do (huisu): this may be replaced by interp_filter
408 INTRA_FILTER intra_filter;
hui sueda3d762016-12-06 16:58:23 -0800409#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700410#endif // CONFIG_EXT_INTRA
411
412#if CONFIG_EXT_INTER
Yue Chen4d26acb2017-05-01 12:28:34 -0700413#if CONFIG_INTERINTRA
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000414 // interintra members
Yaowu Xuc27fc142016-08-22 16:08:15 -0700415 INTERINTRA_MODE interintra_mode;
Yue Chen4d26acb2017-05-01 12:28:34 -0700416#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700417 // TODO(debargha): Consolidate these flags
418 int use_wedge_interintra;
419 int interintra_wedge_index;
420 int interintra_wedge_sign;
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000421 // interinter members
422 COMPOUND_TYPE interinter_compound_type;
423#if CONFIG_WEDGE
424 int wedge_index;
425 int wedge_sign;
426#endif // CONFIG_WEDGE
427#if CONFIG_COMPOUND_SEGMENT
428 SEG_MASK_TYPE mask_type;
429#endif // CONFIG_COMPOUND_SEGMENT
Yaowu Xuc27fc142016-08-22 16:08:15 -0700430#endif // CONFIG_EXT_INTER
Yue Chencb60b182016-10-13 15:18:22 -0700431 MOTION_MODE motion_mode;
Yue Chen5329a2b2017-02-28 17:33:00 +0800432#if CONFIG_MOTION_VAR
433 int overlappable_neighbors[2];
Wei-Ting Lin85a8f702017-06-22 13:55:15 -0700434#if CONFIG_NCOBMC_ADAPT_WEIGHT
435 // Applying different weighting kernels in ncobmc
436 // In current implementation, interpolation modes only defined for squared
437 // blocks. A rectangular block is divided into two squared blocks and each
438 // squared block has an interpolation mode.
439 NCOBMC_MODE ncobmc_mode[2];
440#endif
Yue Chen5329a2b2017-02-28 17:33:00 +0800441#endif // CONFIG_MOTION_VAR
Yaowu Xuc27fc142016-08-22 16:08:15 -0700442 int_mv mv[2];
443 int_mv pred_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700444 uint8_t ref_mv_idx;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700445#if CONFIG_EXT_PARTITION_TYPES
446 PARTITION_TYPE partition;
447#endif
448#if CONFIG_NEW_QUANT
449 int dq_off_index;
450 int send_dq_bit;
451#endif // CONFIG_NEW_QUANT
452 /* deringing gain *per-superblock* */
Jean-Marc Valin5f5c1322017-03-21 16:20:21 -0400453 int8_t cdef_strength;
Arild Fuldseth07441162016-08-15 15:07:52 +0200454#if CONFIG_DELTA_Q
455 int current_q_index;
Fangwen Fu231fe422017-04-24 17:52:29 -0700456#if CONFIG_EXT_DELTA_Q
457 int current_delta_lf_from_base;
458#endif
Arild Fuldseth07441162016-08-15 15:07:52 +0200459#endif
Angie Chiangd4022822016-11-02 18:30:25 -0700460#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800461 RD_STATS rd_stats;
Angie Chiangd4022822016-11-02 18:30:25 -0700462 int mi_row;
463 int mi_col;
464#endif
Yue Chen69f18e12016-09-08 14:48:15 -0700465#if CONFIG_WARPED_MOTION
466 int num_proj_ref[2];
467 WarpedMotionParams wm_params[2];
468#endif // CONFIG_WARPED_MOTION
Ryan Lei9b02b0e2017-01-30 15:52:20 -0800469
Luc Trudeauf5334002017-04-25 12:21:26 -0400470#if CONFIG_CFL
471 // Index of the alpha Cb and alpha Cr combination
Luc Trudeaua9bd85f2017-05-11 14:37:56 -0400472 int cfl_alpha_idx;
Luc Trudeauf5334002017-04-25 12:21:26 -0400473 // Signs of alpha Cb and alpha Cr
474 CFL_SIGN_TYPE cfl_alpha_signs[CFL_PRED_PLANES];
475#endif
476
Ryan Lei9b02b0e2017-01-30 15:52:20 -0800477 BOUNDARY_TYPE boundary_info;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700478} MB_MODE_INFO;
479
480typedef struct MODE_INFO {
481 MB_MODE_INFO mbmi;
482 b_mode_info bmi[4];
483} MODE_INFO;
484
Alex Converse28744302017-04-13 14:46:22 -0700485#if CONFIG_INTRABC
486static INLINE int is_intrabc_block(const MB_MODE_INFO *mbmi) {
487 return mbmi->use_intrabc;
488}
489#endif
490
Yaowu Xuc27fc142016-08-22 16:08:15 -0700491static INLINE PREDICTION_MODE get_y_mode(const MODE_INFO *mi, int block) {
Jingning Hand7d20472016-12-14 11:13:48 -0800492#if CONFIG_CB4X4
493 (void)block;
494 return mi->mbmi.mode;
495#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700496 return mi->mbmi.sb_type < BLOCK_8X8 ? mi->bmi[block].as_mode : mi->mbmi.mode;
Jingning Hand7d20472016-12-14 11:13:48 -0800497#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700498}
499
500static INLINE int is_inter_block(const MB_MODE_INFO *mbmi) {
Alex Converse28744302017-04-13 14:46:22 -0700501#if CONFIG_INTRABC
502 if (is_intrabc_block(mbmi)) return 1;
503#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700504 return mbmi->ref_frame[0] > INTRA_FRAME;
505}
506
507static INLINE int has_second_ref(const MB_MODE_INFO *mbmi) {
508 return mbmi->ref_frame[1] > INTRA_FRAME;
509}
510
Zoe Liuc082bbc2017-05-17 13:31:37 -0700511#if CONFIG_EXT_COMP_REFS
512static INLINE int has_uni_comp_refs(const MB_MODE_INFO *mbmi) {
513 return has_second_ref(mbmi) && (!((mbmi->ref_frame[0] >= BWDREF_FRAME) ^
514 (mbmi->ref_frame[1] >= BWDREF_FRAME)));
515}
516
517static INLINE MV_REFERENCE_FRAME comp_ref0(int ref_idx) {
518 static const MV_REFERENCE_FRAME lut[] = {
519 LAST_FRAME, // LAST_LAST2_FRAMES,
Zoe Liufcf5fa22017-06-26 16:00:38 -0700520 LAST_FRAME, // LAST_LAST3_FRAMES,
Zoe Liuc082bbc2017-05-17 13:31:37 -0700521 LAST_FRAME, // LAST_GOLDEN_FRAMES,
522 BWDREF_FRAME, // BWDREF_ALTREF_FRAMES,
523 };
524 assert(NELEMENTS(lut) == UNIDIR_COMP_REFS);
525 return lut[ref_idx];
526}
527
528static INLINE MV_REFERENCE_FRAME comp_ref1(int ref_idx) {
529 static const MV_REFERENCE_FRAME lut[] = {
530 LAST2_FRAME, // LAST_LAST2_FRAMES,
Zoe Liufcf5fa22017-06-26 16:00:38 -0700531 LAST3_FRAME, // LAST_LAST3_FRAMES,
Zoe Liuc082bbc2017-05-17 13:31:37 -0700532 GOLDEN_FRAME, // LAST_GOLDEN_FRAMES,
533 ALTREF_FRAME, // BWDREF_ALTREF_FRAMES,
534 };
535 assert(NELEMENTS(lut) == UNIDIR_COMP_REFS);
536 return lut[ref_idx];
537}
538#endif // CONFIG_EXT_COMP_REFS
539
Yaowu Xuf883b422016-08-30 14:01:10 -0700540PREDICTION_MODE av1_left_block_mode(const MODE_INFO *cur_mi,
541 const MODE_INFO *left_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700542
Yaowu Xuf883b422016-08-30 14:01:10 -0700543PREDICTION_MODE av1_above_block_mode(const MODE_INFO *cur_mi,
544 const MODE_INFO *above_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700545
Sarah Parker19234cc2017-03-10 16:43:25 -0800546#if CONFIG_GLOBAL_MOTION
547static INLINE int is_global_mv_block(const MODE_INFO *mi, int block,
548 TransformationType type) {
549 PREDICTION_MODE mode = get_y_mode(mi, block);
550#if GLOBAL_SUB8X8_USED
551 const int block_size_allowed = 1;
552#else
553 const BLOCK_SIZE bsize = mi->mbmi.sb_type;
554 const int block_size_allowed = (bsize >= BLOCK_8X8);
555#endif // GLOBAL_SUB8X8_USED
556#if CONFIG_EXT_INTER
557 return (mode == ZEROMV || mode == ZERO_ZEROMV) && type > TRANSLATION &&
558 block_size_allowed;
559#else
560 return mode == ZEROMV && type > TRANSLATION && block_size_allowed;
561#endif // CONFIG_EXT_INTER
562}
563#endif // CONFIG_GLOBAL_MOTION
564
Yaowu Xuc27fc142016-08-22 16:08:15 -0700565enum mv_precision { MV_PRECISION_Q3, MV_PRECISION_Q4 };
566
567struct buf_2d {
568 uint8_t *buf;
569 uint8_t *buf0;
570 int width;
571 int height;
572 int stride;
573};
574
575typedef struct macroblockd_plane {
576 tran_low_t *dqcoeff;
577 PLANE_TYPE plane_type;
578 int subsampling_x;
579 int subsampling_y;
580 struct buf_2d dst;
581 struct buf_2d pre[2];
582 ENTROPY_CONTEXT *above_context;
583 ENTROPY_CONTEXT *left_context;
584 int16_t seg_dequant[MAX_SEGMENTS][2];
585#if CONFIG_NEW_QUANT
clang-format67948d32016-09-07 22:40:40 -0700586 dequant_val_type_nuq seg_dequant_nuq[MAX_SEGMENTS][QUANT_PROFILES]
587 [COEF_BANDS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700588#endif
Urvang Joshib100db72016-10-12 16:28:56 -0700589#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700590 uint8_t *color_index_map;
Urvang Joshib100db72016-10-12 16:28:56 -0700591#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700592
593 // number of 4x4s in current block
594 uint16_t n4_w, n4_h;
595 // log2 of n4_w, n4_h
596 uint8_t n4_wl, n4_hl;
Jingning Hanc47fe6c2016-10-21 16:40:47 -0700597 // block size in pixels
598 uint8_t width, height;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700599
600#if CONFIG_AOM_QM
Thomas Davies6675adf2017-05-04 17:39:21 +0100601 const qm_val_t *seg_iqmatrix[MAX_SEGMENTS][2][TX_SIZES_ALL];
602 const qm_val_t *seg_qmatrix[MAX_SEGMENTS][2][TX_SIZES_ALL];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700603#endif
604 // encoder
605 const int16_t *dequant;
606#if CONFIG_NEW_QUANT
607 const dequant_val_type_nuq *dequant_val_nuq[QUANT_PROFILES];
608#endif // CONFIG_NEW_QUANT
Yushin Cho77bba8d2016-11-04 16:36:56 -0700609
Yushin Chob7b60c52017-07-14 16:18:52 -0700610#if CONFIG_PVQ || CONFIG_DIST_8X8
Yushin Cho77bba8d2016-11-04 16:36:56 -0700611 DECLARE_ALIGNED(16, int16_t, pred[MAX_SB_SQUARE]);
Yushin Chob7b60c52017-07-14 16:18:52 -0700612#endif
613#if CONFIG_PVQ
Yushin Cho77bba8d2016-11-04 16:36:56 -0700614 // PVQ: forward transformed predicted image, a reference for PVQ.
615 tran_low_t *pvq_ref_coeff;
616#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700617} MACROBLOCKD_PLANE;
618
Jingning Han3468df12016-12-05 17:53:16 -0800619#define BLOCK_OFFSET(x, i) \
620 ((x) + (i) * (1 << (tx_size_wide_log2[0] + tx_size_high_log2[0])))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700621
622typedef struct RefBuffer {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700623 int idx;
624 YV12_BUFFER_CONFIG *buf;
625 struct scale_factors sf;
Zoe Liu7b1ec7a2017-05-24 22:28:24 -0700626#if CONFIG_VAR_REFS
Zoe Liu7b1ec7a2017-05-24 22:28:24 -0700627 int is_valid;
628#endif // CONFIG_VAR_REFS
Yaowu Xuc27fc142016-08-22 16:08:15 -0700629} RefBuffer;
630
Yi Luo2ab63cb2017-05-11 16:44:22 -0700631#if CONFIG_ADAPT_SCAN
632typedef int16_t EobThresholdMD[TX_TYPES][EOB_THRESHOLD_NUM];
633#endif
Luc Trudeauf8164152017-04-11 16:20:51 -0400634
Yaowu Xuc27fc142016-08-22 16:08:15 -0700635typedef struct macroblockd {
636 struct macroblockd_plane plane[MAX_MB_PLANE];
637 uint8_t bmode_blocks_wl;
638 uint8_t bmode_blocks_hl;
639
640 FRAME_COUNTS *counts;
641 TileInfo tile;
642
643 int mi_stride;
644
645 MODE_INFO **mi;
646 MODE_INFO *left_mi;
647 MODE_INFO *above_mi;
648 MB_MODE_INFO *left_mbmi;
649 MB_MODE_INFO *above_mbmi;
650
651 int up_available;
652 int left_available;
Jingning Han3da18d62017-05-02 12:43:58 -0700653#if CONFIG_CHROMA_SUB8X8
654 int chroma_up_available;
655 int chroma_left_available;
656#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700657
Yaowu Xuf883b422016-08-30 14:01:10 -0700658 const aom_prob (*partition_probs)[PARTITION_TYPES - 1];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700659
660 /* Distance of MB away from frame edges */
661 int mb_to_left_edge;
662 int mb_to_right_edge;
663 int mb_to_top_edge;
664 int mb_to_bottom_edge;
665
666 FRAME_CONTEXT *fc;
667
668 /* pointers to reference frames */
Urvang Joshi52648442016-10-13 17:27:51 -0700669 const RefBuffer *block_refs[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700670
671 /* pointer to current frame */
672 const YV12_BUFFER_CONFIG *cur_buf;
673
Alex Conversee816b312017-05-01 09:51:24 -0700674#if CONFIG_INTRABC
675 /* Scale of the current frame with respect to itself */
676 struct scale_factors sf_identity;
677#endif
678
Yaowu Xuc27fc142016-08-22 16:08:15 -0700679 ENTROPY_CONTEXT *above_context[MAX_MB_PLANE];
680 ENTROPY_CONTEXT left_context[MAX_MB_PLANE][2 * MAX_MIB_SIZE];
681
682 PARTITION_CONTEXT *above_seg_context;
683 PARTITION_CONTEXT left_seg_context[MAX_MIB_SIZE];
684
685#if CONFIG_VAR_TX
686 TXFM_CONTEXT *above_txfm_context;
687 TXFM_CONTEXT *left_txfm_context;
Jingning Han331662e2017-05-30 17:03:32 -0700688 TXFM_CONTEXT left_txfm_context_buffer[2 * MAX_MIB_SIZE];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700689
690 TX_SIZE max_tx_size;
691#if CONFIG_SUPERTX
692 TX_SIZE supertx_size;
693#endif
694#endif
695
Jingning Hanff6ee6a2016-12-07 09:55:21 -0800696 // block dimension in the unit of mode_info.
Yaowu Xuc27fc142016-08-22 16:08:15 -0700697 uint8_t n8_w, n8_h;
698
Yaowu Xuc27fc142016-08-22 16:08:15 -0700699 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
700 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
701 uint8_t is_sec_rect;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700702
Yushin Cho77bba8d2016-11-04 16:36:56 -0700703#if CONFIG_PVQ
704 daala_dec_ctx daala_dec;
705#endif
Thomas Daviesf77d4ad2017-01-10 18:55:42 +0000706 FRAME_CONTEXT *tile_ctx;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700707 /* Bit depth: 8, 10, 12 */
708 int bd;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700709
Debargha Mukherjee3c42c092016-09-29 09:17:36 -0700710 int qindex[MAX_SEGMENTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700711 int lossless[MAX_SEGMENTS];
712 int corrupted;
713
Yaowu Xuf883b422016-08-30 14:01:10 -0700714 struct aom_internal_error_info *error_info;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700715#if CONFIG_GLOBAL_MOTION
David Barkercf3d0b02016-11-10 10:14:49 +0000716 WarpedMotionParams *global_motion;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700717#endif // CONFIG_GLOBAL_MOTION
Arild Fuldseth07441162016-08-15 15:07:52 +0200718#if CONFIG_DELTA_Q
719 int prev_qindex;
720 int delta_qindex;
721 int current_qindex;
Fangwen Fu231fe422017-04-24 17:52:29 -0700722#if CONFIG_EXT_DELTA_Q
723 // Since actual frame level loop filtering level value is not available
724 // at the beginning of the tile (only available during actual filtering)
725 // at encoder side.we record the delta_lf (against the frame level loop
726 // filtering level) and code the delta between previous superblock's delta
727 // lf and current delta lf. It is equivalent to the delta between previous
728 // superblock's actual lf and current lf.
729 int prev_delta_lf_from_base;
730 int current_delta_lf_from_base;
731#endif
Arild Fuldseth07441162016-08-15 15:07:52 +0200732#endif
Yi Luof8e87b42017-04-14 17:20:27 -0700733#if CONFIG_ADAPT_SCAN
734 const EobThresholdMD *eob_threshold_md;
735#endif
Luc Trudeauf8164152017-04-11 16:20:51 -0400736
Sarah Parker2d0e9b72017-05-04 01:34:16 +0000737#if CONFIG_EXT_INTER && CONFIG_COMPOUND_SEGMENT
738 DECLARE_ALIGNED(16, uint8_t, seg_mask[2 * MAX_SB_SQUARE]);
739#endif // CONFIG_EXT_INTER && CONFIG_COMPOUND_SEGMENT
740
Luc Trudeauf8164152017-04-11 16:20:51 -0400741#if CONFIG_CFL
742 CFL_CTX *cfl;
743#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700744} MACROBLOCKD;
745
Yi Luo51281092017-06-26 16:36:15 -0700746static INLINE int get_bitdepth_data_path_index(const MACROBLOCKD *xd) {
747 return xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH ? 1 : 0;
748}
749
Yaowu Xuc27fc142016-08-22 16:08:15 -0700750static INLINE BLOCK_SIZE get_subsize(BLOCK_SIZE bsize,
751 PARTITION_TYPE partition) {
752 if (partition == PARTITION_INVALID)
Urvang Joshicb586f32016-09-20 11:36:33 -0700753 return BLOCK_INVALID;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700754 else
755 return subsize_lookup[partition][bsize];
756}
757
758static const TX_TYPE intra_mode_to_tx_type_context[INTRA_MODES] = {
759 DCT_DCT, // DC
760 ADST_DCT, // V
761 DCT_ADST, // H
762 DCT_DCT, // D45
763 ADST_ADST, // D135
764 ADST_DCT, // D117
765 DCT_ADST, // D153
766 DCT_ADST, // D207
767 ADST_DCT, // D63
Urvang Joshi6be4a542016-11-03 15:24:05 -0700768#if CONFIG_ALT_INTRA
769 ADST_ADST, // SMOOTH
Urvang Joshie6ca8e82017-03-15 14:57:41 -0700770#if CONFIG_SMOOTH_HV
771 ADST_DCT, // SMOOTH_V
772 DCT_ADST, // SMOOTH_H
773#endif // CONFIG_SMOOTH_HV
Urvang Joshi6be4a542016-11-03 15:24:05 -0700774#endif // CONFIG_ALT_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700775 ADST_ADST, // TM
776};
777
778#if CONFIG_SUPERTX
779static INLINE int supertx_enabled(const MB_MODE_INFO *mbmi) {
Jingning Han93531242016-12-20 11:54:36 -0800780 TX_SIZE max_tx_size = txsize_sqr_map[mbmi->tx_size];
781 return tx_size_wide[max_tx_size] >
782 AOMMIN(block_size_wide[mbmi->sb_type], block_size_high[mbmi->sb_type]);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700783}
784#endif // CONFIG_SUPERTX
785
Jingning Hanb83e64b2017-03-01 14:52:04 -0800786#define USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4 1
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800787
Sarah Parker076437f2017-03-14 17:39:53 -0700788#if CONFIG_RECT_TX
Sarah Parker076437f2017-03-14 17:39:53 -0700789static INLINE int is_rect_tx(TX_SIZE tx_size) { return tx_size >= TX_SIZES; }
790#endif // CONFIG_RECT_TX
791
Jingning Hanb83e64b2017-03-01 14:52:04 -0800792#if CONFIG_EXT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700793#define ALLOW_INTRA_EXT_TX 1
Yaowu Xuc27fc142016-08-22 16:08:15 -0700794
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800795typedef enum {
796 // DCT only
797 EXT_TX_SET_DCTONLY = 0,
798 // DCT + Identity only
Sarah Parker53f93db2017-07-11 17:20:04 -0700799 EXT_TX_SET_DCT_IDTX,
800#if CONFIG_MRC_TX
801 // DCT + MRC_DCT
802 EXT_TX_SET_MRC_DCT,
803 // DCT + MRC_DCT + IDTX
804 EXT_TX_SET_MRC_DCT_IDTX,
805#endif // CONFIG_MRC_TX
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800806 // Discrete Trig transforms w/o flip (4) + Identity (1)
Sarah Parker53f93db2017-07-11 17:20:04 -0700807 EXT_TX_SET_DTT4_IDTX,
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800808 // Discrete Trig transforms w/o flip (4) + Identity (1) + 1D Hor/vert DCT (2)
Sarah Parker53f93db2017-07-11 17:20:04 -0700809 EXT_TX_SET_DTT4_IDTX_1DDCT,
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800810 // Discrete Trig transforms w/ flip (9) + Identity (1) + 1D Hor/Ver DCT (2)
Sarah Parker53f93db2017-07-11 17:20:04 -0700811 EXT_TX_SET_DTT9_IDTX_1DDCT,
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800812 // Discrete Trig transforms w/ flip (9) + Identity (1) + 1D Hor/Ver (6)
Sarah Parker53f93db2017-07-11 17:20:04 -0700813 EXT_TX_SET_ALL16,
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800814 EXT_TX_SET_TYPES
815} TxSetType;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700816
Sarah Parker53f93db2017-07-11 17:20:04 -0700817#if CONFIG_MRC_TX
818// Number of transform types in each set type
819static const int num_ext_tx_set[EXT_TX_SET_TYPES] = {
820 1, 2, 2, 3, 5, 7, 12, 16
821};
822
823// Maps intra set index to the set type
824static const int ext_tx_set_type_intra[EXT_TX_SETS_INTRA] = {
825 EXT_TX_SET_DCTONLY, EXT_TX_SET_DTT4_IDTX_1DDCT, EXT_TX_SET_DTT4_IDTX,
826 EXT_TX_SET_MRC_DCT
827};
828
829// Maps inter set index to the set type
830static const int ext_tx_set_type_inter[EXT_TX_SETS_INTER] = {
831 EXT_TX_SET_DCTONLY, EXT_TX_SET_ALL16, EXT_TX_SET_DTT9_IDTX_1DDCT,
832 EXT_TX_SET_DCT_IDTX, EXT_TX_SET_MRC_DCT_IDTX
833};
834
835// Maps set types above to the indices used for intra
836static const int ext_tx_set_index_intra[EXT_TX_SET_TYPES] = { 0, -1, 3, -1,
837 2, 1, -1, -1 };
838
839// Maps set types above to the indices used for inter
840static const int ext_tx_set_index_inter[EXT_TX_SET_TYPES] = { 0, 3, -1, 4,
841 -1, -1, 2, 1 };
842#else // CONFIG_MRC_TX
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800843// Number of transform types in each set type
844static const int num_ext_tx_set[EXT_TX_SET_TYPES] = { 1, 2, 5, 7, 12, 16 };
845
846// Maps intra set index to the set type
847static const int ext_tx_set_type_intra[EXT_TX_SETS_INTRA] = {
848 EXT_TX_SET_DCTONLY, EXT_TX_SET_DTT4_IDTX_1DDCT, EXT_TX_SET_DTT4_IDTX
849};
850
851// Maps inter set index to the set type
852static const int ext_tx_set_type_inter[EXT_TX_SETS_INTER] = {
853 EXT_TX_SET_DCTONLY, EXT_TX_SET_ALL16, EXT_TX_SET_DTT9_IDTX_1DDCT,
854 EXT_TX_SET_DCT_IDTX
855};
856
857// Maps set types above to the indices used for intra
858static const int ext_tx_set_index_intra[EXT_TX_SET_TYPES] = { 0, -1, 2,
859 1, -1, -1 };
860
861// Maps set types above to the indices used for inter
862static const int ext_tx_set_index_inter[EXT_TX_SET_TYPES] = {
863 0, 3, -1, -1, 2, 1
864};
Sarah Parker53f93db2017-07-11 17:20:04 -0700865#endif // CONFIG_MRC_TX
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800866
867static INLINE TxSetType get_ext_tx_set_type(TX_SIZE tx_size, BLOCK_SIZE bs,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800868 int is_inter, int use_reduced_set) {
Yue Chen56e226e2017-05-02 16:21:40 -0700869 const TX_SIZE tx_size_sqr_up = txsize_sqr_up_map[tx_size];
870 const TX_SIZE tx_size_sqr = txsize_sqr_map[tx_size];
Debargha Mukherjee094c9432017-02-22 10:31:25 -0800871#if CONFIG_CB4X4 && USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4
Jingning Han1a00cff2016-12-28 14:53:14 -0800872 (void)bs;
Yue Chen56e226e2017-05-02 16:21:40 -0700873 if (tx_size_sqr > TX_32X32) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -0800874#else
Yue Chen56e226e2017-05-02 16:21:40 -0700875 if (tx_size_sqr > TX_32X32 || bs < BLOCK_8X8) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -0800876#endif
Sarah Parker5effe3f2017-02-23 12:49:10 -0800877 if (use_reduced_set)
878 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DTT4_IDTX;
Sarah Parker53f93db2017-07-11 17:20:04 -0700879#if CONFIG_MRC_TX
880 if (tx_size == TX_32X32)
881 return is_inter ? EXT_TX_SET_MRC_DCT_IDTX : EXT_TX_SET_MRC_DCT;
882#endif // CONFIG_MRC_TX
Yue Chen56e226e2017-05-02 16:21:40 -0700883 if (tx_size_sqr_up == TX_32X32)
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800884 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DCTONLY;
885 if (is_inter)
Yue Chen56e226e2017-05-02 16:21:40 -0700886 return (tx_size_sqr == TX_16X16 ? EXT_TX_SET_DTT9_IDTX_1DDCT
887 : EXT_TX_SET_ALL16);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800888 else
Yue Chen56e226e2017-05-02 16:21:40 -0700889 return (tx_size_sqr == TX_16X16 ? EXT_TX_SET_DTT4_IDTX
890 : EXT_TX_SET_DTT4_IDTX_1DDCT);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800891}
892
893static INLINE int get_ext_tx_set(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800894 int use_reduced_set) {
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800895 const TxSetType set_type =
Sarah Parker5effe3f2017-02-23 12:49:10 -0800896 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800897 return is_inter ? ext_tx_set_index_inter[set_type]
898 : ext_tx_set_index_intra[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700899}
900
Sarah Parker53f93db2017-07-11 17:20:04 -0700901#if CONFIG_MRC_TX
902static const int use_intra_ext_tx_for_txsize[EXT_TX_SETS_INTRA][EXT_TX_SIZES] =
903 {
904#if CONFIG_CHROMA_2X2
905 { 1, 1, 1, 1, 1 }, // unused
906 { 0, 1, 1, 0, 0 },
907 { 0, 0, 0, 1, 0 },
908 { 0, 0, 0, 0, 1 },
909#else
910 { 1, 1, 1, 1 }, // unused
911 { 1, 1, 0, 0 },
912 { 0, 0, 1, 0 },
913 { 0, 0, 0, 1 },
914#endif // CONFIG_CHROMA_2X2
915 };
916
917static const int use_inter_ext_tx_for_txsize[EXT_TX_SETS_INTER][EXT_TX_SIZES] =
918 {
919#if CONFIG_CHROMA_2X2
920 { 1, 1, 1, 1, 1 }, // unused
921 { 0, 1, 1, 0, 0 }, { 0, 0, 0, 1, 0 },
922 { 0, 0, 0, 0, 1 }, { 0, 0, 0, 0, 1 },
923#else
924 { 1, 1, 1, 1 }, // unused
925 { 1, 1, 0, 0 }, { 0, 0, 1, 0 }, { 0, 0, 0, 1 }, { 0, 0, 0, 1 },
926#endif // CONFIG_CHROMA_2X2
927 };
928
929// Transform types used in each intra set
930static const int ext_tx_used_intra[EXT_TX_SETS_INTRA][TX_TYPES] = {
931 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
932 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0 },
933 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 },
934 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1 },
935};
936
937// Numbers of transform types used in each intra set
938static const int ext_tx_cnt_intra[EXT_TX_SETS_INTRA] = { 1, 7, 5, 2 };
939
940// Transform types used in each inter set
941static const int ext_tx_used_inter[EXT_TX_SETS_INTER][TX_TYPES] = {
942 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
943 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 },
944 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0 },
945 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 },
946 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1 },
947};
948
949// Numbers of transform types used in each inter set
950static const int ext_tx_cnt_inter[EXT_TX_SETS_INTER] = { 1, 16, 12, 2, 3 };
951
952// 1D Transforms used in inter set, this needs to be changed if
953// ext_tx_used_inter is changed
954static const int ext_tx_used_inter_1D[EXT_TX_SETS_INTER][TX_TYPES_1D] = {
955 { 1, 0, 0, 0 }, { 1, 1, 1, 1 }, { 1, 1, 1, 1 }, { 1, 0, 0, 1 }, { 1, 0, 0, 1 }
956};
957#else // CONFIG_MRC_TX
clang-format55ce9e02017-02-15 22:27:12 -0800958static const int use_intra_ext_tx_for_txsize[EXT_TX_SETS_INTRA][EXT_TX_SIZES] =
959 {
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -0700960#if CONFIG_CHROMA_2X2
clang-format55ce9e02017-02-15 22:27:12 -0800961 { 1, 1, 1, 1, 1 }, // unused
962 { 0, 1, 1, 0, 0 },
963 { 0, 0, 0, 1, 0 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800964#else
clang-format55ce9e02017-02-15 22:27:12 -0800965 { 1, 1, 1, 1 }, // unused
966 { 1, 1, 0, 0 },
967 { 0, 0, 1, 0 },
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -0700968#endif // CONFIG_CHROMA_2X2
clang-format55ce9e02017-02-15 22:27:12 -0800969 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700970
clang-format55ce9e02017-02-15 22:27:12 -0800971static const int use_inter_ext_tx_for_txsize[EXT_TX_SETS_INTER][EXT_TX_SIZES] =
972 {
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -0700973#if CONFIG_CHROMA_2X2
clang-format55ce9e02017-02-15 22:27:12 -0800974 { 1, 1, 1, 1, 1 }, // unused
975 { 0, 1, 1, 0, 0 },
976 { 0, 0, 0, 1, 0 },
977 { 0, 0, 0, 0, 1 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800978#else
clang-format55ce9e02017-02-15 22:27:12 -0800979 { 1, 1, 1, 1 }, // unused
980 { 1, 1, 0, 0 },
981 { 0, 0, 1, 0 },
982 { 0, 0, 0, 1 },
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -0700983#endif // CONFIG_CHROMA_2X2
clang-format55ce9e02017-02-15 22:27:12 -0800984 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700985
986// Transform types used in each intra set
987static const int ext_tx_used_intra[EXT_TX_SETS_INTRA][TX_TYPES] = {
988 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
989 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0 },
990 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
991};
992
Thomas Daviesb1bedf52017-03-17 14:03:28 +0000993// Numbers of transform types used in each intra set
994static const int ext_tx_cnt_intra[EXT_TX_SETS_INTRA] = { 1, 7, 5 };
995
Yaowu Xuc27fc142016-08-22 16:08:15 -0700996// Transform types used in each inter set
997static const int ext_tx_used_inter[EXT_TX_SETS_INTER][TX_TYPES] = {
998 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
999 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
1000 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
1001 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
1002};
1003
Thomas Daviesb1bedf52017-03-17 14:03:28 +00001004// Numbers of transform types used in each inter set
1005static const int ext_tx_cnt_inter[EXT_TX_SETS_INTER] = { 1, 16, 12, 2 };
1006
Yaowu Xuc27fc142016-08-22 16:08:15 -07001007// 1D Transforms used in inter set, this needs to be changed if
1008// ext_tx_used_inter is changed
1009static const int ext_tx_used_inter_1D[EXT_TX_SETS_INTER][TX_TYPES_1D] = {
1010 { 1, 0, 0, 0 }, { 1, 1, 1, 1 }, { 1, 1, 1, 1 }, { 1, 0, 0, 1 },
1011};
Sarah Parker53f93db2017-07-11 17:20:04 -07001012#endif // CONFIG_MRC_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -07001013
Sarah Parkere68a3e42017-02-16 14:03:24 -08001014static INLINE int get_ext_tx_types(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -08001015 int use_reduced_set) {
1016 const int set_type =
1017 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Debargha Mukherjee08542b92017-02-21 01:08:14 -08001018 return num_ext_tx_set[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -07001019}
1020
1021#if CONFIG_RECT_TX
1022static INLINE int is_rect_tx_allowed_bsize(BLOCK_SIZE bsize) {
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001023 static const char LUT[BLOCK_SIZES_ALL] = {
Timothy B. Terriberry81ec2612017-04-26 16:53:47 -07001024#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8
Jingning Hanf4e097b2017-01-20 09:23:58 -08001025 0, // BLOCK_2X2
1026 0, // BLOCK_2X4
1027 0, // BLOCK_4X2
1028#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -07001029 0, // BLOCK_4X4
1030 1, // BLOCK_4X8
1031 1, // BLOCK_8X4
1032 0, // BLOCK_8X8
1033 1, // BLOCK_8X16
1034 1, // BLOCK_16X8
1035 0, // BLOCK_16X16
1036 1, // BLOCK_16X32
1037 1, // BLOCK_32X16
1038 0, // BLOCK_32X32
1039 0, // BLOCK_32X64
1040 0, // BLOCK_64X32
1041 0, // BLOCK_64X64
1042#if CONFIG_EXT_PARTITION
1043 0, // BLOCK_64X128
1044 0, // BLOCK_128X64
1045 0, // BLOCK_128X128
1046#endif // CONFIG_EXT_PARTITION
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001047 0, // BLOCK_4X16
1048 0, // BLOCK_16X4
1049 0, // BLOCK_8X32
1050 0, // BLOCK_32X8
Yaowu Xuc27fc142016-08-22 16:08:15 -07001051 };
1052
1053 return LUT[bsize];
1054}
1055
Yue Chen49587a72016-09-28 17:09:47 -07001056static INLINE int is_rect_tx_allowed(const MACROBLOCKD *xd,
1057 const MB_MODE_INFO *mbmi) {
Urvang Joshifeb925f2016-12-05 10:37:29 -08001058 return is_rect_tx_allowed_bsize(mbmi->sb_type) &&
Yue Chen49587a72016-09-28 17:09:47 -07001059 !xd->lossless[mbmi->segment_id];
Yaowu Xuc27fc142016-08-22 16:08:15 -07001060}
Yue Chen56e226e2017-05-02 16:21:40 -07001061
1062#if CONFIG_RECT_TX_EXT
1063static INLINE int is_quarter_tx_allowed_bsize(BLOCK_SIZE bsize) {
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001064 static const char LUT_QTTX[BLOCK_SIZES_ALL] = {
Timothy B. Terriberry81ec2612017-04-26 16:53:47 -07001065#if CONFIG_CHROMA_2X2 || CONFIG_CHROMA_SUB8X8
Yue Chen56e226e2017-05-02 16:21:40 -07001066 0, // BLOCK_2X2
1067 0, // BLOCK_2X4
1068 0, // BLOCK_4X2
1069#endif
1070 0, // BLOCK_4X4
1071 0, // BLOCK_4X8
1072 0, // BLOCK_8X4
1073 0, // BLOCK_8X8
1074 1, // BLOCK_8X16
1075 1, // BLOCK_16X8
1076 0, // BLOCK_16X16
1077 0, // BLOCK_16X32
1078 0, // BLOCK_32X16
1079 0, // BLOCK_32X32
1080 0, // BLOCK_32X64
1081 0, // BLOCK_64X32
1082 0, // BLOCK_64X64
1083#if CONFIG_EXT_PARTITION
1084 0, // BLOCK_64X128
1085 0, // BLOCK_128X64
1086 0, // BLOCK_128X128
1087#endif // CONFIG_EXT_PARTITION
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001088 0, // BLOCK_4X16
1089 0, // BLOCK_16X4
1090 0, // BLOCK_8X32
1091 0, // BLOCK_32X8
Yue Chen56e226e2017-05-02 16:21:40 -07001092 };
1093
1094 return LUT_QTTX[bsize];
1095}
1096
1097static INLINE int is_quarter_tx_allowed(const MACROBLOCKD *xd,
1098 const MB_MODE_INFO *mbmi,
1099 int is_inter) {
1100 return is_quarter_tx_allowed_bsize(mbmi->sb_type) && is_inter &&
1101 !xd->lossless[mbmi->segment_id];
1102}
1103#endif // CONFIG_RECT_TX_EXT
Yaowu Xuc27fc142016-08-22 16:08:15 -07001104#endif // CONFIG_RECT_TX
1105#endif // CONFIG_EXT_TX
1106
1107static INLINE TX_SIZE tx_size_from_tx_mode(BLOCK_SIZE bsize, TX_MODE tx_mode,
1108 int is_inter) {
1109 const TX_SIZE largest_tx_size = tx_mode_to_biggest_tx_size[tx_mode];
Debargha Mukherjee428bbb22017-03-17 07:30:24 -07001110#if (CONFIG_VAR_TX || CONFIG_EXT_TX) && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -08001111 const TX_SIZE max_rect_tx_size = max_txsize_rect_lookup[bsize];
Jingning Han70e5f3f2016-11-09 17:03:07 -08001112#else
Yaowu Xuc27fc142016-08-22 16:08:15 -07001113 const TX_SIZE max_tx_size = max_txsize_lookup[bsize];
Debargha Mukherjee428bbb22017-03-17 07:30:24 -07001114#endif // (CONFIG_VAR_TX || CONFIG_EXT_TX) && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -08001115 (void)is_inter;
Debargha Mukherjee428bbb22017-03-17 07:30:24 -07001116#if CONFIG_VAR_TX && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -08001117#if CONFIG_CB4X4
1118 if (bsize == BLOCK_4X4)
1119 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
1120#else
1121 if (bsize < BLOCK_8X8)
1122 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
Jingning Han70e5f3f2016-11-09 17:03:07 -08001123#endif
Urvang Joshifeb925f2016-12-05 10:37:29 -08001124 if (txsize_sqr_map[max_rect_tx_size] <= largest_tx_size)
1125 return max_rect_tx_size;
1126 else
1127 return largest_tx_size;
1128#elif CONFIG_EXT_TX && CONFIG_RECT_TX
1129 if (txsize_sqr_up_map[max_rect_tx_size] <= largest_tx_size) {
1130 return max_rect_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -07001131 } else {
Urvang Joshifeb925f2016-12-05 10:37:29 -08001132 return largest_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -07001133 }
1134#else
Yaowu Xuf883b422016-08-30 14:01:10 -07001135 return AOMMIN(max_tx_size, largest_tx_size);
Debargha Mukherjee428bbb22017-03-17 07:30:24 -07001136#endif // CONFIG_VAR_TX && CONFIG_RECT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -07001137}
1138
hui su5db97432016-10-14 16:10:14 -07001139#if CONFIG_EXT_INTRA
hui su0a6731f2017-04-26 15:23:47 -07001140#define MAX_ANGLE_DELTA 3
1141#define ANGLE_STEP 3
hui su5db97432016-10-14 16:10:14 -07001142extern const int16_t dr_intra_derivative[90];
hui su02c79742017-05-16 17:19:04 -07001143static const uint8_t mode_to_angle_map[] = {
hui su5db97432016-10-14 16:10:14 -07001144 0, 90, 180, 45, 135, 111, 157, 203, 67, 0,
hui su02c79742017-05-16 17:19:04 -07001145#if CONFIG_ALT_INTRA
1146 0,
1147#if CONFIG_SMOOTH_HV
1148 0, 0,
1149#endif // CONFIG_SMOOTH_HV
1150#endif // CONFIG_ALT_INTRA
hui su5db97432016-10-14 16:10:14 -07001151};
hui sueda3d762016-12-06 16:58:23 -08001152#if CONFIG_INTRA_INTERP
hui su5db97432016-10-14 16:10:14 -07001153// Returns whether filter selection is needed for a given
1154// intra prediction angle.
Yaowu Xuf883b422016-08-30 14:01:10 -07001155int av1_is_intra_filter_switchable(int angle);
hui sueda3d762016-12-06 16:58:23 -08001156#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -07001157#endif // CONFIG_EXT_INTRA
1158
Monty Montgomerycb55dad2017-07-11 16:59:52 -04001159#if CONFIG_DCT_ONLY
1160#define FIXED_TX_TYPE 1
1161#else
Yaowu Xuc27fc142016-08-22 16:08:15 -07001162#define FIXED_TX_TYPE 0
Monty Montgomerycb55dad2017-07-11 16:59:52 -04001163#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -07001164
Angie Chiang752ccce2017-04-09 13:41:13 -07001165// Converts block_index for given transform size to index of the block in raster
1166// order.
1167static INLINE int av1_block_index_to_raster_order(TX_SIZE tx_size,
1168 int block_idx) {
1169 // For transform size 4x8, the possible block_idx values are 0 & 2, because
1170 // block_idx values are incremented in steps of size 'tx_width_unit x
1171 // tx_height_unit'. But, for this transform size, block_idx = 2 corresponds to
1172 // block number 1 in raster order, inside an 8x8 MI block.
1173 // For any other transform size, the two indices are equivalent.
1174 return (tx_size == TX_4X8 && block_idx == 2) ? 1 : block_idx;
1175}
1176
1177// Inverse of above function.
1178// Note: only implemented for transform sizes 4x4, 4x8 and 8x4 right now.
1179static INLINE int av1_raster_order_to_block_index(TX_SIZE tx_size,
1180 int raster_order) {
1181 assert(tx_size == TX_4X4 || tx_size == TX_4X8 || tx_size == TX_8X4);
1182 // We ensure that block indices are 0 & 2 if tx size is 4x8 or 8x4.
1183 return (tx_size == TX_4X4) ? raster_order : (raster_order > 0) ? 2 : 0;
1184}
1185
Lester Lu708c1ec2017-06-14 14:54:49 -07001186#if CONFIG_DPCM_INTRA || CONFIG_LGT
1187static INLINE PREDICTION_MODE get_prediction_mode(const MODE_INFO *mi,
1188 int plane, TX_SIZE tx_size,
1189 int block_idx) {
1190 const MB_MODE_INFO *const mbmi = &mi->mbmi;
1191 if (is_inter_block(mbmi)) return mbmi->mode;
1192
1193 int block_raster_idx = av1_block_index_to_raster_order(tx_size, block_idx);
1194 return (plane == 0) ? get_y_mode(mi, block_raster_idx) : mbmi->uv_mode;
1195}
1196#endif
1197
Yaowu Xuc27fc142016-08-22 16:08:15 -07001198static INLINE TX_TYPE get_default_tx_type(PLANE_TYPE plane_type,
1199 const MACROBLOCKD *xd, int block_idx,
1200 TX_SIZE tx_size) {
1201 const MB_MODE_INFO *const mbmi = &xd->mi[0]->mbmi;
1202
Monty Montgomerycb55dad2017-07-11 16:59:52 -04001203 if (CONFIG_DCT_ONLY || is_inter_block(mbmi) || plane_type != PLANE_TYPE_Y ||
Yaowu Xuc27fc142016-08-22 16:08:15 -07001204 xd->lossless[mbmi->segment_id] || tx_size >= TX_32X32)
1205 return DCT_DCT;
1206
1207 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
1208 ? get_y_mode(xd->mi[0], block_idx)
1209 : mbmi->uv_mode];
1210}
1211
hui su45b64752017-07-12 16:54:35 -07001212static INLINE TX_TYPE av1_get_tx_type(PLANE_TYPE plane_type,
Jingning Han19b5c8f2017-07-06 15:10:12 -07001213 const MACROBLOCKD *xd, int blk_row,
1214 int blk_col, int block, TX_SIZE tx_size) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001215 const MODE_INFO *const mi = xd->mi[0];
1216 const MB_MODE_INFO *const mbmi = &mi->mbmi;
Jingning Han19b5c8f2017-07-06 15:10:12 -07001217 (void)blk_row;
1218 (void)blk_col;
Alex Conversedaa15e42017-05-02 14:27:16 -07001219#if CONFIG_INTRABC && (!CONFIG_EXT_TX || CONFIG_TXK_SEL)
1220 // TODO(aconverse@google.com): Handle INTRABC + EXT_TX + TXK_SEL
Alex Converse28744302017-04-13 14:46:22 -07001221 if (is_intrabc_block(mbmi)) return DCT_DCT;
Alex Conversedaa15e42017-05-02 14:27:16 -07001222#endif // CONFIG_INTRABC && (!CONFIG_EXT_TX || CONFIG_TXK_SEL)
hui su45b64752017-07-12 16:54:35 -07001223
1224#if CONFIG_TXK_SEL
1225 TX_TYPE tx_type;
Jingning Han19b5c8f2017-07-06 15:10:12 -07001226 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] >= TX_32X32) {
hui su45b64752017-07-12 16:54:35 -07001227 tx_type = DCT_DCT;
1228 } else {
Jingning Han19b5c8f2017-07-06 15:10:12 -07001229 if (plane_type == PLANE_TYPE_Y)
1230 tx_type = mbmi->txk_type[(blk_row << 4) + blk_col];
1231 else if (is_inter_block(mbmi))
1232 tx_type = mbmi->txk_type[(blk_row << 5) + (blk_col << 1)];
1233 else
1234 tx_type = intra_mode_to_tx_type_context[mbmi->uv_mode];
hui su45b64752017-07-12 16:54:35 -07001235 }
1236 assert(tx_type >= DCT_DCT && tx_type < TX_TYPES);
1237 return tx_type;
1238#endif // CONFIG_TXK_SEL
1239
James Zern7cdaa602017-04-20 20:12:46 -07001240#if FIXED_TX_TYPE
Angie Chiangc2ebfbf2017-04-15 13:56:58 -07001241 const int block_raster_idx = av1_block_index_to_raster_order(tx_size, block);
James Zern7cdaa602017-04-20 20:12:46 -07001242 return get_default_tx_type(plane_type, xd, block_raster_idx, tx_size);
hui su45b64752017-07-12 16:54:35 -07001243#endif // FIXED_TX_TYPE
1244
1245#if CONFIG_EXT_TX
Sarah Parker53f93db2017-07-11 17:20:04 -07001246#if CONFIG_MRC_TX
1247 if (mbmi->tx_type == MRC_DCT) {
1248 if (plane_type == PLANE_TYPE_Y) {
1249 assert(tx_size == TX_32X32);
1250 return mbmi->tx_type;
1251 }
1252 return DCT_DCT;
1253 }
1254#endif // CONFIG_MRC_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -07001255 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] > TX_32X32 ||
1256 (txsize_sqr_map[tx_size] >= TX_32X32 && !is_inter_block(mbmi)))
Yaowu Xuc27fc142016-08-22 16:08:15 -07001257 return DCT_DCT;
Jingning Han8260d8b2016-12-28 13:48:43 -08001258 if (mbmi->sb_type >= BLOCK_8X8 || CONFIG_CB4X4) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001259 if (plane_type == PLANE_TYPE_Y) {
1260#if !ALLOW_INTRA_EXT_TX
1261 if (is_inter_block(mbmi))
1262#endif // ALLOW_INTRA_EXT_TX
1263 return mbmi->tx_type;
1264 }
Jingning Han1a00cff2016-12-28 14:53:14 -08001265
1266 if (is_inter_block(mbmi)) {
1267// UV Inter only
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -07001268#if CONFIG_CHROMA_2X2
Jingning Han1a00cff2016-12-28 14:53:14 -08001269 if (tx_size < TX_4X4) return DCT_DCT;
1270#endif
Debargha Mukherjee5a488a62016-11-22 22:24:10 -08001271 return (mbmi->tx_type == IDTX && txsize_sqr_map[tx_size] >= TX_32X32)
Yaowu Xuc27fc142016-08-22 16:08:15 -07001272 ? DCT_DCT
1273 : mbmi->tx_type;
Jingning Han1a00cff2016-12-28 14:53:14 -08001274 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001275 }
1276
Jingning Han8260d8b2016-12-28 13:48:43 -08001277#if CONFIG_CB4X4
Thomas Daedeb7e72f32017-04-26 13:40:31 -07001278 (void)block;
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -07001279#if CONFIG_CHROMA_2X2
Jingning Han1a00cff2016-12-28 14:53:14 -08001280 if (tx_size < TX_4X4)
1281 return DCT_DCT;
1282 else
hui su45b64752017-07-12 16:54:35 -07001283#endif // CONFIG_CHROMA_2X2
Jingning Han1a00cff2016-12-28 14:53:14 -08001284 return intra_mode_to_tx_type_context[mbmi->uv_mode];
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -07001285#else // CONFIG_CB4X4
Yaowu Xuc27fc142016-08-22 16:08:15 -07001286 // Sub8x8-Inter/Intra OR UV-Intra
hui su45b64752017-07-12 16:54:35 -07001287 if (is_inter_block(mbmi)) { // Sub8x8-Inter
Yaowu Xuc27fc142016-08-22 16:08:15 -07001288 return DCT_DCT;
hui su45b64752017-07-12 16:54:35 -07001289 } else { // Sub8x8 Intra OR UV-Intra
1290 const int block_raster_idx =
1291 av1_block_index_to_raster_order(tx_size, block);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001292 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
Angie Chiang752ccce2017-04-09 13:41:13 -07001293 ? get_y_mode(mi, block_raster_idx)
Yaowu Xuc27fc142016-08-22 16:08:15 -07001294 : mbmi->uv_mode];
hui su45b64752017-07-12 16:54:35 -07001295 }
Thomas Daedeb7e72f32017-04-26 13:40:31 -07001296#endif // CONFIG_CB4X4
Yaowu Xuc27fc142016-08-22 16:08:15 -07001297#else // CONFIG_EXT_TX
Angie Chiang752ccce2017-04-09 13:41:13 -07001298 (void)block;
Sarah Parker53f93db2017-07-11 17:20:04 -07001299#if CONFIG_MRC_TX
1300 if (mbmi->tx_type == MRC_DCT) {
1301 if (plane_type == PLANE_TYPE_Y && !xd->lossless[mbmi->segment_id]) {
1302 assert(tx_size == TX_32X32);
1303 return mbmi->tx_type;
1304 }
1305 return DCT_DCT;
1306 }
1307#endif // CONFIG_MRC_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -07001308 if (plane_type != PLANE_TYPE_Y || xd->lossless[mbmi->segment_id] ||
1309 txsize_sqr_map[tx_size] >= TX_32X32)
1310 return DCT_DCT;
1311 return mbmi->tx_type;
1312#endif // CONFIG_EXT_TX
1313}
1314
Yaowu Xuf883b422016-08-30 14:01:10 -07001315void av1_setup_block_planes(MACROBLOCKD *xd, int ss_x, int ss_y);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001316
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001317static INLINE int tx_size_to_depth(TX_SIZE tx_size) {
Timothy B. Terriberryfe0fb1d2017-05-18 12:15:16 -07001318 return (int)(tx_size - TX_SIZE_LUMA_MIN);
Jingning Han4e1737a2016-10-25 16:05:02 -07001319}
1320
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001321static INLINE TX_SIZE depth_to_tx_size(int depth) {
Timothy B. Terriberryfe0fb1d2017-05-18 12:15:16 -07001322 return (TX_SIZE)(depth + TX_SIZE_LUMA_MIN);
Jingning Han4e1737a2016-10-25 16:05:02 -07001323}
1324
hui su0c6244b2017-07-12 17:11:43 -07001325static INLINE TX_SIZE av1_get_uv_tx_size(const MB_MODE_INFO *mbmi,
1326 const struct macroblockd_plane *pd) {
Timothy B. Terriberryfe67ed62017-04-26 16:53:47 -07001327#if CONFIG_CHROMA_2X2
Jingning Han93531242016-12-20 11:54:36 -08001328 assert(mbmi->tx_size > TX_2X2);
hui su0c6244b2017-07-12 17:11:43 -07001329#endif // CONFIG_CHROMA_2X2
Jingning Han93531242016-12-20 11:54:36 -08001330
Yaowu Xuc27fc142016-08-22 16:08:15 -07001331#if CONFIG_SUPERTX
1332 if (supertx_enabled(mbmi))
1333 return uvsupertx_size_lookup[txsize_sqr_map[mbmi->tx_size]]
1334 [pd->subsampling_x][pd->subsampling_y];
1335#endif // CONFIG_SUPERTX
Jingning Hancabd9892016-12-01 12:28:42 -08001336
hui su0c6244b2017-07-12 17:11:43 -07001337 const TX_SIZE uv_txsize =
1338 uv_txsize_lookup[mbmi->sb_type][mbmi->tx_size][pd->subsampling_x]
1339 [pd->subsampling_y];
Debargha Mukherjee2f123402016-08-30 17:43:38 -07001340 assert(uv_txsize != TX_INVALID);
1341 return uv_txsize;
Yaowu Xuc27fc142016-08-22 16:08:15 -07001342}
1343
hui su0c6244b2017-07-12 17:11:43 -07001344static INLINE TX_SIZE av1_get_tx_size(int plane, const MACROBLOCKD *xd) {
Angie Chiang80b82262017-02-24 11:39:47 -08001345 const MB_MODE_INFO *mbmi = &xd->mi[0]->mbmi;
hui su0c6244b2017-07-12 17:11:43 -07001346 if (plane == 0) return mbmi->tx_size;
Angie Chiang80b82262017-02-24 11:39:47 -08001347 const MACROBLOCKD_PLANE *pd = &xd->plane[plane];
hui su0c6244b2017-07-12 17:11:43 -07001348 return av1_get_uv_tx_size(mbmi, pd);
Angie Chiang80b82262017-02-24 11:39:47 -08001349}
1350
Yaowu Xuc27fc142016-08-22 16:08:15 -07001351static INLINE BLOCK_SIZE
1352get_plane_block_size(BLOCK_SIZE bsize, const struct macroblockd_plane *pd) {
1353 return ss_size_lookup[bsize][pd->subsampling_x][pd->subsampling_y];
1354}
1355
Timothy B. Terriberrya2d5cde2017-05-10 18:33:50 -07001356void av1_reset_skip_context(MACROBLOCKD *xd, int mi_row, int mi_col,
1357 BLOCK_SIZE bsize);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001358
1359typedef void (*foreach_transformed_block_visitor)(int plane, int block,
1360 int blk_row, int blk_col,
1361 BLOCK_SIZE plane_bsize,
1362 TX_SIZE tx_size, void *arg);
1363
Yaowu Xuf883b422016-08-30 14:01:10 -07001364void av1_foreach_transformed_block_in_plane(
Yaowu Xuc27fc142016-08-22 16:08:15 -07001365 const MACROBLOCKD *const xd, BLOCK_SIZE bsize, int plane,
1366 foreach_transformed_block_visitor visit, void *arg);
1367
Angie Chiang0397eda2017-03-15 16:57:14 -07001368#if CONFIG_LV_MAP
1369void av1_foreach_transformed_block(const MACROBLOCKD *const xd,
Jingning Han94652b82017-04-04 09:45:02 -07001370 BLOCK_SIZE bsize, int mi_row, int mi_col,
Angie Chiang0397eda2017-03-15 16:57:14 -07001371 foreach_transformed_block_visitor visit,
1372 void *arg);
1373#endif
1374
iole moccagattaf25a4cf2016-11-11 23:57:57 -08001375#if CONFIG_COEF_INTERLEAVE
1376static INLINE int get_max_4x4_size(int num_4x4, int mb_to_edge,
1377 int subsampling) {
1378 return num_4x4 + (mb_to_edge >= 0 ? 0 : mb_to_edge >> (5 + subsampling));
1379}
1380
1381void av1_foreach_transformed_block_interleave(
1382 const MACROBLOCKD *const xd, BLOCK_SIZE bsize,
1383 foreach_transformed_block_visitor visit, void *arg);
1384#endif
1385
Yaowu Xuf883b422016-08-30 14:01:10 -07001386void av1_set_contexts(const MACROBLOCKD *xd, struct macroblockd_plane *pd,
Jingning Haneee43152016-12-05 09:58:45 -08001387 int plane, TX_SIZE tx_size, int has_eob, int aoff,
1388 int loff);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001389
1390#if CONFIG_EXT_INTER
1391static INLINE int is_interintra_allowed_bsize(const BLOCK_SIZE bsize) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001392#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001393 // TODO(debargha): Should this be bsize < BLOCK_LARGEST?
1394 return (bsize >= BLOCK_8X8) && (bsize < BLOCK_64X64);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001395#else
1396 (void)bsize;
1397 return 0;
1398#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001399}
1400
1401static INLINE int is_interintra_allowed_mode(const PREDICTION_MODE mode) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001402#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001403 return (mode >= NEARESTMV) && (mode <= NEWMV);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001404#else
1405 (void)mode;
1406 return 0;
1407#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001408}
1409
1410static INLINE int is_interintra_allowed_ref(const MV_REFERENCE_FRAME rf[2]) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001411#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001412 return (rf[0] > INTRA_FRAME) && (rf[1] <= INTRA_FRAME);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001413#else
1414 (void)rf;
1415 return 0;
1416#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001417}
1418
1419static INLINE int is_interintra_allowed(const MB_MODE_INFO *mbmi) {
1420 return is_interintra_allowed_bsize(mbmi->sb_type) &&
1421 is_interintra_allowed_mode(mbmi->mode) &&
1422 is_interintra_allowed_ref(mbmi->ref_frame);
1423}
1424
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001425static INLINE int is_interintra_allowed_bsize_group(int group) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001426 int i;
Rupert Swarbrick93c39e92017-07-12 11:11:02 +01001427 for (i = 0; i < BLOCK_SIZES_ALL; i++) {
Urvang Joshicb586f32016-09-20 11:36:33 -07001428 if (size_group_lookup[i] == group &&
1429 is_interintra_allowed_bsize((BLOCK_SIZE)i)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001430 return 1;
Urvang Joshicb586f32016-09-20 11:36:33 -07001431 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001432 }
1433 return 0;
1434}
1435
1436static INLINE int is_interintra_pred(const MB_MODE_INFO *mbmi) {
1437 return (mbmi->ref_frame[1] == INTRA_FRAME) && is_interintra_allowed(mbmi);
1438}
1439#endif // CONFIG_EXT_INTER
1440
Sarah Parker106b3cb2017-04-21 12:13:37 -07001441#if CONFIG_VAR_TX
1442static INLINE int get_vartx_max_txsize(const MB_MODE_INFO *const mbmi,
1443 BLOCK_SIZE bsize) {
1444#if CONFIG_CB4X4
1445 (void)mbmi;
1446 return max_txsize_rect_lookup[bsize];
1447#endif // CONFIG_C4X4
1448 return mbmi->sb_type < BLOCK_8X8 ? max_txsize_rect_lookup[mbmi->sb_type]
1449 : max_txsize_rect_lookup[bsize];
1450}
1451#endif // CONFIG_VAR_TX
1452
Yue Chencb60b182016-10-13 15:18:22 -07001453#if CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
1454static INLINE int is_motion_variation_allowed_bsize(BLOCK_SIZE bsize) {
1455 return (bsize >= BLOCK_8X8);
1456}
1457
Yue Chen8636da62017-04-03 01:23:44 -07001458static INLINE int is_motion_variation_allowed_compound(
1459 const MB_MODE_INFO *mbmi) {
Zoe Liu85b66462017-04-20 14:28:19 -07001460#if CONFIG_EXT_INTER && CONFIG_COMPOUND_SINGLEREF
1461 if (!has_second_ref(mbmi) && !is_inter_singleref_comp_mode(mbmi->mode))
1462#else
Yue Chen8636da62017-04-03 01:23:44 -07001463 if (!has_second_ref(mbmi))
Zoe Liu85b66462017-04-20 14:28:19 -07001464#endif // CONFIG_EXT_INTER && CONFIG_COMPOUND_SINGLEREF
Yue Chen8636da62017-04-03 01:23:44 -07001465 return 1;
1466 else
1467 return 0;
1468}
1469
Yue Chen5329a2b2017-02-28 17:33:00 +08001470#if CONFIG_MOTION_VAR
Yue Chen1bd42be2017-03-15 18:07:04 -07001471// input: log2 of length, 0(4), 1(8), ...
1472static const int max_neighbor_obmc[6] = { 0, 1, 2, 3, 4, 4 };
1473
Yue Chen5329a2b2017-02-28 17:33:00 +08001474static INLINE int check_num_overlappable_neighbors(const MB_MODE_INFO *mbmi) {
Yue Chen1bd42be2017-03-15 18:07:04 -07001475 return !(mbmi->overlappable_neighbors[0] == 0 &&
1476 mbmi->overlappable_neighbors[1] == 0);
Yue Chen5329a2b2017-02-28 17:33:00 +08001477}
1478#endif
1479
Sarah Parker19234cc2017-03-10 16:43:25 -08001480static INLINE MOTION_MODE motion_mode_allowed(
Sarah Parker0eea89f2017-07-11 11:56:36 -07001481#if CONFIG_GLOBAL_MOTION
Sarah Parker19234cc2017-03-10 16:43:25 -08001482 int block, const WarpedMotionParams *gm_params,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001483#endif // CONFIG_GLOBAL_MOTION
Yue Chen52c51732017-07-11 15:08:30 -07001484#if CONFIG_WARPED_MOTION
1485 const MACROBLOCKD *xd,
1486#endif
Sarah Parker19234cc2017-03-10 16:43:25 -08001487 const MODE_INFO *mi) {
1488 const MB_MODE_INFO *mbmi = &mi->mbmi;
Sarah Parker0eea89f2017-07-11 11:56:36 -07001489#if CONFIG_GLOBAL_MOTION
Sarah Parker19234cc2017-03-10 16:43:25 -08001490 const TransformationType gm_type = gm_params[mbmi->ref_frame[0]].wmtype;
1491 if (is_global_mv_block(mi, block, gm_type)) return SIMPLE_TRANSLATION;
Sarah Parker0eea89f2017-07-11 11:56:36 -07001492#endif // CONFIG_GLOBAL_MOTION
Yaowu Xuc27fc142016-08-22 16:08:15 -07001493#if CONFIG_EXT_INTER
Yue Chen69f18e12016-09-08 14:48:15 -07001494 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
Yue Chen8636da62017-04-03 01:23:44 -07001495 is_inter_mode(mbmi->mode) && mbmi->ref_frame[1] != INTRA_FRAME &&
1496 is_motion_variation_allowed_compound(mbmi)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001497#else
Yue Chen69f18e12016-09-08 14:48:15 -07001498 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
Yue Chen8636da62017-04-03 01:23:44 -07001499 is_inter_mode(mbmi->mode) && is_motion_variation_allowed_compound(mbmi)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001500#endif // CONFIG_EXT_INTER
Yue Chen5329a2b2017-02-28 17:33:00 +08001501#if CONFIG_MOTION_VAR
1502 if (!check_num_overlappable_neighbors(mbmi)) return SIMPLE_TRANSLATION;
1503#endif
Yue Chen69f18e12016-09-08 14:48:15 -07001504#if CONFIG_WARPED_MOTION
Yue Chen52c51732017-07-11 15:08:30 -07001505 if (!has_second_ref(mbmi) && mbmi->num_proj_ref[0] >= 1 &&
1506 !av1_is_scaled(&(xd->block_refs[0]->sf)))
Yue Chen69f18e12016-09-08 14:48:15 -07001507 return WARPED_CAUSAL;
1508 else
1509#endif // CONFIG_WARPED_MOTION
1510#if CONFIG_MOTION_VAR
1511 return OBMC_CAUSAL;
1512#else
1513 return SIMPLE_TRANSLATION;
1514#endif // CONFIG_MOTION_VAR
1515 } else {
1516 return SIMPLE_TRANSLATION;
1517 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001518}
1519
Wei-Ting Lin85a8f702017-06-22 13:55:15 -07001520#if CONFIG_NCOBMC_ADAPT_WEIGHT && CONFIG_MOTION_VAR
Wei-Ting Lind0f7ba12017-06-30 14:59:57 -07001521static INLINE NCOBMC_MODE ncobmc_mode_allowed_bsize(BLOCK_SIZE bsize) {
1522 if (bsize < BLOCK_8X8 || bsize > BLOCK_64X64)
Wei-Ting Lin85a8f702017-06-22 13:55:15 -07001523 return NO_OVERLAP;
1524 else
1525 return (NCOBMC_MODE)(MAX_NCOBMC_MODES - 1);
1526}
Wei-Ting Lind0f7ba12017-06-30 14:59:57 -07001527
1528static INLINE MOTION_MODE
1529motion_mode_allowed_wrapper(int for_mv_search,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001530#if CONFIG_GLOBAL_MOTION
Wei-Ting Lind0f7ba12017-06-30 14:59:57 -07001531 int block, const WarpedMotionParams *gm_params,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001532#endif // CONFIG_GLOBAL_MOTION
Yue Chen52c51732017-07-11 15:08:30 -07001533#if CONFIG_WARPED_MOTION
1534 const MACROBLOCKD *xd,
1535#endif
Wei-Ting Lind0f7ba12017-06-30 14:59:57 -07001536 const MODE_INFO *mi) {
1537 const MB_MODE_INFO *mbmi = &mi->mbmi;
1538 MOTION_MODE motion_mode_for_mv_search = motion_mode_allowed(
Sarah Parker0eea89f2017-07-11 11:56:36 -07001539#if CONFIG_GLOBAL_MOTION
Wei-Ting Lind0f7ba12017-06-30 14:59:57 -07001540 int block, const WarpedMotionParams *gm_params,
1541#endif
Yue Chen52c51732017-07-11 15:08:30 -07001542#if CONFIG_WARPED_MOTION
1543 xd,
1544#endif
Wei-Ting Lind0f7ba12017-06-30 14:59:57 -07001545 mi);
1546 int ncobmc_mode_allowed =
1547 ncobmc_mode_allowed_bsize(mbmi->sb_type) && is_inter_mode(mbmi->mode);
1548 if (for_mv_search)
1549 return motion_mode_for_mv_search;
1550 else
1551 return ncobmc_mode_allowed ? NCOBMC_ADAPT_WEIGHT
1552 : motion_mode_for_mv_search;
1553}
Wei-Ting Lin85a8f702017-06-22 13:55:15 -07001554#endif
1555
Sarah Parker19234cc2017-03-10 16:43:25 -08001556static INLINE void assert_motion_mode_valid(MOTION_MODE mode,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001557#if CONFIG_GLOBAL_MOTION
Sarah Parker19234cc2017-03-10 16:43:25 -08001558 int block,
1559 const WarpedMotionParams *gm_params,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001560#endif // CONFIG_GLOBAL_MOTION
Yue Chen52c51732017-07-11 15:08:30 -07001561#if CONFIG_WARPED_MOTION
1562 const MACROBLOCKD *xd,
1563#endif
Sarah Parker19234cc2017-03-10 16:43:25 -08001564 const MODE_INFO *mi) {
Wei-Ting Lind0f7ba12017-06-30 14:59:57 -07001565#if CONFIG_NCOBMC_ADAPT_WEIGHT
1566 const MOTION_MODE last_motion_mode_allowed =
1567 motion_mode_allowed_wrapper(0,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001568#if CONFIG_GLOBAL_MOTION
Wei-Ting Lind0f7ba12017-06-30 14:59:57 -07001569 block, gm_params,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001570#endif // CONFIG_GLOBAL_MOTION
Wei-Ting Lind0f7ba12017-06-30 14:59:57 -07001571 mi);
1572#else
Sarah Parker19234cc2017-03-10 16:43:25 -08001573 const MOTION_MODE last_motion_mode_allowed = motion_mode_allowed(
Sarah Parker0eea89f2017-07-11 11:56:36 -07001574#if CONFIG_GLOBAL_MOTION
Sarah Parker19234cc2017-03-10 16:43:25 -08001575 block, gm_params,
Sarah Parker0eea89f2017-07-11 11:56:36 -07001576#endif // CONFIG_GLOBAL_MOTION
Yue Chen52c51732017-07-11 15:08:30 -07001577#if CONFIG_WARPED_MOTION
1578 xd,
1579#endif
Sarah Parker19234cc2017-03-10 16:43:25 -08001580 mi);
Wei-Ting Lind0f7ba12017-06-30 14:59:57 -07001581#endif
Sarah Parker19234cc2017-03-10 16:43:25 -08001582 // Check that the input mode is not illegal
1583 if (last_motion_mode_allowed < mode)
1584 assert(0 && "Illegal motion mode selected");
1585}
1586
Yue Chencb60b182016-10-13 15:18:22 -07001587#if CONFIG_MOTION_VAR
Yaowu Xuc27fc142016-08-22 16:08:15 -07001588static INLINE int is_neighbor_overlappable(const MB_MODE_INFO *mbmi) {
1589 return (is_inter_block(mbmi));
1590}
Yue Chencb60b182016-10-13 15:18:22 -07001591#endif // CONFIG_MOTION_VAR
1592#endif // CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
Yaowu Xuc27fc142016-08-22 16:08:15 -07001593
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001594// Returns sub-sampled dimensions of the given block.
1595// The output values for 'rows_within_bounds' and 'cols_within_bounds' will
1596// differ from 'height' and 'width' when part of the block is outside the right
1597// and/or bottom image boundary.
1598static INLINE void av1_get_block_dimensions(BLOCK_SIZE bsize, int plane,
1599 const MACROBLOCKD *xd, int *width,
1600 int *height,
1601 int *rows_within_bounds,
1602 int *cols_within_bounds) {
1603 const int block_height = block_size_high[bsize];
1604 const int block_width = block_size_wide[bsize];
1605 const int block_rows = (xd->mb_to_bottom_edge >= 0)
1606 ? block_height
1607 : (xd->mb_to_bottom_edge >> 3) + block_height;
1608 const int block_cols = (xd->mb_to_right_edge >= 0)
1609 ? block_width
1610 : (xd->mb_to_right_edge >> 3) + block_width;
1611 const struct macroblockd_plane *const pd = &xd->plane[plane];
1612 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_x == 0));
1613 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_y == 0));
1614 assert(block_width >= block_cols);
1615 assert(block_height >= block_rows);
1616 if (width) *width = block_width >> pd->subsampling_x;
1617 if (height) *height = block_height >> pd->subsampling_y;
1618 if (rows_within_bounds) *rows_within_bounds = block_rows >> pd->subsampling_y;
1619 if (cols_within_bounds) *cols_within_bounds = block_cols >> pd->subsampling_x;
1620}
1621
Yue Chen19e7aa82016-11-30 14:05:39 -08001622#if CONFIG_GLOBAL_MOTION
1623static INLINE int is_nontrans_global_motion(const MACROBLOCKD *xd) {
1624 const MODE_INFO *mi = xd->mi[0];
1625 const MB_MODE_INFO *const mbmi = &mi->mbmi;
1626 int ref;
1627#if CONFIG_CB4X4
1628 const int unify_bsize = 1;
1629#else
1630 const int unify_bsize = 0;
1631#endif
1632
1633 // First check if all modes are ZEROMV
1634 if (mbmi->sb_type >= BLOCK_8X8 || unify_bsize) {
1635#if CONFIG_EXT_INTER
1636 if (mbmi->mode != ZEROMV && mbmi->mode != ZERO_ZEROMV) return 0;
1637#else
1638 if (mbmi->mode != ZEROMV) return 0;
1639#endif // CONFIG_EXT_INTER
1640 } else {
1641#if CONFIG_EXT_INTER
David Barkera0c16382017-07-07 17:01:30 +01001642 if ((mi->bmi[0].as_mode != ZEROMV && mi->bmi[0].as_mode != ZERO_ZEROMV) ||
1643 (mi->bmi[1].as_mode != ZEROMV && mi->bmi[1].as_mode != ZERO_ZEROMV) ||
1644 (mi->bmi[2].as_mode != ZEROMV && mi->bmi[2].as_mode != ZERO_ZEROMV) ||
1645 (mi->bmi[3].as_mode != ZEROMV && mi->bmi[3].as_mode != ZERO_ZEROMV))
Yue Chen19e7aa82016-11-30 14:05:39 -08001646 return 0;
1647#else
1648 if (mi->bmi[0].as_mode != ZEROMV || mi->bmi[1].as_mode != ZEROMV ||
1649 mi->bmi[2].as_mode != ZEROMV || mi->bmi[3].as_mode != ZEROMV)
1650 return 0;
1651#endif // CONFIG_EXT_INTER
1652 }
Jingning Han3ca0e672017-04-14 19:48:05 -07001653
1654#if !GLOBAL_SUB8X8_USED
1655 if (mbmi->sb_type < BLOCK_8X8) return 0;
1656#endif
1657
Yue Chen19e7aa82016-11-30 14:05:39 -08001658 // Now check if all global motion is non translational
1659 for (ref = 0; ref < 1 + has_second_ref(mbmi); ++ref) {
1660 if (xd->global_motion[mbmi->ref_frame[ref]].wmtype <= TRANSLATION) return 0;
1661 }
1662 return 1;
1663}
1664#endif // CONFIG_GLOBAL_MOTION
1665
Yaowu Xu4ff59b52017-04-24 12:41:56 -07001666static INLINE PLANE_TYPE get_plane_type(int plane) {
Luc Trudeau005feb62017-02-22 13:34:01 -05001667 return (plane == 0) ? PLANE_TYPE_Y : PLANE_TYPE_UV;
1668}
1669
Yaowu Xuc27fc142016-08-22 16:08:15 -07001670#ifdef __cplusplus
1671} // extern "C"
1672#endif
1673
Yaowu Xuf883b422016-08-30 14:01:10 -07001674#endif // AV1_COMMON_BLOCKD_H_