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Yaowu Xuc27fc142016-08-22 16:08:15 -07001/*
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07002 * Copyright (c) 2016, Alliance for Open Media. All rights reserved
Yaowu Xuc27fc142016-08-22 16:08:15 -07003 *
Yaowu Xu2ab7ff02016-09-02 12:04:54 -07004 * This source code is subject to the terms of the BSD 2 Clause License and
5 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6 * was not distributed with this source code in the LICENSE file, you can
7 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8 * Media Patent License 1.0 was not distributed with this source code in the
9 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
Yaowu Xuc27fc142016-08-22 16:08:15 -070010 */
11
Yaowu Xuf883b422016-08-30 14:01:10 -070012#ifndef AV1_COMMON_BLOCKD_H_
13#define AV1_COMMON_BLOCKD_H_
Yaowu Xuc27fc142016-08-22 16:08:15 -070014
Yaowu Xuf883b422016-08-30 14:01:10 -070015#include "./aom_config.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070016
Yaowu Xuf883b422016-08-30 14:01:10 -070017#include "aom_dsp/aom_dsp_common.h"
Yaowu Xuc27fc142016-08-22 16:08:15 -070018#include "aom_ports/mem.h"
19#include "aom_scale/yv12config.h"
20
21#include "av1/common/common_data.h"
22#include "av1/common/quant_common.h"
23#include "av1/common/entropy.h"
24#include "av1/common/entropymode.h"
25#include "av1/common/mv.h"
26#include "av1/common/scale.h"
27#include "av1/common/seg_common.h"
28#include "av1/common/tile_common.h"
Yushin Cho77bba8d2016-11-04 16:36:56 -070029#if CONFIG_PVQ
30#include "av1/common/pvq.h"
31#include "av1/common/pvq_state.h"
32#include "av1/decoder/decint.h"
33#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -070034
35#ifdef __cplusplus
36extern "C" {
37#endif
38
Jingning Hanc41a5492017-02-24 11:18:52 -080039#define SUB8X8_COMP_REF 1
40
Yaowu Xuc27fc142016-08-22 16:08:15 -070041#define MAX_MB_PLANE 3
42
David Barkerac37fa32016-12-02 12:30:21 +000043#if CONFIG_EXT_INTER
Sarah Parkerb9f757c2017-01-06 17:12:24 -080044
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080045#if CONFIG_COMPOUND_SEGMENT
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080046// Set COMPOUND_SEGMENT_TYPE to one of the three
47// 0: Uniform
48// 1: Difference weighted
49#define COMPOUND_SEGMENT_TYPE 1
50
51#if COMPOUND_SEGMENT_TYPE == 0
52#define MAX_SEG_MASK_BITS 1
Sarah Parkerb9f757c2017-01-06 17:12:24 -080053// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
54typedef enum {
55 UNIFORM_45 = 0,
56 UNIFORM_45_INV,
Sarah Parkerb9f757c2017-01-06 17:12:24 -080057 SEG_MASK_TYPES,
58} SEG_MASK_TYPE;
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080059
60#elif COMPOUND_SEGMENT_TYPE == 1
61#define MAX_SEG_MASK_BITS 1
62// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
63typedef enum {
Yaowu Xua93e65e2017-01-24 10:58:48 -080064 DIFFWTD_42 = 0,
65 DIFFWTD_42_INV,
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080066 SEG_MASK_TYPES,
67} SEG_MASK_TYPE;
68
69#endif // COMPOUND_SEGMENT_TYPE
Sarah Parkerb9f757c2017-01-06 17:12:24 -080070#endif // CONFIG_COMPOUND_SEGMENT
Debargha Mukherjee1edf9a32017-01-07 18:54:20 -080071#endif // CONFIG_EXT_INTER
David Barkerac37fa32016-12-02 12:30:21 +000072
Yaowu Xuc27fc142016-08-22 16:08:15 -070073typedef enum {
74 KEY_FRAME = 0,
75 INTER_FRAME = 1,
76 FRAME_TYPES,
77} FRAME_TYPE;
78
Yaowu Xuc27fc142016-08-22 16:08:15 -070079static INLINE int is_inter_mode(PREDICTION_MODE mode) {
80#if CONFIG_EXT_INTER
81 return mode >= NEARESTMV && mode <= NEW_NEWMV;
82#else
83 return mode >= NEARESTMV && mode <= NEWMV;
84#endif // CONFIG_EXT_INTER
85}
86
Yushin Cho77bba8d2016-11-04 16:36:56 -070087#if CONFIG_PVQ
88typedef struct PVQ_INFO {
89 int theta[PVQ_MAX_PARTITIONS];
Yushin Cho77bba8d2016-11-04 16:36:56 -070090 int qg[PVQ_MAX_PARTITIONS];
91 int k[PVQ_MAX_PARTITIONS];
Yushin Cho48f84db2016-11-07 21:20:17 -080092 od_coeff y[OD_TXSIZE_MAX * OD_TXSIZE_MAX];
Yushin Cho77bba8d2016-11-04 16:36:56 -070093 int nb_bands;
94 int off[PVQ_MAX_PARTITIONS];
95 int size[PVQ_MAX_PARTITIONS];
96 int skip_rest;
97 int skip_dir;
ltrudeaue1c09292017-01-20 15:42:13 -050098 int bs; // log of the block size minus two,
99 // i.e. equivalent to aom's TX_SIZE
100 // Block skip info, indicating whether DC/AC, is coded.
101 PVQ_SKIP_TYPE ac_dc_coded; // bit0: DC coded, bit1 : AC coded (1 means coded)
Yushin Cho77bba8d2016-11-04 16:36:56 -0700102 tran_low_t dq_dc_residue;
103} PVQ_INFO;
104
105typedef struct PVQ_QUEUE {
106 PVQ_INFO *buf; // buffer for pvq info, stored in encoding order
107 int curr_pos; // curr position to write PVQ_INFO
108 int buf_len; // allocated buffer length
109 int last_pos; // last written position of PVQ_INFO in a tile
110} PVQ_QUEUE;
111#endif
112
David Barkerac37fa32016-12-02 12:30:21 +0000113typedef struct {
114 uint8_t *plane[MAX_MB_PLANE];
115 int stride[MAX_MB_PLANE];
116} BUFFER_SET;
117
Yaowu Xuc27fc142016-08-22 16:08:15 -0700118#if CONFIG_EXT_INTER
119static INLINE int is_inter_singleref_mode(PREDICTION_MODE mode) {
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700120 return mode >= NEARESTMV && mode <= NEWMV;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700121}
122
123static INLINE int is_inter_compound_mode(PREDICTION_MODE mode) {
124 return mode >= NEAREST_NEARESTMV && mode <= NEW_NEWMV;
125}
126
127static INLINE PREDICTION_MODE compound_ref0_mode(PREDICTION_MODE mode) {
128 static PREDICTION_MODE lut[MB_MODE_COUNT] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800129 MB_MODE_COUNT, // DC_PRED
130 MB_MODE_COUNT, // V_PRED
131 MB_MODE_COUNT, // H_PRED
132 MB_MODE_COUNT, // D45_PRED
133 MB_MODE_COUNT, // D135_PRED
134 MB_MODE_COUNT, // D117_PRED
135 MB_MODE_COUNT, // D153_PRED
136 MB_MODE_COUNT, // D207_PRED
137 MB_MODE_COUNT, // D63_PRED
138#if CONFIG_ALT_INTRA
139 MB_MODE_COUNT, // SMOOTH_PRED
140#endif // CONFIG_ALT_INTRA
141 MB_MODE_COUNT, // TM_PRED
142 MB_MODE_COUNT, // NEARESTMV
143 MB_MODE_COUNT, // NEARMV
144 MB_MODE_COUNT, // ZEROMV
145 MB_MODE_COUNT, // NEWMV
Urvang Joshi102245d2016-11-28 13:05:36 -0800146 NEARESTMV, // NEAREST_NEARESTMV
147 NEARESTMV, // NEAREST_NEARMV
148 NEARMV, // NEAR_NEARESTMV
149 NEARMV, // NEAR_NEARMV
150 NEARESTMV, // NEAREST_NEWMV
151 NEWMV, // NEW_NEARESTMV
152 NEARMV, // NEAR_NEWMV
153 NEWMV, // NEW_NEARMV
154 ZEROMV, // ZERO_ZEROMV
155 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700156 };
157 assert(is_inter_compound_mode(mode));
158 return lut[mode];
159}
160
161static INLINE PREDICTION_MODE compound_ref1_mode(PREDICTION_MODE mode) {
162 static PREDICTION_MODE lut[MB_MODE_COUNT] = {
Urvang Joshi102245d2016-11-28 13:05:36 -0800163 MB_MODE_COUNT, // DC_PRED
164 MB_MODE_COUNT, // V_PRED
165 MB_MODE_COUNT, // H_PRED
166 MB_MODE_COUNT, // D45_PRED
167 MB_MODE_COUNT, // D135_PRED
168 MB_MODE_COUNT, // D117_PRED
169 MB_MODE_COUNT, // D153_PRED
170 MB_MODE_COUNT, // D207_PRED
171 MB_MODE_COUNT, // D63_PRED
172#if CONFIG_ALT_INTRA
173 MB_MODE_COUNT, // SMOOTH_PRED
174#endif // CONFIG_ALT_INTRA
175 MB_MODE_COUNT, // TM_PRED
176 MB_MODE_COUNT, // NEARESTMV
177 MB_MODE_COUNT, // NEARMV
178 MB_MODE_COUNT, // ZEROMV
179 MB_MODE_COUNT, // NEWMV
Urvang Joshi102245d2016-11-28 13:05:36 -0800180 NEARESTMV, // NEAREST_NEARESTMV
181 NEARMV, // NEAREST_NEARMV
182 NEARESTMV, // NEAR_NEARESTMV
183 NEARMV, // NEAR_NEARMV
184 NEWMV, // NEAREST_NEWMV
185 NEARESTMV, // NEW_NEARESTMV
186 NEWMV, // NEAR_NEWMV
187 NEARMV, // NEW_NEARMV
188 ZEROMV, // ZERO_ZEROMV
189 NEWMV, // NEW_NEWMV
Yaowu Xuc27fc142016-08-22 16:08:15 -0700190 };
191 assert(is_inter_compound_mode(mode));
192 return lut[mode];
193}
194
195static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
Zoe Liu7f24e1b2017-03-17 17:42:05 -0700196 return (mode == NEWMV || mode == NEW_NEWMV || mode == NEAREST_NEWMV ||
197 mode == NEW_NEARESTMV || mode == NEAR_NEWMV || mode == NEW_NEARMV);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700198}
Sarah Parker6fdc8532016-11-16 17:47:13 -0800199
Sarah Parker2e604882017-01-17 17:31:25 -0800200static INLINE int use_masked_motion_search(COMPOUND_TYPE type) {
201 return (type == COMPOUND_WEDGE);
202}
203
Sarah Parker6fdc8532016-11-16 17:47:13 -0800204static INLINE int is_masked_compound_type(COMPOUND_TYPE type) {
Sarah Parker569edda2016-12-14 14:57:38 -0800205#if CONFIG_COMPOUND_SEGMENT
206 return (type == COMPOUND_WEDGE || type == COMPOUND_SEG);
207#else
Sarah Parker6fdc8532016-11-16 17:47:13 -0800208 return (type == COMPOUND_WEDGE);
Sarah Parker569edda2016-12-14 14:57:38 -0800209#endif // CONFIG_COMPOUND_SEGMENT
Sarah Parker6fdc8532016-11-16 17:47:13 -0800210}
Yaowu Xuc27fc142016-08-22 16:08:15 -0700211#else
212
213static INLINE int have_newmv_in_inter_mode(PREDICTION_MODE mode) {
214 return (mode == NEWMV);
215}
216#endif // CONFIG_EXT_INTER
217
218/* For keyframes, intra block modes are predicted by the (already decoded)
219 modes for the Y blocks to the left and above us; for interframes, there
220 is a single probability table. */
221
222typedef struct {
223 PREDICTION_MODE as_mode;
224 int_mv as_mv[2]; // first, second inter predictor motion vectors
225#if CONFIG_REF_MV
Yaowu Xuf5bbbfa2016-09-26 09:13:38 -0700226 int_mv pred_mv[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700227#endif
228#if CONFIG_EXT_INTER
229 int_mv ref_mv[2];
230#endif // CONFIG_EXT_INTER
231} b_mode_info;
232
233typedef int8_t MV_REFERENCE_FRAME;
234
Urvang Joshib100db72016-10-12 16:28:56 -0700235#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700236typedef struct {
237 // Number of base colors for Y (0) and UV (1)
238 uint8_t palette_size[2];
239// Value of base colors for Y, U, and V
Sebastien Alaiwan71e87842017-04-12 16:03:28 +0200240#if CONFIG_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700241 uint16_t palette_colors[3 * PALETTE_MAX_SIZE];
242#else
243 uint8_t palette_colors[3 * PALETTE_MAX_SIZE];
Sebastien Alaiwan71e87842017-04-12 16:03:28 +0200244#endif // CONFIG_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700245 // Only used by encoder to store the color index of the top left pixel.
246 // TODO(huisu): move this to encoder
247 uint8_t palette_first_color_idx[2];
248} PALETTE_MODE_INFO;
Urvang Joshib100db72016-10-12 16:28:56 -0700249#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700250
hui su5db97432016-10-14 16:10:14 -0700251#if CONFIG_FILTER_INTRA
Yue Chen8d8638a2017-02-21 13:28:16 +0800252#define USE_3TAP_INTRA_FILTER 1 // 0: 4-tap; 1: 3-tap
Yaowu Xuc27fc142016-08-22 16:08:15 -0700253typedef struct {
254 // 1: an ext intra mode is used; 0: otherwise.
hui su5db97432016-10-14 16:10:14 -0700255 uint8_t use_filter_intra_mode[PLANE_TYPES];
256 FILTER_INTRA_MODE filter_intra_mode[PLANE_TYPES];
257} FILTER_INTRA_MODE_INFO;
258#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700259
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800260#if CONFIG_VAR_TX
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800261#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800262#define TXB_COEFF_COST_MAP_SIZE (2 * MAX_MIB_SIZE)
Angie Chiang7c2b7f22016-11-07 16:00:00 -0800263#endif
264#endif
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800265
266// TODO(angiebird): Merge RD_COST and RD_STATS
267typedef struct RD_STATS {
268 int rate;
269 int64_t dist;
270 int64_t sse;
271 int skip;
272#if CONFIG_RD_DEBUG
273 int txb_coeff_cost[MAX_MB_PLANE];
Angie Chiang3963d632016-11-10 18:41:40 -0800274#if CONFIG_VAR_TX
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800275 int txb_coeff_cost_map[MAX_MB_PLANE][TXB_COEFF_COST_MAP_SIZE]
276 [TXB_COEFF_COST_MAP_SIZE];
Angie Chiang3963d632016-11-10 18:41:40 -0800277#endif // CONFIG_VAR_TX
278#endif // CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800279} RD_STATS;
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800280
Sarah Parker6fdc8532016-11-16 17:47:13 -0800281#if CONFIG_EXT_INTER
282typedef struct {
283 COMPOUND_TYPE type;
284 int wedge_index;
285 int wedge_sign;
Sarah Parker569edda2016-12-14 14:57:38 -0800286#if CONFIG_COMPOUND_SEGMENT
Sarah Parkerb9f757c2017-01-06 17:12:24 -0800287 SEG_MASK_TYPE mask_type;
288 DECLARE_ALIGNED(16, uint8_t, seg_mask[2 * MAX_SB_SQUARE]);
Sarah Parker569edda2016-12-14 14:57:38 -0800289#endif // CONFIG_COMPOUND_SEGMENT
Sarah Parker6fdc8532016-11-16 17:47:13 -0800290} INTERINTER_COMPOUND_DATA;
291#endif // CONFIG_EXT_INTER
292
Yaowu Xuc27fc142016-08-22 16:08:15 -0700293// This structure now relates to 8x8 block regions.
294typedef struct {
295 // Common for both INTER and INTRA blocks
296 BLOCK_SIZE sb_type;
297 PREDICTION_MODE mode;
298 TX_SIZE tx_size;
299#if CONFIG_VAR_TX
300 // TODO(jingning): This effectively assigned a separate entry for each
301 // 8x8 block. Apparently it takes much more space than needed.
302 TX_SIZE inter_tx_size[MAX_MIB_SIZE][MAX_MIB_SIZE];
Jingning Hane67b38a2016-11-04 10:30:00 -0700303 TX_SIZE min_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700304#endif
305 int8_t skip;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700306 int8_t segment_id;
307#if CONFIG_SUPERTX
308 // Minimum of all segment IDs under the current supertx block.
309 int8_t segment_id_supertx;
310#endif // CONFIG_SUPERTX
311 int8_t seg_id_predicted; // valid only when temporal_update is enabled
312
313 // Only for INTRA blocks
314 PREDICTION_MODE uv_mode;
Urvang Joshib100db72016-10-12 16:28:56 -0700315#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700316 PALETTE_MODE_INFO palette_mode_info;
Urvang Joshib100db72016-10-12 16:28:56 -0700317#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700318
319// Only for INTER blocks
320#if CONFIG_DUAL_FILTER
James Zern7b9407a2016-05-18 23:48:05 -0700321 InterpFilter interp_filter[4];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700322#else
James Zern7b9407a2016-05-18 23:48:05 -0700323 InterpFilter interp_filter;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700324#endif
325 MV_REFERENCE_FRAME ref_frame[2];
326 TX_TYPE tx_type;
Angie Chiang808d8592017-04-06 18:36:55 -0700327#if CONFIG_LV_MAP
328 TX_TYPE txk_type[MAX_SB_SQUARE / (TX_SIZE_W_MIN * TX_SIZE_H_MIN)];
329#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700330
hui su5db97432016-10-14 16:10:14 -0700331#if CONFIG_FILTER_INTRA
332 FILTER_INTRA_MODE_INFO filter_intra_mode_info;
333#endif // CONFIG_FILTER_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700334#if CONFIG_EXT_INTRA
hui sueda3d762016-12-06 16:58:23 -0800335 // The actual prediction angle is the base angle + (angle_delta * step).
Yaowu Xuc27fc142016-08-22 16:08:15 -0700336 int8_t angle_delta[2];
hui sueda3d762016-12-06 16:58:23 -0800337#if CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700338 // To-Do (huisu): this may be replaced by interp_filter
339 INTRA_FILTER intra_filter;
hui sueda3d762016-12-06 16:58:23 -0800340#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700341#endif // CONFIG_EXT_INTRA
342
343#if CONFIG_EXT_INTER
344 INTERINTRA_MODE interintra_mode;
345 // TODO(debargha): Consolidate these flags
346 int use_wedge_interintra;
347 int interintra_wedge_index;
348 int interintra_wedge_sign;
Sarah Parker6fdc8532016-11-16 17:47:13 -0800349 INTERINTER_COMPOUND_DATA interinter_compound_data;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700350#endif // CONFIG_EXT_INTER
Yue Chencb60b182016-10-13 15:18:22 -0700351 MOTION_MODE motion_mode;
Yue Chen5329a2b2017-02-28 17:33:00 +0800352#if CONFIG_MOTION_VAR
353 int overlappable_neighbors[2];
354#endif // CONFIG_MOTION_VAR
Yaowu Xuc27fc142016-08-22 16:08:15 -0700355 int_mv mv[2];
356 int_mv pred_mv[2];
357#if CONFIG_REF_MV
358 uint8_t ref_mv_idx;
359#endif
360#if CONFIG_EXT_PARTITION_TYPES
361 PARTITION_TYPE partition;
362#endif
363#if CONFIG_NEW_QUANT
364 int dq_off_index;
365 int send_dq_bit;
366#endif // CONFIG_NEW_QUANT
367 /* deringing gain *per-superblock* */
Jean-Marc Valin5f5c1322017-03-21 16:20:21 -0400368 int8_t cdef_strength;
Arild Fuldseth07441162016-08-15 15:07:52 +0200369#if CONFIG_DELTA_Q
370 int current_q_index;
371#endif
Angie Chiangd4022822016-11-02 18:30:25 -0700372#if CONFIG_RD_DEBUG
Angie Chiang9a44f5f2016-11-06 12:19:06 -0800373 RD_STATS rd_stats;
Angie Chiangd4022822016-11-02 18:30:25 -0700374 int mi_row;
375 int mi_col;
376#endif
Yue Chen69f18e12016-09-08 14:48:15 -0700377#if CONFIG_WARPED_MOTION
378 int num_proj_ref[2];
379 WarpedMotionParams wm_params[2];
380#endif // CONFIG_WARPED_MOTION
Ryan Lei9b02b0e2017-01-30 15:52:20 -0800381
382 BOUNDARY_TYPE boundary_info;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700383} MB_MODE_INFO;
384
385typedef struct MODE_INFO {
386 MB_MODE_INFO mbmi;
387 b_mode_info bmi[4];
388} MODE_INFO;
389
390static INLINE PREDICTION_MODE get_y_mode(const MODE_INFO *mi, int block) {
Jingning Hand7d20472016-12-14 11:13:48 -0800391#if CONFIG_CB4X4
392 (void)block;
393 return mi->mbmi.mode;
394#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700395 return mi->mbmi.sb_type < BLOCK_8X8 ? mi->bmi[block].as_mode : mi->mbmi.mode;
Jingning Hand7d20472016-12-14 11:13:48 -0800396#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700397}
398
399static INLINE int is_inter_block(const MB_MODE_INFO *mbmi) {
400 return mbmi->ref_frame[0] > INTRA_FRAME;
401}
402
403static INLINE int has_second_ref(const MB_MODE_INFO *mbmi) {
404 return mbmi->ref_frame[1] > INTRA_FRAME;
405}
406
Yaowu Xuf883b422016-08-30 14:01:10 -0700407PREDICTION_MODE av1_left_block_mode(const MODE_INFO *cur_mi,
408 const MODE_INFO *left_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700409
Yaowu Xuf883b422016-08-30 14:01:10 -0700410PREDICTION_MODE av1_above_block_mode(const MODE_INFO *cur_mi,
411 const MODE_INFO *above_mi, int b);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700412
Sarah Parker19234cc2017-03-10 16:43:25 -0800413#if CONFIG_GLOBAL_MOTION
414static INLINE int is_global_mv_block(const MODE_INFO *mi, int block,
415 TransformationType type) {
416 PREDICTION_MODE mode = get_y_mode(mi, block);
417#if GLOBAL_SUB8X8_USED
418 const int block_size_allowed = 1;
419#else
420 const BLOCK_SIZE bsize = mi->mbmi.sb_type;
421 const int block_size_allowed = (bsize >= BLOCK_8X8);
422#endif // GLOBAL_SUB8X8_USED
423#if CONFIG_EXT_INTER
424 return (mode == ZEROMV || mode == ZERO_ZEROMV) && type > TRANSLATION &&
425 block_size_allowed;
426#else
427 return mode == ZEROMV && type > TRANSLATION && block_size_allowed;
428#endif // CONFIG_EXT_INTER
429}
430#endif // CONFIG_GLOBAL_MOTION
431
Yaowu Xuc27fc142016-08-22 16:08:15 -0700432enum mv_precision { MV_PRECISION_Q3, MV_PRECISION_Q4 };
433
434struct buf_2d {
435 uint8_t *buf;
436 uint8_t *buf0;
437 int width;
438 int height;
439 int stride;
440};
441
442typedef struct macroblockd_plane {
443 tran_low_t *dqcoeff;
444 PLANE_TYPE plane_type;
445 int subsampling_x;
446 int subsampling_y;
447 struct buf_2d dst;
448 struct buf_2d pre[2];
449 ENTROPY_CONTEXT *above_context;
450 ENTROPY_CONTEXT *left_context;
451 int16_t seg_dequant[MAX_SEGMENTS][2];
452#if CONFIG_NEW_QUANT
clang-format67948d32016-09-07 22:40:40 -0700453 dequant_val_type_nuq seg_dequant_nuq[MAX_SEGMENTS][QUANT_PROFILES]
454 [COEF_BANDS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700455#endif
Urvang Joshib100db72016-10-12 16:28:56 -0700456#if CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700457 uint8_t *color_index_map;
Urvang Joshib100db72016-10-12 16:28:56 -0700458#endif // CONFIG_PALETTE
Yaowu Xuc27fc142016-08-22 16:08:15 -0700459
460 // number of 4x4s in current block
461 uint16_t n4_w, n4_h;
462 // log2 of n4_w, n4_h
463 uint8_t n4_wl, n4_hl;
Jingning Hanc47fe6c2016-10-21 16:40:47 -0700464 // block size in pixels
465 uint8_t width, height;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700466
467#if CONFIG_AOM_QM
468 const qm_val_t *seg_iqmatrix[MAX_SEGMENTS][2][TX_SIZES];
469#endif
470 // encoder
471 const int16_t *dequant;
472#if CONFIG_NEW_QUANT
473 const dequant_val_type_nuq *dequant_val_nuq[QUANT_PROFILES];
474#endif // CONFIG_NEW_QUANT
475#if CONFIG_AOM_QM
476 const qm_val_t *seg_qmatrix[MAX_SEGMENTS][2][TX_SIZES];
477#endif
Yushin Cho77bba8d2016-11-04 16:36:56 -0700478
Yushin Cho7a428ba2017-01-12 16:28:49 -0800479#if CONFIG_PVQ || CONFIG_DAALA_DIST
Yushin Cho77bba8d2016-11-04 16:36:56 -0700480 DECLARE_ALIGNED(16, int16_t, pred[MAX_SB_SQUARE]);
481 // PVQ: forward transformed predicted image, a reference for PVQ.
482 tran_low_t *pvq_ref_coeff;
483#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700484} MACROBLOCKD_PLANE;
485
Jingning Han3468df12016-12-05 17:53:16 -0800486#define BLOCK_OFFSET(x, i) \
487 ((x) + (i) * (1 << (tx_size_wide_log2[0] + tx_size_high_log2[0])))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700488
489typedef struct RefBuffer {
490 // TODO(dkovalev): idx is not really required and should be removed, now it
Yaowu Xuf883b422016-08-30 14:01:10 -0700491 // is used in av1_onyxd_if.c
Yaowu Xuc27fc142016-08-22 16:08:15 -0700492 int idx;
493 YV12_BUFFER_CONFIG *buf;
494 struct scale_factors sf;
495} RefBuffer;
496
Yi Luof8e87b42017-04-14 17:20:27 -0700497typedef int16_t EobThresholdMD[TX_SIZES_ALL][TX_TYPES];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700498typedef struct macroblockd {
499 struct macroblockd_plane plane[MAX_MB_PLANE];
500 uint8_t bmode_blocks_wl;
501 uint8_t bmode_blocks_hl;
502
503 FRAME_COUNTS *counts;
504 TileInfo tile;
505
506 int mi_stride;
507
508 MODE_INFO **mi;
509 MODE_INFO *left_mi;
510 MODE_INFO *above_mi;
511 MB_MODE_INFO *left_mbmi;
512 MB_MODE_INFO *above_mbmi;
513
514 int up_available;
515 int left_available;
516
Yaowu Xuf883b422016-08-30 14:01:10 -0700517 const aom_prob (*partition_probs)[PARTITION_TYPES - 1];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700518
519 /* Distance of MB away from frame edges */
520 int mb_to_left_edge;
521 int mb_to_right_edge;
522 int mb_to_top_edge;
523 int mb_to_bottom_edge;
524
525 FRAME_CONTEXT *fc;
526
527 /* pointers to reference frames */
Urvang Joshi52648442016-10-13 17:27:51 -0700528 const RefBuffer *block_refs[2];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700529
530 /* pointer to current frame */
531 const YV12_BUFFER_CONFIG *cur_buf;
532
533 ENTROPY_CONTEXT *above_context[MAX_MB_PLANE];
534 ENTROPY_CONTEXT left_context[MAX_MB_PLANE][2 * MAX_MIB_SIZE];
535
536 PARTITION_CONTEXT *above_seg_context;
537 PARTITION_CONTEXT left_seg_context[MAX_MIB_SIZE];
538
539#if CONFIG_VAR_TX
540 TXFM_CONTEXT *above_txfm_context;
541 TXFM_CONTEXT *left_txfm_context;
542 TXFM_CONTEXT left_txfm_context_buffer[MAX_MIB_SIZE];
543
544 TX_SIZE max_tx_size;
545#if CONFIG_SUPERTX
546 TX_SIZE supertx_size;
547#endif
548#endif
549
Jingning Hanff6ee6a2016-12-07 09:55:21 -0800550 // block dimension in the unit of mode_info.
Yaowu Xuc27fc142016-08-22 16:08:15 -0700551 uint8_t n8_w, n8_h;
552
553#if CONFIG_REF_MV
554 uint8_t ref_mv_count[MODE_CTX_REF_FRAMES];
555 CANDIDATE_MV ref_mv_stack[MODE_CTX_REF_FRAMES][MAX_REF_MV_STACK_SIZE];
556 uint8_t is_sec_rect;
557#endif
558
Yushin Cho77bba8d2016-11-04 16:36:56 -0700559#if CONFIG_PVQ
560 daala_dec_ctx daala_dec;
561#endif
Thomas Daviesf77d4ad2017-01-10 18:55:42 +0000562#if CONFIG_EC_ADAPT
563 FRAME_CONTEXT *tile_ctx;
564#endif
Sebastien Alaiwan71e87842017-04-12 16:03:28 +0200565#if CONFIG_HIGHBITDEPTH
Yaowu Xuc27fc142016-08-22 16:08:15 -0700566 /* Bit depth: 8, 10, 12 */
567 int bd;
568#endif
569
Debargha Mukherjee3c42c092016-09-29 09:17:36 -0700570 int qindex[MAX_SEGMENTS];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700571 int lossless[MAX_SEGMENTS];
572 int corrupted;
573
Yaowu Xuf883b422016-08-30 14:01:10 -0700574 struct aom_internal_error_info *error_info;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700575#if CONFIG_GLOBAL_MOTION
David Barkercf3d0b02016-11-10 10:14:49 +0000576 WarpedMotionParams *global_motion;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700577#endif // CONFIG_GLOBAL_MOTION
Arild Fuldseth07441162016-08-15 15:07:52 +0200578#if CONFIG_DELTA_Q
579 int prev_qindex;
580 int delta_qindex;
581 int current_qindex;
582#endif
Yi Luof8e87b42017-04-14 17:20:27 -0700583#if CONFIG_ADAPT_SCAN
584 const EobThresholdMD *eob_threshold_md;
585#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700586} MACROBLOCKD;
587
588static INLINE BLOCK_SIZE get_subsize(BLOCK_SIZE bsize,
589 PARTITION_TYPE partition) {
590 if (partition == PARTITION_INVALID)
Urvang Joshicb586f32016-09-20 11:36:33 -0700591 return BLOCK_INVALID;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700592 else
593 return subsize_lookup[partition][bsize];
594}
595
596static const TX_TYPE intra_mode_to_tx_type_context[INTRA_MODES] = {
597 DCT_DCT, // DC
598 ADST_DCT, // V
599 DCT_ADST, // H
600 DCT_DCT, // D45
601 ADST_ADST, // D135
602 ADST_DCT, // D117
603 DCT_ADST, // D153
604 DCT_ADST, // D207
605 ADST_DCT, // D63
Urvang Joshi6be4a542016-11-03 15:24:05 -0700606#if CONFIG_ALT_INTRA
607 ADST_ADST, // SMOOTH
608#endif // CONFIG_ALT_INTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -0700609 ADST_ADST, // TM
610};
611
612#if CONFIG_SUPERTX
613static INLINE int supertx_enabled(const MB_MODE_INFO *mbmi) {
Jingning Han93531242016-12-20 11:54:36 -0800614 TX_SIZE max_tx_size = txsize_sqr_map[mbmi->tx_size];
615 return tx_size_wide[max_tx_size] >
616 AOMMIN(block_size_wide[mbmi->sb_type], block_size_high[mbmi->sb_type]);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700617}
618#endif // CONFIG_SUPERTX
619
Jingning Hanb83e64b2017-03-01 14:52:04 -0800620#define USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4 1
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800621
Sarah Parker076437f2017-03-14 17:39:53 -0700622#if CONFIG_RECT_TX
Sarah Parker076437f2017-03-14 17:39:53 -0700623static INLINE int is_rect_tx(TX_SIZE tx_size) { return tx_size >= TX_SIZES; }
624#endif // CONFIG_RECT_TX
625
Jingning Hanb83e64b2017-03-01 14:52:04 -0800626#if CONFIG_EXT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700627#define ALLOW_INTRA_EXT_TX 1
Yaowu Xuc27fc142016-08-22 16:08:15 -0700628
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800629typedef enum {
630 // DCT only
631 EXT_TX_SET_DCTONLY = 0,
632 // DCT + Identity only
633 EXT_TX_SET_DCT_IDTX = 1,
634 // Discrete Trig transforms w/o flip (4) + Identity (1)
635 EXT_TX_SET_DTT4_IDTX = 2,
636 // Discrete Trig transforms w/o flip (4) + Identity (1) + 1D Hor/vert DCT (2)
637 EXT_TX_SET_DTT4_IDTX_1DDCT = 3,
638 // Discrete Trig transforms w/ flip (9) + Identity (1) + 1D Hor/Ver DCT (2)
639 EXT_TX_SET_DTT9_IDTX_1DDCT = 4,
640 // Discrete Trig transforms w/ flip (9) + Identity (1) + 1D Hor/Ver (6)
641 EXT_TX_SET_ALL16 = 5,
642 EXT_TX_SET_TYPES
643} TxSetType;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700644
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800645// Number of transform types in each set type
646static const int num_ext_tx_set[EXT_TX_SET_TYPES] = { 1, 2, 5, 7, 12, 16 };
647
648// Maps intra set index to the set type
649static const int ext_tx_set_type_intra[EXT_TX_SETS_INTRA] = {
650 EXT_TX_SET_DCTONLY, EXT_TX_SET_DTT4_IDTX_1DDCT, EXT_TX_SET_DTT4_IDTX
651};
652
653// Maps inter set index to the set type
654static const int ext_tx_set_type_inter[EXT_TX_SETS_INTER] = {
655 EXT_TX_SET_DCTONLY, EXT_TX_SET_ALL16, EXT_TX_SET_DTT9_IDTX_1DDCT,
656 EXT_TX_SET_DCT_IDTX
657};
658
659// Maps set types above to the indices used for intra
660static const int ext_tx_set_index_intra[EXT_TX_SET_TYPES] = { 0, -1, 2,
661 1, -1, -1 };
662
663// Maps set types above to the indices used for inter
664static const int ext_tx_set_index_inter[EXT_TX_SET_TYPES] = {
665 0, 3, -1, -1, 2, 1
666};
667
668static INLINE TxSetType get_ext_tx_set_type(TX_SIZE tx_size, BLOCK_SIZE bs,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800669 int is_inter, int use_reduced_set) {
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800670 const TX_SIZE tx_size2 = txsize_sqr_up_map[tx_size];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700671 tx_size = txsize_sqr_map[tx_size];
Debargha Mukherjee094c9432017-02-22 10:31:25 -0800672#if CONFIG_CB4X4 && USE_TXTYPE_SEARCH_FOR_SUB8X8_IN_CB4X4
Jingning Han1a00cff2016-12-28 14:53:14 -0800673 (void)bs;
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800674 if (tx_size > TX_32X32) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -0800675#else
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800676 if (tx_size > TX_32X32 || bs < BLOCK_8X8) return EXT_TX_SET_DCTONLY;
Jingning Han1a00cff2016-12-28 14:53:14 -0800677#endif
Sarah Parker5effe3f2017-02-23 12:49:10 -0800678 if (use_reduced_set)
679 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DTT4_IDTX;
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800680 if (tx_size2 == TX_32X32)
681 return is_inter ? EXT_TX_SET_DCT_IDTX : EXT_TX_SET_DCTONLY;
682 if (is_inter)
683 return (tx_size == TX_16X16 ? EXT_TX_SET_DTT9_IDTX_1DDCT
684 : EXT_TX_SET_ALL16);
685 else
686 return (tx_size == TX_16X16 ? EXT_TX_SET_DTT4_IDTX
687 : EXT_TX_SET_DTT4_IDTX_1DDCT);
688}
689
690static INLINE int get_ext_tx_set(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800691 int use_reduced_set) {
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800692 const TxSetType set_type =
Sarah Parker5effe3f2017-02-23 12:49:10 -0800693 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800694 return is_inter ? ext_tx_set_index_inter[set_type]
695 : ext_tx_set_index_intra[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700696}
697
clang-format55ce9e02017-02-15 22:27:12 -0800698static const int use_intra_ext_tx_for_txsize[EXT_TX_SETS_INTRA][EXT_TX_SIZES] =
699 {
Jingning Han1a00cff2016-12-28 14:53:14 -0800700#if CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800701 { 1, 1, 1, 1, 1 }, // unused
702 { 0, 1, 1, 0, 0 },
703 { 0, 0, 0, 1, 0 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800704#else
clang-format55ce9e02017-02-15 22:27:12 -0800705 { 1, 1, 1, 1 }, // unused
706 { 1, 1, 0, 0 },
707 { 0, 0, 1, 0 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800708#endif // CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800709 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700710
clang-format55ce9e02017-02-15 22:27:12 -0800711static const int use_inter_ext_tx_for_txsize[EXT_TX_SETS_INTER][EXT_TX_SIZES] =
712 {
Jingning Han1a00cff2016-12-28 14:53:14 -0800713#if CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800714 { 1, 1, 1, 1, 1 }, // unused
715 { 0, 1, 1, 0, 0 },
716 { 0, 0, 0, 1, 0 },
717 { 0, 0, 0, 0, 1 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800718#else
clang-format55ce9e02017-02-15 22:27:12 -0800719 { 1, 1, 1, 1 }, // unused
720 { 1, 1, 0, 0 },
721 { 0, 0, 1, 0 },
722 { 0, 0, 0, 1 },
Jingning Han1a00cff2016-12-28 14:53:14 -0800723#endif // CONFIG_CB4X4
clang-format55ce9e02017-02-15 22:27:12 -0800724 };
Yaowu Xuc27fc142016-08-22 16:08:15 -0700725
726// Transform types used in each intra set
727static const int ext_tx_used_intra[EXT_TX_SETS_INTRA][TX_TYPES] = {
728 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
729 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0 },
730 { 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
731};
732
Thomas Daviesb1bedf52017-03-17 14:03:28 +0000733// Numbers of transform types used in each intra set
734static const int ext_tx_cnt_intra[EXT_TX_SETS_INTRA] = { 1, 7, 5 };
735
Yaowu Xuc27fc142016-08-22 16:08:15 -0700736// Transform types used in each inter set
737static const int ext_tx_used_inter[EXT_TX_SETS_INTER][TX_TYPES] = {
738 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
739 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
740 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
741 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 },
742};
743
Thomas Daviesb1bedf52017-03-17 14:03:28 +0000744// Numbers of transform types used in each inter set
745static const int ext_tx_cnt_inter[EXT_TX_SETS_INTER] = { 1, 16, 12, 2 };
746
Yaowu Xuc27fc142016-08-22 16:08:15 -0700747// 1D Transforms used in inter set, this needs to be changed if
748// ext_tx_used_inter is changed
749static const int ext_tx_used_inter_1D[EXT_TX_SETS_INTER][TX_TYPES_1D] = {
750 { 1, 0, 0, 0 }, { 1, 1, 1, 1 }, { 1, 1, 1, 1 }, { 1, 0, 0, 1 },
751};
752
Sarah Parkere68a3e42017-02-16 14:03:24 -0800753static INLINE int get_ext_tx_types(TX_SIZE tx_size, BLOCK_SIZE bs, int is_inter,
Sarah Parker5effe3f2017-02-23 12:49:10 -0800754 int use_reduced_set) {
755 const int set_type =
756 get_ext_tx_set_type(tx_size, bs, is_inter, use_reduced_set);
Debargha Mukherjee08542b92017-02-21 01:08:14 -0800757 return num_ext_tx_set[set_type];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700758}
759
760#if CONFIG_RECT_TX
761static INLINE int is_rect_tx_allowed_bsize(BLOCK_SIZE bsize) {
762 static const char LUT[BLOCK_SIZES] = {
Jingning Hanf4e097b2017-01-20 09:23:58 -0800763#if CONFIG_CB4X4
764 0, // BLOCK_2X2
765 0, // BLOCK_2X4
766 0, // BLOCK_4X2
767#endif
Yaowu Xuc27fc142016-08-22 16:08:15 -0700768 0, // BLOCK_4X4
769 1, // BLOCK_4X8
770 1, // BLOCK_8X4
771 0, // BLOCK_8X8
772 1, // BLOCK_8X16
773 1, // BLOCK_16X8
774 0, // BLOCK_16X16
775 1, // BLOCK_16X32
776 1, // BLOCK_32X16
777 0, // BLOCK_32X32
778 0, // BLOCK_32X64
779 0, // BLOCK_64X32
780 0, // BLOCK_64X64
781#if CONFIG_EXT_PARTITION
782 0, // BLOCK_64X128
783 0, // BLOCK_128X64
784 0, // BLOCK_128X128
785#endif // CONFIG_EXT_PARTITION
786 };
787
788 return LUT[bsize];
789}
790
Yue Chen49587a72016-09-28 17:09:47 -0700791static INLINE int is_rect_tx_allowed(const MACROBLOCKD *xd,
792 const MB_MODE_INFO *mbmi) {
Urvang Joshifeb925f2016-12-05 10:37:29 -0800793 return is_rect_tx_allowed_bsize(mbmi->sb_type) &&
Yue Chen49587a72016-09-28 17:09:47 -0700794 !xd->lossless[mbmi->segment_id];
Yaowu Xuc27fc142016-08-22 16:08:15 -0700795}
Yaowu Xuc27fc142016-08-22 16:08:15 -0700796#endif // CONFIG_RECT_TX
797#endif // CONFIG_EXT_TX
798
799static INLINE TX_SIZE tx_size_from_tx_mode(BLOCK_SIZE bsize, TX_MODE tx_mode,
800 int is_inter) {
801 const TX_SIZE largest_tx_size = tx_mode_to_biggest_tx_size[tx_mode];
Debargha Mukherjee428bbb22017-03-17 07:30:24 -0700802#if (CONFIG_VAR_TX || CONFIG_EXT_TX) && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -0800803 const TX_SIZE max_rect_tx_size = max_txsize_rect_lookup[bsize];
Jingning Han70e5f3f2016-11-09 17:03:07 -0800804#else
Yaowu Xuc27fc142016-08-22 16:08:15 -0700805 const TX_SIZE max_tx_size = max_txsize_lookup[bsize];
Debargha Mukherjee428bbb22017-03-17 07:30:24 -0700806#endif // (CONFIG_VAR_TX || CONFIG_EXT_TX) && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -0800807 (void)is_inter;
Debargha Mukherjee428bbb22017-03-17 07:30:24 -0700808#if CONFIG_VAR_TX && CONFIG_RECT_TX
Urvang Joshifeb925f2016-12-05 10:37:29 -0800809#if CONFIG_CB4X4
810 if (bsize == BLOCK_4X4)
811 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
812#else
813 if (bsize < BLOCK_8X8)
814 return AOMMIN(max_txsize_lookup[bsize], largest_tx_size);
Jingning Han70e5f3f2016-11-09 17:03:07 -0800815#endif
Urvang Joshifeb925f2016-12-05 10:37:29 -0800816 if (txsize_sqr_map[max_rect_tx_size] <= largest_tx_size)
817 return max_rect_tx_size;
818 else
819 return largest_tx_size;
820#elif CONFIG_EXT_TX && CONFIG_RECT_TX
821 if (txsize_sqr_up_map[max_rect_tx_size] <= largest_tx_size) {
822 return max_rect_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700823 } else {
Urvang Joshifeb925f2016-12-05 10:37:29 -0800824 return largest_tx_size;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700825 }
826#else
Yaowu Xuf883b422016-08-30 14:01:10 -0700827 return AOMMIN(max_tx_size, largest_tx_size);
Debargha Mukherjee428bbb22017-03-17 07:30:24 -0700828#endif // CONFIG_VAR_TX && CONFIG_RECT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700829}
830
hui su5db97432016-10-14 16:10:14 -0700831#if CONFIG_EXT_INTRA
hui su45dc5972016-12-08 17:42:50 -0800832#define MAX_ANGLE_DELTA_UV 2
833#define ANGLE_STEP_UV 4
834
835static const uint8_t av1_angle_step_y[TX_SIZES] = {
836 0, 4, 3, 3,
837};
838static const uint8_t av1_max_angle_delta_y[TX_SIZES] = {
839 0, 2, 3, 3,
840};
841
hui su5db97432016-10-14 16:10:14 -0700842extern const int16_t dr_intra_derivative[90];
843static const uint8_t mode_to_angle_map[INTRA_MODES] = {
844 0, 90, 180, 45, 135, 111, 157, 203, 67, 0,
845};
846
hui su45dc5972016-12-08 17:42:50 -0800847static INLINE int av1_get_angle_step(BLOCK_SIZE sb_type, int plane) {
848 const TX_SIZE max_tx_size = max_txsize_lookup[sb_type];
849 return plane ? ANGLE_STEP_UV : av1_angle_step_y[max_tx_size];
850}
851
852static INLINE int av1_get_max_angle_delta(BLOCK_SIZE sb_type, int plane) {
853 const TX_SIZE max_tx_size = max_txsize_lookup[sb_type];
854 return plane ? MAX_ANGLE_DELTA_UV : av1_max_angle_delta_y[max_tx_size];
855}
856
hui sueda3d762016-12-06 16:58:23 -0800857#if CONFIG_INTRA_INTERP
hui su5db97432016-10-14 16:10:14 -0700858// Returns whether filter selection is needed for a given
859// intra prediction angle.
Yaowu Xuf883b422016-08-30 14:01:10 -0700860int av1_is_intra_filter_switchable(int angle);
hui sueda3d762016-12-06 16:58:23 -0800861#endif // CONFIG_INTRA_INTERP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700862#endif // CONFIG_EXT_INTRA
863
864#if CONFIG_EXT_TILE
865#define FIXED_TX_TYPE 1
866#else
867#define FIXED_TX_TYPE 0
868#endif
869
Angie Chiang752ccce2017-04-09 13:41:13 -0700870// Converts block_index for given transform size to index of the block in raster
871// order.
872static INLINE int av1_block_index_to_raster_order(TX_SIZE tx_size,
873 int block_idx) {
874 // For transform size 4x8, the possible block_idx values are 0 & 2, because
875 // block_idx values are incremented in steps of size 'tx_width_unit x
876 // tx_height_unit'. But, for this transform size, block_idx = 2 corresponds to
877 // block number 1 in raster order, inside an 8x8 MI block.
878 // For any other transform size, the two indices are equivalent.
879 return (tx_size == TX_4X8 && block_idx == 2) ? 1 : block_idx;
880}
881
882// Inverse of above function.
883// Note: only implemented for transform sizes 4x4, 4x8 and 8x4 right now.
884static INLINE int av1_raster_order_to_block_index(TX_SIZE tx_size,
885 int raster_order) {
886 assert(tx_size == TX_4X4 || tx_size == TX_4X8 || tx_size == TX_8X4);
887 // We ensure that block indices are 0 & 2 if tx size is 4x8 or 8x4.
888 return (tx_size == TX_4X4) ? raster_order : (raster_order > 0) ? 2 : 0;
889}
890
Yaowu Xuc27fc142016-08-22 16:08:15 -0700891static INLINE TX_TYPE get_default_tx_type(PLANE_TYPE plane_type,
892 const MACROBLOCKD *xd, int block_idx,
893 TX_SIZE tx_size) {
894 const MB_MODE_INFO *const mbmi = &xd->mi[0]->mbmi;
895
896 if (is_inter_block(mbmi) || plane_type != PLANE_TYPE_Y ||
897 xd->lossless[mbmi->segment_id] || tx_size >= TX_32X32)
898 return DCT_DCT;
899
900 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
901 ? get_y_mode(xd->mi[0], block_idx)
902 : mbmi->uv_mode];
903}
904
905static INLINE TX_TYPE get_tx_type(PLANE_TYPE plane_type, const MACROBLOCKD *xd,
Angie Chiang752ccce2017-04-09 13:41:13 -0700906 int block, TX_SIZE tx_size) {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700907 const MODE_INFO *const mi = xd->mi[0];
908 const MB_MODE_INFO *const mbmi = &mi->mbmi;
Angie Chiang18ad8942017-04-11 12:37:07 -0700909#if !CONFIG_LV_MAP
Angie Chiangc2ebfbf2017-04-15 13:56:58 -0700910 const int block_raster_idx = av1_block_index_to_raster_order(tx_size, block);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700911 if (FIXED_TX_TYPE)
Angie Chiang752ccce2017-04-09 13:41:13 -0700912 return get_default_tx_type(plane_type, xd, block_raster_idx, tx_size);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700913
Yaowu Xuc27fc142016-08-22 16:08:15 -0700914#if CONFIG_EXT_TX
Yaowu Xuc27fc142016-08-22 16:08:15 -0700915 if (xd->lossless[mbmi->segment_id] || txsize_sqr_map[tx_size] > TX_32X32 ||
916 (txsize_sqr_map[tx_size] >= TX_32X32 && !is_inter_block(mbmi)))
Yaowu Xuc27fc142016-08-22 16:08:15 -0700917 return DCT_DCT;
Jingning Han8260d8b2016-12-28 13:48:43 -0800918 if (mbmi->sb_type >= BLOCK_8X8 || CONFIG_CB4X4) {
Yaowu Xuc27fc142016-08-22 16:08:15 -0700919 if (plane_type == PLANE_TYPE_Y) {
920#if !ALLOW_INTRA_EXT_TX
921 if (is_inter_block(mbmi))
922#endif // ALLOW_INTRA_EXT_TX
923 return mbmi->tx_type;
924 }
Jingning Han1a00cff2016-12-28 14:53:14 -0800925
926 if (is_inter_block(mbmi)) {
927// UV Inter only
928#if CONFIG_CB4X4
929 if (tx_size < TX_4X4) return DCT_DCT;
930#endif
Debargha Mukherjee5a488a62016-11-22 22:24:10 -0800931 return (mbmi->tx_type == IDTX && txsize_sqr_map[tx_size] >= TX_32X32)
Yaowu Xuc27fc142016-08-22 16:08:15 -0700932 ? DCT_DCT
933 : mbmi->tx_type;
Jingning Han1a00cff2016-12-28 14:53:14 -0800934 }
Yaowu Xuc27fc142016-08-22 16:08:15 -0700935 }
936
Jingning Han8260d8b2016-12-28 13:48:43 -0800937#if CONFIG_CB4X4
Jingning Han1a00cff2016-12-28 14:53:14 -0800938 if (tx_size < TX_4X4)
939 return DCT_DCT;
940 else
941 return intra_mode_to_tx_type_context[mbmi->uv_mode];
Jingning Han8260d8b2016-12-28 13:48:43 -0800942#endif
943
Yaowu Xuc27fc142016-08-22 16:08:15 -0700944 // Sub8x8-Inter/Intra OR UV-Intra
945 if (is_inter_block(mbmi)) // Sub8x8-Inter
946 return DCT_DCT;
947 else // Sub8x8 Intra OR UV-Intra
948 return intra_mode_to_tx_type_context[plane_type == PLANE_TYPE_Y
Angie Chiang752ccce2017-04-09 13:41:13 -0700949 ? get_y_mode(mi, block_raster_idx)
Yaowu Xuc27fc142016-08-22 16:08:15 -0700950 : mbmi->uv_mode];
951#else // CONFIG_EXT_TX
Angie Chiang752ccce2017-04-09 13:41:13 -0700952 (void)block;
Yaowu Xuc27fc142016-08-22 16:08:15 -0700953 if (plane_type != PLANE_TYPE_Y || xd->lossless[mbmi->segment_id] ||
954 txsize_sqr_map[tx_size] >= TX_32X32)
955 return DCT_DCT;
956 return mbmi->tx_type;
957#endif // CONFIG_EXT_TX
Angie Chiang2b58a622017-04-10 13:45:13 -0700958#else // !CONFIG_LV_MAP
959 (void)tx_size;
Angie Chiang18ad8942017-04-11 12:37:07 -0700960 TX_TYPE tx_type;
Angie Chiang2b58a622017-04-10 13:45:13 -0700961 if (plane_type != PLANE_TYPE_Y || xd->lossless[mbmi->segment_id] ||
Angie Chiang18ad8942017-04-11 12:37:07 -0700962 mbmi->tx_size >= TX_32X32) {
963 tx_type = DCT_DCT;
Angie Chiang18ad8942017-04-11 12:37:07 -0700964 } else {
965 tx_type = mbmi->txk_type[block];
Angie Chiang2b58a622017-04-10 13:45:13 -0700966 }
Angie Chiang18ad8942017-04-11 12:37:07 -0700967 assert(tx_type >= DCT_DCT && tx_type < TX_TYPES);
968 return tx_type;
Angie Chiang2b58a622017-04-10 13:45:13 -0700969#endif // !CONFIG_LV_MAP
Yaowu Xuc27fc142016-08-22 16:08:15 -0700970}
971
Yaowu Xuf883b422016-08-30 14:01:10 -0700972void av1_setup_block_planes(MACROBLOCKD *xd, int ss_x, int ss_y);
Yaowu Xuc27fc142016-08-22 16:08:15 -0700973
Jingning Han4e1737a2016-10-25 16:05:02 -0700974static INLINE int tx_size_to_depth(const TX_SIZE tx_size) {
975 return (int)(tx_size - TX_4X4);
976}
977
978static INLINE TX_SIZE depth_to_tx_size(const int depth) {
979 return (TX_SIZE)(depth + TX_4X4);
980}
981
Yaowu Xuc27fc142016-08-22 16:08:15 -0700982static INLINE TX_SIZE get_uv_tx_size(const MB_MODE_INFO *mbmi,
983 const struct macroblockd_plane *pd) {
Debargha Mukherjee2f123402016-08-30 17:43:38 -0700984 TX_SIZE uv_txsize;
Jingning Han93531242016-12-20 11:54:36 -0800985#if CONFIG_CB4X4
986 assert(mbmi->tx_size > TX_2X2);
987#endif
988
Yaowu Xuc27fc142016-08-22 16:08:15 -0700989#if CONFIG_SUPERTX
990 if (supertx_enabled(mbmi))
991 return uvsupertx_size_lookup[txsize_sqr_map[mbmi->tx_size]]
992 [pd->subsampling_x][pd->subsampling_y];
993#endif // CONFIG_SUPERTX
Jingning Hancabd9892016-12-01 12:28:42 -0800994
Debargha Mukherjee2f123402016-08-30 17:43:38 -0700995 uv_txsize = uv_txsize_lookup[mbmi->sb_type][mbmi->tx_size][pd->subsampling_x]
996 [pd->subsampling_y];
Jingning Han31b6a4f2017-02-23 11:05:53 -0800997#if CONFIG_CB4X4 && !CONFIG_CHROMA_2X2
Jingning Han18c53c82017-02-17 14:49:57 -0800998 uv_txsize = AOMMAX(uv_txsize, TX_4X4);
999#endif
Debargha Mukherjee2f123402016-08-30 17:43:38 -07001000 assert(uv_txsize != TX_INVALID);
1001 return uv_txsize;
Yaowu Xuc27fc142016-08-22 16:08:15 -07001002}
1003
Angie Chiang7fcfee42017-02-24 15:51:03 -08001004static INLINE TX_SIZE get_tx_size(int plane, const MACROBLOCKD *xd) {
Angie Chiang80b82262017-02-24 11:39:47 -08001005 const MB_MODE_INFO *mbmi = &xd->mi[0]->mbmi;
1006 const MACROBLOCKD_PLANE *pd = &xd->plane[plane];
1007 const TX_SIZE tx_size = plane ? get_uv_tx_size(mbmi, pd) : mbmi->tx_size;
Angie Chiang80b82262017-02-24 11:39:47 -08001008 return tx_size;
1009}
1010
Yaowu Xuc27fc142016-08-22 16:08:15 -07001011static INLINE BLOCK_SIZE
1012get_plane_block_size(BLOCK_SIZE bsize, const struct macroblockd_plane *pd) {
1013 return ss_size_lookup[bsize][pd->subsampling_x][pd->subsampling_y];
1014}
1015
1016static INLINE void reset_skip_context(MACROBLOCKD *xd, BLOCK_SIZE bsize) {
1017 int i;
1018 for (i = 0; i < MAX_MB_PLANE; i++) {
1019 struct macroblockd_plane *const pd = &xd->plane[i];
1020 const BLOCK_SIZE plane_bsize = get_plane_block_size(bsize, pd);
Jingning Hanb49004d2016-12-05 09:37:29 -08001021 const int txs_wide = block_size_wide[plane_bsize] >> tx_size_wide_log2[0];
1022 const int txs_high = block_size_high[plane_bsize] >> tx_size_high_log2[0];
1023 memset(pd->above_context, 0, sizeof(ENTROPY_CONTEXT) * txs_wide);
1024 memset(pd->left_context, 0, sizeof(ENTROPY_CONTEXT) * txs_high);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001025 }
1026}
1027
1028typedef void (*foreach_transformed_block_visitor)(int plane, int block,
1029 int blk_row, int blk_col,
1030 BLOCK_SIZE plane_bsize,
1031 TX_SIZE tx_size, void *arg);
1032
Yaowu Xuf883b422016-08-30 14:01:10 -07001033void av1_foreach_transformed_block_in_plane(
Yaowu Xuc27fc142016-08-22 16:08:15 -07001034 const MACROBLOCKD *const xd, BLOCK_SIZE bsize, int plane,
1035 foreach_transformed_block_visitor visit, void *arg);
1036
Angie Chiang0397eda2017-03-15 16:57:14 -07001037#if CONFIG_LV_MAP
1038void av1_foreach_transformed_block(const MACROBLOCKD *const xd,
Jingning Han94652b82017-04-04 09:45:02 -07001039 BLOCK_SIZE bsize, int mi_row, int mi_col,
Angie Chiang0397eda2017-03-15 16:57:14 -07001040 foreach_transformed_block_visitor visit,
1041 void *arg);
1042#endif
1043
Yushin Cho7a428ba2017-01-12 16:28:49 -08001044#if CONFIG_DAALA_DIST
1045void av1_foreach_8x8_transformed_block_in_plane(
1046 const MACROBLOCKD *const xd, BLOCK_SIZE bsize, int plane,
1047 foreach_transformed_block_visitor visit,
1048 foreach_transformed_block_visitor mi_visit, void *arg);
1049#endif
1050
iole moccagattaf25a4cf2016-11-11 23:57:57 -08001051#if CONFIG_COEF_INTERLEAVE
1052static INLINE int get_max_4x4_size(int num_4x4, int mb_to_edge,
1053 int subsampling) {
1054 return num_4x4 + (mb_to_edge >= 0 ? 0 : mb_to_edge >> (5 + subsampling));
1055}
1056
1057void av1_foreach_transformed_block_interleave(
1058 const MACROBLOCKD *const xd, BLOCK_SIZE bsize,
1059 foreach_transformed_block_visitor visit, void *arg);
1060#endif
1061
Yaowu Xuf883b422016-08-30 14:01:10 -07001062void av1_set_contexts(const MACROBLOCKD *xd, struct macroblockd_plane *pd,
Jingning Haneee43152016-12-05 09:58:45 -08001063 int plane, TX_SIZE tx_size, int has_eob, int aoff,
1064 int loff);
Yaowu Xuc27fc142016-08-22 16:08:15 -07001065
1066#if CONFIG_EXT_INTER
1067static INLINE int is_interintra_allowed_bsize(const BLOCK_SIZE bsize) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001068#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001069 // TODO(debargha): Should this be bsize < BLOCK_LARGEST?
1070 return (bsize >= BLOCK_8X8) && (bsize < BLOCK_64X64);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001071#else
1072 (void)bsize;
1073 return 0;
1074#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001075}
1076
1077static INLINE int is_interintra_allowed_mode(const PREDICTION_MODE mode) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001078#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001079 return (mode >= NEARESTMV) && (mode <= NEWMV);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001080#else
1081 (void)mode;
1082 return 0;
1083#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001084}
1085
1086static INLINE int is_interintra_allowed_ref(const MV_REFERENCE_FRAME rf[2]) {
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001087#if CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001088 return (rf[0] > INTRA_FRAME) && (rf[1] <= INTRA_FRAME);
Debargha Mukherjee37f6fe62017-02-10 21:44:13 -08001089#else
1090 (void)rf;
1091 return 0;
1092#endif // CONFIG_INTERINTRA
Yaowu Xuc27fc142016-08-22 16:08:15 -07001093}
1094
1095static INLINE int is_interintra_allowed(const MB_MODE_INFO *mbmi) {
1096 return is_interintra_allowed_bsize(mbmi->sb_type) &&
1097 is_interintra_allowed_mode(mbmi->mode) &&
1098 is_interintra_allowed_ref(mbmi->ref_frame);
1099}
1100
1101static INLINE int is_interintra_allowed_bsize_group(const int group) {
1102 int i;
1103 for (i = 0; i < BLOCK_SIZES; i++) {
Urvang Joshicb586f32016-09-20 11:36:33 -07001104 if (size_group_lookup[i] == group &&
1105 is_interintra_allowed_bsize((BLOCK_SIZE)i)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001106 return 1;
Urvang Joshicb586f32016-09-20 11:36:33 -07001107 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001108 }
1109 return 0;
1110}
1111
1112static INLINE int is_interintra_pred(const MB_MODE_INFO *mbmi) {
1113 return (mbmi->ref_frame[1] == INTRA_FRAME) && is_interintra_allowed(mbmi);
1114}
1115#endif // CONFIG_EXT_INTER
1116
Yue Chencb60b182016-10-13 15:18:22 -07001117#if CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
1118static INLINE int is_motion_variation_allowed_bsize(BLOCK_SIZE bsize) {
1119 return (bsize >= BLOCK_8X8);
1120}
1121
Yue Chen8636da62017-04-03 01:23:44 -07001122static INLINE int is_motion_variation_allowed_compound(
1123 const MB_MODE_INFO *mbmi) {
1124 if (!has_second_ref(mbmi))
1125 return 1;
1126 else
1127 return 0;
1128}
1129
Yue Chen5329a2b2017-02-28 17:33:00 +08001130#if CONFIG_MOTION_VAR
Yue Chen1bd42be2017-03-15 18:07:04 -07001131// input: log2 of length, 0(4), 1(8), ...
1132static const int max_neighbor_obmc[6] = { 0, 1, 2, 3, 4, 4 };
1133
Yue Chen5329a2b2017-02-28 17:33:00 +08001134static INLINE int check_num_overlappable_neighbors(const MB_MODE_INFO *mbmi) {
Yue Chen1bd42be2017-03-15 18:07:04 -07001135 return !(mbmi->overlappable_neighbors[0] == 0 &&
1136 mbmi->overlappable_neighbors[1] == 0);
Yue Chen5329a2b2017-02-28 17:33:00 +08001137}
1138#endif
1139
Sarah Parker19234cc2017-03-10 16:43:25 -08001140static INLINE MOTION_MODE motion_mode_allowed(
1141#if CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1142 int block, const WarpedMotionParams *gm_params,
1143#endif // CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1144 const MODE_INFO *mi) {
1145 const MB_MODE_INFO *mbmi = &mi->mbmi;
1146#if CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1147 const TransformationType gm_type = gm_params[mbmi->ref_frame[0]].wmtype;
1148 if (is_global_mv_block(mi, block, gm_type)) return SIMPLE_TRANSLATION;
1149#endif // CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
Yaowu Xuc27fc142016-08-22 16:08:15 -07001150#if CONFIG_EXT_INTER
Yue Chen69f18e12016-09-08 14:48:15 -07001151 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
Yue Chen8636da62017-04-03 01:23:44 -07001152 is_inter_mode(mbmi->mode) && mbmi->ref_frame[1] != INTRA_FRAME &&
1153 is_motion_variation_allowed_compound(mbmi)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001154#else
Yue Chen69f18e12016-09-08 14:48:15 -07001155 if (is_motion_variation_allowed_bsize(mbmi->sb_type) &&
Yue Chen8636da62017-04-03 01:23:44 -07001156 is_inter_mode(mbmi->mode) && is_motion_variation_allowed_compound(mbmi)) {
Yaowu Xuc27fc142016-08-22 16:08:15 -07001157#endif // CONFIG_EXT_INTER
Yue Chen5329a2b2017-02-28 17:33:00 +08001158#if CONFIG_MOTION_VAR
1159 if (!check_num_overlappable_neighbors(mbmi)) return SIMPLE_TRANSLATION;
1160#endif
Yue Chen69f18e12016-09-08 14:48:15 -07001161#if CONFIG_WARPED_MOTION
Yue Chen5558e5d2017-03-31 12:24:42 -07001162 if (!has_second_ref(mbmi) && mbmi->num_proj_ref[0] >= 1)
Yue Chen69f18e12016-09-08 14:48:15 -07001163 return WARPED_CAUSAL;
1164 else
1165#endif // CONFIG_WARPED_MOTION
1166#if CONFIG_MOTION_VAR
1167 return OBMC_CAUSAL;
1168#else
1169 return SIMPLE_TRANSLATION;
1170#endif // CONFIG_MOTION_VAR
1171 } else {
1172 return SIMPLE_TRANSLATION;
1173 }
Yaowu Xuc27fc142016-08-22 16:08:15 -07001174}
1175
Sarah Parker19234cc2017-03-10 16:43:25 -08001176static INLINE void assert_motion_mode_valid(MOTION_MODE mode,
1177#if CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1178 int block,
1179 const WarpedMotionParams *gm_params,
1180#endif // CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1181 const MODE_INFO *mi) {
1182 const MOTION_MODE last_motion_mode_allowed = motion_mode_allowed(
1183#if CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1184 block, gm_params,
1185#endif // CONFIG_GLOBAL_MOTION && SEPARATE_GLOBAL_MOTION
1186 mi);
1187 // Check that the input mode is not illegal
1188 if (last_motion_mode_allowed < mode)
1189 assert(0 && "Illegal motion mode selected");
1190}
1191
Yue Chencb60b182016-10-13 15:18:22 -07001192#if CONFIG_MOTION_VAR
Yaowu Xuc27fc142016-08-22 16:08:15 -07001193static INLINE int is_neighbor_overlappable(const MB_MODE_INFO *mbmi) {
1194 return (is_inter_block(mbmi));
1195}
Yue Chencb60b182016-10-13 15:18:22 -07001196#endif // CONFIG_MOTION_VAR
1197#endif // CONFIG_MOTION_VAR || CONFIG_WARPED_MOTION
Yaowu Xuc27fc142016-08-22 16:08:15 -07001198
Urvang Joshi56ba91b2017-01-10 13:22:09 -08001199// Returns sub-sampled dimensions of the given block.
1200// The output values for 'rows_within_bounds' and 'cols_within_bounds' will
1201// differ from 'height' and 'width' when part of the block is outside the right
1202// and/or bottom image boundary.
1203static INLINE void av1_get_block_dimensions(BLOCK_SIZE bsize, int plane,
1204 const MACROBLOCKD *xd, int *width,
1205 int *height,
1206 int *rows_within_bounds,
1207 int *cols_within_bounds) {
1208 const int block_height = block_size_high[bsize];
1209 const int block_width = block_size_wide[bsize];
1210 const int block_rows = (xd->mb_to_bottom_edge >= 0)
1211 ? block_height
1212 : (xd->mb_to_bottom_edge >> 3) + block_height;
1213 const int block_cols = (xd->mb_to_right_edge >= 0)
1214 ? block_width
1215 : (xd->mb_to_right_edge >> 3) + block_width;
1216 const struct macroblockd_plane *const pd = &xd->plane[plane];
1217 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_x == 0));
1218 assert(IMPLIES(plane == PLANE_TYPE_Y, pd->subsampling_y == 0));
1219 assert(block_width >= block_cols);
1220 assert(block_height >= block_rows);
1221 if (width) *width = block_width >> pd->subsampling_x;
1222 if (height) *height = block_height >> pd->subsampling_y;
1223 if (rows_within_bounds) *rows_within_bounds = block_rows >> pd->subsampling_y;
1224 if (cols_within_bounds) *cols_within_bounds = block_cols >> pd->subsampling_x;
1225}
1226
Yue Chen19e7aa82016-11-30 14:05:39 -08001227#if CONFIG_GLOBAL_MOTION
1228static INLINE int is_nontrans_global_motion(const MACROBLOCKD *xd) {
1229 const MODE_INFO *mi = xd->mi[0];
1230 const MB_MODE_INFO *const mbmi = &mi->mbmi;
1231 int ref;
1232#if CONFIG_CB4X4
1233 const int unify_bsize = 1;
1234#else
1235 const int unify_bsize = 0;
1236#endif
1237
1238 // First check if all modes are ZEROMV
1239 if (mbmi->sb_type >= BLOCK_8X8 || unify_bsize) {
1240#if CONFIG_EXT_INTER
1241 if (mbmi->mode != ZEROMV && mbmi->mode != ZERO_ZEROMV) return 0;
1242#else
1243 if (mbmi->mode != ZEROMV) return 0;
1244#endif // CONFIG_EXT_INTER
1245 } else {
1246#if CONFIG_EXT_INTER
1247 if (mi->bmi[0].as_mode != ZEROMV || mi->bmi[1].as_mode != ZEROMV ||
1248 mi->bmi[2].as_mode != ZEROMV || mi->bmi[3].as_mode != ZEROMV ||
1249 mi->bmi[0].as_mode != ZERO_ZEROMV ||
1250 mi->bmi[1].as_mode != ZERO_ZEROMV ||
1251 mi->bmi[2].as_mode != ZERO_ZEROMV || mi->bmi[3].as_mode != ZERO_ZEROMV)
1252 return 0;
1253#else
1254 if (mi->bmi[0].as_mode != ZEROMV || mi->bmi[1].as_mode != ZEROMV ||
1255 mi->bmi[2].as_mode != ZEROMV || mi->bmi[3].as_mode != ZEROMV)
1256 return 0;
1257#endif // CONFIG_EXT_INTER
1258 }
Jingning Han3ca0e672017-04-14 19:48:05 -07001259
1260#if !GLOBAL_SUB8X8_USED
1261 if (mbmi->sb_type < BLOCK_8X8) return 0;
1262#endif
1263
Yue Chen19e7aa82016-11-30 14:05:39 -08001264 // Now check if all global motion is non translational
1265 for (ref = 0; ref < 1 + has_second_ref(mbmi); ++ref) {
1266 if (xd->global_motion[mbmi->ref_frame[ref]].wmtype <= TRANSLATION) return 0;
1267 }
1268 return 1;
1269}
1270#endif // CONFIG_GLOBAL_MOTION
1271
Luc Trudeau005feb62017-02-22 13:34:01 -05001272static INLINE PLANE_TYPE get_plane_type(const int plane) {
1273 return (plane == 0) ? PLANE_TYPE_Y : PLANE_TYPE_UV;
1274}
1275
Yaowu Xuc27fc142016-08-22 16:08:15 -07001276#ifdef __cplusplus
1277} // extern "C"
1278#endif
1279
Yaowu Xuf883b422016-08-30 14:01:10 -07001280#endif // AV1_COMMON_BLOCKD_H_